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* Completely disallow partial copies in adjustCopiesBackFrom().Jakob Stoklund Olesen2012-10-291-1/+2
| | | | | | | | | | | | Partial copies can show up even when CoalescerPair.isPartial() returns false. For example: %vreg24:dsub_0<def> = COPY %vreg31:dsub_0; QPR:%vreg24,%vreg31 Such a partial-partial copy is not good enough for the transformation adjustCopiesBackFrom() needs to do. llvm-svn: 166944
* Remove a wrapper around getIntPtrType added to GVN by Hal in commit 166624 (theDuncan Sands2012-10-291-3/+3
| | | | | | | | | wrapper returns a vector of integers when passed a vector of pointers) by having getIntPtrType itself return a vector of integers in this case. Outside of this wrapper, I didn't find anywhere in the codebase that was relying on the old behaviour for vectors of pointers, so give this a whirl through the buildbots. llvm-svn: 166939
* This patch addresses a problem with the Post RA scheduler generating anPreston Gurd2012-10-291-0/+5
| | | | | | | | | | | | | | incorrect instruction sequence due to it not being aware that an inline assembly instruction may reference memory. This patch fixes the problem by causing the scheduler to always assume that any inline assembly code instruction could access memory. This is necessary because the internal representation of the inline instruction does not include any information about memory accesses. This should fix PR13504. llvm-svn: 166929
* Remove unused typedef.Lang Hames2012-10-291-1/+0
| | | | llvm-svn: 166910
* Never attempt to join an early-clobber def with a regular kill.Jakob Stoklund Olesen2012-10-271-0/+14
| | | | | | This fixes PR14194. llvm-svn: 166880
* Reduce indentation with early exit.Jakob Stoklund Olesen2012-10-261-22/+21
| | | | | | No functional change. llvm-svn: 166829
* Also make the current basic block a class member.Jakob Stoklund Olesen2012-10-261-65/+53
| | | | | | Don't pass it around everywhere as a function argument. llvm-svn: 166828
* Make the Processed set a class member.Jakob Stoklund Olesen2012-10-261-21/+14
| | | | | | Don't pass it everywhere as an argument. llvm-svn: 166820
* Fix whitespace and function names to be coding standardy.Jakob Stoklund Olesen2012-10-261-148/+149
| | | | | | No functional change. llvm-svn: 166814
* Remove the canCombineSubRegIndices() target hook.Jakob Stoklund Olesen2012-10-261-129/+0
| | | | | | | The new coalescer can already do all of this, so there is no need to duplicate the efforts. llvm-svn: 166813
* Make sure I is not the end iterator when isInsideBundle is called. Akira Hatanaka2012-10-261-2/+3
| | | | llvm-svn: 166784
* Remove GC roots that reference dead objects.Nicolas Geoffray2012-10-261-3/+10
| | | | llvm-svn: 166763
* Fix typo in comment.Nick Lewycky2012-10-261-1/+1
| | | | llvm-svn: 166750
* Stop running the machine code verifier unconditionally.Jakob Stoklund Olesen2012-10-251-1/+0
| | | | llvm-svn: 166646
* Add some cleanup to the DataLayout changes requested by Chandler.Micah Villmow2012-10-241-4/+4
| | | | llvm-svn: 166607
* Back out r166591, not sure why this made it through since I cancelled the ↵Micah Villmow2012-10-242-2/+2
| | | | | | command. Bleh, sorry about this! llvm-svn: 166596
* Delete a directory that wasn't supposed to be checked in yet.Micah Villmow2012-10-242-2/+2
| | | | llvm-svn: 166591
* Add in support for getIntPtrType to get the pointer type based on the ↵Micah Villmow2012-10-244-13/+15
| | | | | | | | | address space. This checkin also adds in some tests that utilize these paths and updates some of the clients. llvm-svn: 166578
* Teach DAG combine to fold (buildvec (Xint2fp x)) to (Xint2fp (buildvec x))Michael Liao2012-10-241-0/+71
| | | | | | | | - If more than 1 elemennts are defined and target supports the vectorized conversion, use the vectorized one instead to reduce the strength on conversion operation. llvm-svn: 166546
* Keep coding standard. Don't evaluate getNumOperands() every time.Jakub Staszak2012-10-241-1/+1
| | | | llvm-svn: 166531
* Clean up code and put transformation on (build_vec (ext x)) into a helper funcMichael Liao2012-10-231-55/+69
| | | | llvm-svn: 166519
* Make the indirect branch optimization deterministic. No functionality change.Nadav Rotem2012-10-231-8/+8
| | | | | | Patch by Daniel Reynaud. llvm-svn: 166501
* Per the C++ standard, we need to include the definition of llvm::Calculate inRichard Smith2012-10-231-0/+1
| | | | | | | every TU where it's implicitly instantiated, even if there's an implicit instantiation for the same types available in another TU. llvm-svn: 166470
* Don't crash when the Assignments vector is empty.Jakob Stoklund Olesen2012-10-211-1/+1
| | | | | | Reported by Vincent Lejeune using an out-of-tree target. llvm-svn: 166398
* Symbol hygiene: Make sure declarations and definitions match, make helper ↵Benjamin Kramer2012-10-202-1/+3
| | | | | | functions static. llvm-svn: 166376
* 1. Remove noreturn attribute from __builtin_debugtrap().Shuxin Yang2012-10-191-2/+2
| | | | | | | | (The change at Clang side was committed in r166345) 2. Cosmetic change in order to conform to coding standards. llvm-svn: 166350
* revert r166264 because the LTO build is still failingNadav Rotem2012-10-191-2/+2
| | | | llvm-svn: 166340
* This patch is to fix radar://8426430. It is about llvm support of ↵Shuxin Yang2012-10-193-5/+23
| | | | | | | | | | | | | | | | | | | | | | | __builtin_debugtrap() which is supposed to consistently raise SIGTRAP across all systems. In contrast, __builtin_trap() behave differently on different systems. e.g. it raises SIGTRAP on ARM, and SIGILL on X86. The purpose of __builtin_debugtrap() is to consistently provide "trap" functionality, in the mean time preserve the compatibility with on gcc on __builtin_trap(). The X86 backend is already able to handle debugtrap(). This patch is to: 1) make front-end recognize "__builtin_debugtrap()" (emboddied in the one-line change to Clang). 2) In DAG legalization phase, by default, "debugtrap" will be replaced with "trap", which make the __builtin_debugtrap() "available" to all existing ports without the hassle of changing their code. 3) If trap-function is specified (via -trap-func=xyz to llc), both __builtin_debugtrap() and __builtin_trap() will be expanded into the function call of the specified trap function. This behavior may need change in the future. The provided testing-case is to make sure 2) and 3) are working for ARM port, and we already have a testing case for x86. llvm-svn: 166300
* recommit the patch that makes LSR and LowerInvoke use the TargetTransform ↵Nadav Rotem2012-10-191-2/+2
| | | | | | interface. llvm-svn: 166264
* Simplify condition checking as CONCAT assume all inputs of the same type.Michael Liao2012-10-191-3/+3
| | | | llvm-svn: 166260
* Clear unknown mem ops when merging stack slots (pr14090)Sebastian Pop2012-10-181-6/+13
| | | | | | | | | | | When merging stack slots, if StackColoring::remapInstructions gets a value back from GetUnderlyingObject that it does not know about or is not itself a stack slot, clear the memory operand in case it aliases the merged slot. This prevents the introduction of incorrect aliasing information. Author: Matthew Curtis <mcurtis@codeaurora.org> llvm-svn: 166216
* Change MachineFrameInfo::StackObject::Alloca from Value* to AllocaInst*Sebastian Pop2012-10-181-0/+1
| | | | | | | | | | This more accurately reflects what is actually being stored in the field. No functionality change intended. Author: Matthew Curtis <mcurtis@codeaurora.org> llvm-svn: 166215
* In SimplifySelectOps we pulled two loads through a select node despite the ↵Nadav Rotem2012-10-181-0/+4
| | | | | | | | fact that one was dependent on the other. rdar://12513091 llvm-svn: 166196
* Temporarily revert the TargetTransform changes.Bob Wilson2012-10-181-2/+2
| | | | | | | | | | | The TargetTransform changes are breaking LTO bootstraps of clang. I am working with Nadav to figure out the problem, but I am reverting it for now to get our buildbots working. This reverts svn commits: 165665 165669 165670 165786 165787 165997 and I have also reverted clang svn 165741 llvm-svn: 166168
* Revert part of r166049 back and enable test case in r166125.Michael Liao2012-10-171-0/+42
| | | | | | | | - Folding (trunc (concat ... X )) to (concat ... (trunc X) ...) is valid when '...' are all 'undef's. - r166125 relies on this transformation. llvm-svn: 166155
* Revert r166049Michael Liao2012-10-171-46/+0
| | | | | | - In general, it's unsafe for this transformation. llvm-svn: 166135
* Teach DAG combine to fold (extract_subvec (concat v1, ..) i) to v_iMichael Liao2012-10-171-2/+17
| | | | | | | | - If the extracted vector has the same type of all vectored being concatenated together, it should be simplified directly into v_i, where i is the index of the element being extracted. llvm-svn: 166125
* Switch MRI::UsedPhysRegs to a register unit bit vector.Jakob Stoklund Olesen2012-10-171-2/+2
| | | | | | | This is a more compact, less redundant representation, and it avoids scanning long lists of aliases for ARM D-registers, for example. llvm-svn: 166124
* Add a really faster pre-RA scheduler (-pre-RA-sched=linearize). It doesn't useEvan Cheng2012-10-173-3/+160
| | | | | | | | | | | | | | any scheduling heuristics nor does it build up any scheduling data structure that other heuristics use. It essentially linearize by doing a DFA walk but it does handle glues correctly. IMPORTANT: it probably can't handle all the physical register dependencies so it's not suitable for x86. It also doesn't deal with dbg_value nodes right now so it's definitely is still WIP. rdar://12474515 llvm-svn: 166122
* Merge MRI::isPhysRegOrOverlapUsed() into isPhysRegUsed().Jakob Stoklund Olesen2012-10-172-2/+2
| | | | | | | | | | | All callers of these functions really want the isPhysRegOrOverlapUsed() functionality which also checks aliases. For historical reasons, targets without register aliases were calling isPhysRegUsed() instead. Change isPhysRegUsed() to also check aliases, and switch all isPhysRegOrOverlapUsed() callers to isPhysRegUsed(). llvm-svn: 166117
* misched: Better handling of invalid latencies in the machine modelAndrew Trick2012-10-171-2/+10
| | | | llvm-svn: 166107
* Use a SparseSet instead of a BitVector for UsedInInstr in RAFast.Jakob Stoklund Olesen2012-10-171-23/+30
| | | | | | | | This is just as fast, and it makes it possible to avoid leaking the UsedPhysRegs BitVector implementation through MachineRegisterInfo::addPhysRegsUsed(). llvm-svn: 166083
* Avoid rematerializing a redef immediately after the old def.Jakob Stoklund Olesen2012-10-161-0/+7
| | | | | | | | | | | | | | | | | PR14098 contains an example where we would rematerialize a MOV8ri immediately after the original instruction: %vreg7:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 %vreg22:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 Besides being pointless, it is also wrong since the original instruction only redefines part of the register, and the value read by the new instruction is wrong. The problem was the LiveRangeEdit::allUsesAvailableAt() didn't special-case OrigIdx == UseIdx and found the wrong SSA value. llvm-svn: 166068
* Revert r166046 "Switch back to the old coalescer for now to fix the 32 bit bit"Jakob Stoklund Olesen2012-10-161-344/+1
| | | | | | A fix for PR14098, including the test case is in the next commit. llvm-svn: 166067
* Teach DAG combine to fold (trunc (fptoXi x)) to (fptoXi x)Michael Liao2012-10-161-0/+46
| | | | llvm-svn: 166049
* Switch back to the old coalescer for now to fix the 32 bit bitRafael Espindola2012-10-161-1/+344
| | | | | | llvm+clang+compiler-rt bootstrap. llvm-svn: 166046
* Issue:Stepan Dyatkovskiy2012-10-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Stack is formed improperly for long structures passed as byval arguments for EABI mode. If we took AAPCS reference, we can found the next statements: A: "If the argument requires double-word alignment (8-byte), the NCRN (Next Core Register Number) is rounded up to the next even register number." (5.5 Parameter Passing, Stage C, C.3). B: "The alignment of an aggregate shall be the alignment of its most-aligned component." (4.3 Composite Types, 4.3.1 Aggregates). So if we have structure with doubles (9 double fields) and 3 Core unused registers (r1, r2, r3): caller should use r2 and r3 registers only. Currently r1,r2,r3 set is used, but it is invalid. Callee VA routine should also use r2 and r3 regs only. All is ok here. This behaviour is guessed by rounding up SP address with ADD+BFC operations. Fix: Main fix is in ARMTargetLowering::HandleByVal. If we detected AAPCS mode and 8 byte alignment, we waste odd registers then. P.S.: I also improved LDRB_POST_IMM regression test. Since ldrb instruction will not generated by current regression test after this patch. llvm-svn: 166018
* misched: Added handleMove support for updating all kill flags, not just for ↵Andrew Trick2012-10-162-8/+21
| | | | | | | | | allocatable regs. This is a medium term workaround until we have a more robust solution in the form of a register liveness utility for postRA passes. llvm-svn: 166001
* Remove unused BitVectors from getAllocatableSet().Jakob Stoklund Olesen2012-10-163-9/+1
| | | | llvm-svn: 165999
* Remove RegisterClassInfo::isReserved() and isAllocatable().Jakob Stoklund Olesen2012-10-156-17/+18
| | | | | | Clients can use the equivalent functions in MRI. llvm-svn: 165990
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