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* Modify the comparison optimizations in the peephole optimizer to update theBill Wendling2010-09-101-6/+10
| | | | | | | iterator when an optimization took place. This allows us to do more insane things with the code than just remove an instruction or two. llvm-svn: 113640
* CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally.Michael J. Spencer2010-09-103-3/+23
| | | | llvm-svn: 113632
* Add DEBUG message.Devang Patel2010-09-102-4/+16
| | | | llvm-svn: 113614
* Teach if-converter to be more careful with predicating instructions that wouldEvan Cheng2010-09-108-41/+45
| | | | | | | | | | | take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. llvm-svn: 113570
* Remove dead code.Jakob Stoklund Olesen2010-09-081-11/+0
| | | | llvm-svn: 113386
* Don't add <imp-def> operands during register rewriting.Jakob Stoklund Olesen2010-09-071-16/+9
| | | | | | | | | | | | | | LiveIntervals already adds <imp-def> operands for super-registers when a subreg def defines the whole register. Thus, it is not necessary to do it again when rewriting. In fact, the super-register imp-defs caused miscompilations because the late scheduler couldn't see that the super-register was read. We still add super-reg <imp-use,kill> operands when rewriting virtuals to physicals. llvm-svn: 113299
* add a comment about where this should eventually move.Chris Lattner2010-09-051-0/+7
| | | | llvm-svn: 113117
* Added initialisers for reduction rule counters.Lang Hames2010-09-051-0/+4
| | | | llvm-svn: 113108
* implement rdar://6653118 - fastisel should fold loads where possible.Chris Lattner2010-09-051-1/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since mem2reg isn't run at -O0, we get a ton of reloads from the stack, for example, before, this code: int foo(int x, int y, int z) { return x+y+z; } used to compile into: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx movl 4(%rsp), %esi addl %edx, %esi movl (%rsp), %edx addl %esi, %edx movl %edx, %eax addq $12, %rsp ret Now we produce: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx addl 4(%rsp), %edx ## Folded load addl (%rsp), %edx ## Folded load movl %edx, %eax addq $12, %rsp ret Fewer instructions and less register use = faster compiles. llvm-svn: 113102
* Remove dead code.Jakob Stoklund Olesen2010-09-041-97/+0
| | | | | | | Clobber ranges are no longer used when joining physical registers. Instead, all aliases are checked for interference. llvm-svn: 113084
* zap dead code.Chris Lattner2010-09-042-18/+0
| | | | llvm-svn: 113073
* previous patch was a little too tricky for its own good. Don't try toJim Grosbach2010-09-031-8/+7
| | | | | | | | overload UserInInstr. Explicitly check Allocatable. The early exit in the condition will mean the performance impact of the extra test should be minimal. llvm-svn: 113016
* Add a missing check when legalizing a vector extending load. This doesn'tBob Wilson2010-09-031-3/+5
| | | | | | | solve the root problem, but it corrects the bug in the code I added to support legalizing in the case where the non-extended type is also legal. llvm-svn: 112997
* VirtRegRewriter checks for early clobbers before it reuses an available stackJakob Stoklund Olesen2010-09-031-5/+7
| | | | | | | | | | | | slot. Teach it to also check for early clobbered aliases, and early clobber operands following the current operand. This fixes the miscompilation in PR8044 where EC registers eax and ecx were being used for inputs. llvm-svn: 112988
* Reapply commit 112702 which was speculatively reverted by echristo.Duncan Sands2010-09-031-82/+80
| | | | | | | | | | Original commit message: Use the SSAUpdator to turn calls to eh.exception that are not in a landing pad into uses of registers rather than loads from a stack slot. Doesn't touch the 'orrible hack code - Bill needs to persuade me harder :) llvm-svn: 112952
* There is no need to use .set here.Devang Patel2010-09-021-8/+1
| | | | | | Thanks Chris! llvm-svn: 112900
* Detect undef value early and save unnecessary NodeMap query.Devang Patel2010-09-021-0/+11
| | | | llvm-svn: 112864
* Don't narrow the load and store in a load+twiddle+store sequence unlessDan Gohman2010-09-021-1/+2
| | | | | | | | | | there are clearly no stores between the load and the store. This fixes this miscompile reported as PR7833. This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is safe, but awkward to prove safe. Move it to X86's README.txt. llvm-svn: 112861
* Tidy up.Devang Patel2010-09-021-11/+9
| | | | llvm-svn: 112858
* The scavenger should just use getAllocatableSet() rather than reinventing itJim Grosbach2010-09-021-13/+3
| | | | | | locally. llvm-svn: 112845
* Anti-dependency breaking needs to be careful not to use reserved regsJim Grosbach2010-09-022-0/+4
| | | | llvm-svn: 112832
* Fix .debug_range for linux. Patch by Krister Wombell.Devang Patel2010-09-022-4/+34
| | | | llvm-svn: 112830
* Added support for register allocators to record which intervals are spill ↵Lang Hames2010-09-023-83/+193
| | | | | | | | intervals, and where the uses and defs of the original intervals were in the original code. Spill intervals can be hidden using the "-rmf-intervals=virt-nospills*" option. llvm-svn: 112811
* Silence an ambiguous else warning from GCC.Chandler Carruth2010-09-021-1/+2
| | | | llvm-svn: 112809
* Added counters for PBQP reduction rules.Lang Hames2010-09-023-1/+44
| | | | llvm-svn: 112807
* Add a bit of debug output for register scavengingJim Grosbach2010-09-021-2/+12
| | | | llvm-svn: 112787
* Tweak to ignoring reserved regs. The allocator was occasionally still lookingJim Grosbach2010-09-011-2/+4
| | | | | | | at them since they'd end up in the register weights list. Tell it to stop doing that. llvm-svn: 112756
* Teach RemoveCopyByCommutingDef to check all aliases, not just subregisters.Jakob Stoklund Olesen2010-09-011-16/+14
| | | | | | | This caused a miscompilation in WebKit where %RAX had conflicting defs when RemoveCopyByCommutingDef was commuting a %EAX use. llvm-svn: 112751
* tidy up trailing whitespace and an 80 column violation.Jim Grosbach2010-09-011-24/+25
| | | | llvm-svn: 112746
* cleanup per feedback. use a helper function for getting the first non-reservedJim Grosbach2010-09-011-17/+14
| | | | | | | physical register in a register class. Make sure to assert if the register class is empty. llvm-svn: 112743
* The register allocator shouldn't consider allocating reserved registers. ↵Jim Grosbach2010-09-011-2/+8
| | | | | | PBQP version. llvm-svn: 112742
* The register allocator shouldn't consider allocating reserved registers.Jim Grosbach2010-09-011-5/+30
| | | | | | r112728 did this for fast regalloc. llvm-svn: 112741
* The register allocator shouldn't consider allocating reserved registers.Jim Grosbach2010-09-011-3/+7
| | | | llvm-svn: 112728
* tidy up a few 80-column and trailing whitespace bits.Jim Grosbach2010-09-011-16/+19
| | | | llvm-svn: 112726
* Speculatively revert 112699 and 112702, they seem to be causingEric Christopher2010-09-011-80/+82
| | | | | | self host errors on clang-x86-64. llvm-svn: 112719
* Use the SSAUpdator to turn calls to eh.exception that are not in aDuncan Sands2010-09-011-82/+80
| | | | | | | | landing pad into uses of registers rather than loads from a stack slot. Doesn't touch the 'orrible hack code - Bill needs to persuade me harder :) llvm-svn: 112702
* Use absolute label for DW_AT_stmt_list if a target does not prefer offset here.Devang Patel2010-08-311-1/+5
| | | | | | This patch was developed on top of original patch by Artur Pietrek. llvm-svn: 112678
* Reapply r112623. Included additional check for unused byval argument.Devang Patel2010-08-313-4/+52
| | | | llvm-svn: 112659
* Track liveness of unallocatable, unreserved registers in machine DCE.Jakob Stoklund Olesen2010-08-311-6/+8
| | | | | | | | | | | | | Reserved registers are unpredictable, and are treated as always live by machine DCE. Allocatable registers are never reserved, and can be used for virtual registers. Unreserved, unallocatable registers can not be used for virtual registers, but otherwise behave like a normal allocatable register. Most targets only have the flag register in this set. llvm-svn: 112649
* Ignore unallocatable registers in RegAllocFast.Jakob Stoklund Olesen2010-08-311-1/+2
| | | | llvm-svn: 112632
* Revert r112623. It is causing self host build failures.Devang Patel2010-08-313-49/+4
| | | | llvm-svn: 112631
* Remember byval argument's frame index during argument lowering and use this ↵Devang Patel2010-08-313-4/+49
| | | | | | | | info to emit debug info. Fixes Radar 8367011. llvm-svn: 112623
* Improve virtual frame base register allocation heuristics.Jim Grosbach2010-08-311-73/+109
| | | | | | | | | | | | | | | | 1. Allocate them in the entry block of the function to enable function-wide re-use. The instructions to create them should be re-materializable, so there shouldn't be additional cost compared to creating them local to the basic blocks where they are used. 2. Collect all of the frame index references for the function and sort them by the local offset referenced. Iterate over the sorted list to allocate the virtual base registers. This enables creation of base registers optimized for positive-offset access of frame references. (Note: This may be appropriate to later be a target hook to do the sorting in a target appropriate manner. For now it's done here for simplicity.) llvm-svn: 112609
* Stop using the dom frontier in DwarfEHPrepare by not promoting alloca'sDuncan Sands2010-08-312-87/+10
| | | | | | | | any more. I plan to reimplement alloca promotion using SSAUpdater later. It looks like Bill's URoR logic really always needs domtree, so the pass now always asks for domtree info. llvm-svn: 112597
* Offset is not always unsigned number.Devang Patel2010-08-312-2/+2
| | | | llvm-svn: 112584
* Simplify.Devang Patel2010-08-312-15/+15
| | | | llvm-svn: 112583
* zap unused method. x86 is the only user and already has a more powerfull versionBruno Cardoso Lopes2010-08-311-29/+0
| | | | llvm-svn: 112571
* Add experimental -disable-physical-join command line option.Jakob Stoklund Olesen2010-08-311-0/+10
| | | | | | | | | | Eventually, we want to disable physreg coalescing completely, and let the register allocator do its job using hints. This option makes it possible to measure the impact of disabling physreg coalescing. llvm-svn: 112567
* two changes:Chris Lattner2010-08-301-5/+0
| | | | | | | | | | | | | 1) nuke ConstDataCoalSection, which is dead. 2) revise my previous patch for rdar://8018335, which was completely wrong. Specifically, it doesn't make sense to mark __TEXT,__const_coal as PURE_INSTRUCTIONS, because it is for readonly data. templates (it turns out) go to const_coal_nt. The real fix for rdar://8018335 was to give ConstTextCoalSection a section kind of ReadOnly instead of Text. llvm-svn: 112496
* Revert r112461. It was failing on PPC...Bill Wendling2010-08-301-4/+2
| | | | llvm-svn: 112463
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