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* Move the llvm mangler to lib/IR.Rafael Espindola2014-01-078-8/+8
| | | | | | This makes it available to tools that don't link with target (like llvm-ar). llvm-svn: 198708
* Emit arange padding with a single directive.Benjamin Kramer2014-01-071-5/+3
| | | | llvm-svn: 198700
* Move the LLVM IR asm writer header files into the IR directory, as theyChandler Carruth2014-01-0710-10/+10
| | | | | | | | | | | | | | | | | are part of the core IR library in order to support dumping and other basic functionality. Rename the 'Assembly' include directory to 'AsmParser' to match the library name and the only functionality left their -- printing has been in the core IR library for quite some time. Update all of the #includes to match. All of this started because I wanted to have the layering in good shape before I started adding support for printing LLVM IR using the new pass infrastructure, and commandline support for the new pass infrastructure. llvm-svn: 198688
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-0712-16/+13
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* Fix for PR18396: Assertion: MO->isDead "Cannot fold physreg def".Andrew Trick2014-01-071-4/+3
| | | | | | InlineSpiller::foldMemoryOperand needs to handle undef call operands. llvm-svn: 198679
* [AArch64 NEON] Fix invalid constant used in vselect condition.Kevin Qin2014-01-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is a wrong assumption that the vector element type and the type of each ConstantSDNode in the build_vector were the same. However, when promoting the integer operand of a legally typed build_vector, the operand type and the vector element type do not need to be the same (See method 'DAGTypeLegalizer::PromoteIntOp_BUILD_VECTOR' in LegalizeIntegerTypes.cpp). in AArch64 backend, the following dag sequence: C0: i1 = Constant<0> C1: i1 = Constant<-1> V: v8i1 = BUILD_VECTOR C1, C1, C0, C0, C0, C0, C0, C0 is type-legalized into: NewC0: i32 = Constant<0> NewC1: i32 = Constant<1> V: v8i8 = BUILD_VECTOR NewC1, NewC1, NewC0, NewC0, NewC0, NewC0, NewC0, NewC0 Forcing a getZeroExtend to VTBits to ensure that the new constant is correctly. llvm-svn: 198582
* Refactor function that checks that __builtin_returnaddress's argument is ↵Bill Wendling2014-01-061-0/+12
| | | | | | | | | constant. This moves the check up into the parent class so that all targets can use it without having to copy (and keep in sync) the same error message. llvm-svn: 198579
* Add a LLVM_DUMP_METHOD macro.Nico Weber2014-01-031-1/+1
| | | | | | | | | | | | | | The motivation is to mark dump methods as used in debug builds so that they can be called from lldb, but to not do so in release builds so that they can be dead-stripped. There's lots of potential follow-up work suggested in the thread "Should dump methods be LLVM_ATTRIBUTE_USED only in debug builds?" on cfe-dev, but everyone seems to agreen on this subset. Macro name chosen by fair coin toss. llvm-svn: 198456
* Make the llvm mangler depend only on DataLayout.Rafael Espindola2014-01-034-13/+21
| | | | | | | | | | | | | | Before this patch any program that wanted to know the final symbol name of a GlobalValue had to link with Target. This patch implements a compromise solution where the mangler uses DataLayout. This way, any tool that already links with Target (llc, clang) gets the exact behavior as before and new IR files can be mangled without linking with Target. With this patch the mangler is constructed with just a DataLayout and DataLayout is extended to include the information the Mangler needs. llvm-svn: 198438
* Revert "Revert "Debug Info: Type Units: Simplify type hashing using ↵David Blaikie2014-01-033-93/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | IR-provided unique names."" This reverts commit r198398, thus reapplying r198397. I had accidentally introduced an endianness issue when applying the hash to the type unit. Using support::ulittle64_t in the reinterpret_cast in addDwarfTypeUnitType fixes this issue. Original commit message: Debug Info: Type Units: Simplify type hashing using IR-provided unique names. What's good for LTO metadata size problems ought to be good for non-LTO debug info size too, so let's rely on the same uniqueness in both cases. If it's insufficient for non-LTO for whatever reason (since we now won't be uniquing CU-local types or any C types - but these are likely to not be the most significant contributors to type bloat) we should consider a frontend solution that'll help both LTO and non-LTO alike, rather than using DWARF-level DIE-hashing that only helps non-LTO debug info size. It's also much simpler this way and benefits C++ even more since we can deduplicate lexically separate definitions of the same C++ type since they have the same mangled name. llvm-svn: 198436
* Revert "Debug Info: Type Units: Simplify type hashing using IR-provided ↵David Blaikie2014-01-033-19/+93
| | | | | | | | | | | unique names." Reverting due to bot failure I won't have time to investigate until tomorrow. This reverts commit r198397. llvm-svn: 198398
* Debug Info: Type Units: Simplify type hashing using IR-provided unique names.David Blaikie2014-01-033-93/+19
| | | | | | | | | | | | | | | | What's good for LTO metadata size problems ought to be good for non-LTO debug info size too, so let's rely on the same uniqueness in both cases. If it's insufficient for non-LTO for whatever reason (since we now won't be uniquing CU-local types or any C types - but these are likely to not be the most significant contributors to type bloat) we should consider a frontend solution that'll help both LTO and non-LTO alike, rather than using DWARF-level DIE-hashing that only helps non-LTO debug info size. It's also much simpler this way and benefits C++ even more since we can deduplicate lexically separate definitions of the same C++ type since they have the same mangled name. llvm-svn: 198397
* 80-column.Eric Christopher2014-01-031-2/+4
| | | | llvm-svn: 198394
* Remove TextSectionSym as it is unused.Eric Christopher2014-01-031-4/+1
| | | | llvm-svn: 198393
* Revert "Reverting r193835 due to weirdness with Go..."David Blaikie2014-01-031-4/+8
| | | | | | | | | | The cgo problem was that it wants dwarf2 which doesn't support direct constant encoding of the location. So let's add support for dwarf2 encoding (using a location expression) of data member locations. This reverts commit r198385. llvm-svn: 198389
* Reverting r193835 due to weirdness with Go...David Blaikie2014-01-031-4/+5
| | | | | | | Apologies for the noise - we're seeing some Go failures with cgo interacting with Clang's debug info due to this change. llvm-svn: 198385
* [RegAlloc] Make tryInstructionSplit less aggressive.Quentin Colombet2014-01-023-14/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The greedy register allocator tries to split a live-range around each instruction where it is used or defined to relax the constraints on the entire live-range (this is a last chance split before falling back to spill). The goal is to have a big live-range that is unconstrained (i.e., that can use the largest legal register class) and several small local live-range that carry the constraints implied by each instruction. E.g., Let csti be the constraints on operation i. V1= op1 V1(cst1) op2 V1(cst2) V1 live-range is constrained on the intersection of cst1 and cst2. tryInstructionSplit relaxes those constraints by aggressively splitting each def/use point: V1= V2 = V1 V3 = V2 op1 V3(cst1) V4 = V2 op2 V4(cst2) Because of how the coalescer infrastructure works, each new variable (V3, V4) that is alive at the same time as V1 (or its copy, here V2) interfere with V1. Thus, we end up with an uncoalescable copy for each split point. To make tryInstructionSplit less aggressive, we check if the split point actually relaxes the constraints on the whole live-range. If it does not, we do not insert it. Indeed, it will not help the global allocation problem: - V1 will have the same constraints. - V1 will have the same interference + possibly the newly added split variable VS. - VS will produce an uncoalesceable copy if alive at the same time as V1. <rdar://problem/15570057> llvm-svn: 198369
* Remove comments on CU skeleton construction, they're probablyEric Christopher2014-01-021-4/+0
| | | | | | obvious. llvm-svn: 198361
* Elaborate on comment for skeleton CU construction.Eric Christopher2014-01-021-1/+4
| | | | llvm-svn: 198358
* Revert seemingly unnecessary section sym for the data section.Eric Christopher2014-01-021-1/+0
| | | | llvm-svn: 198357
* Disable compare sinking in CodeGenPrepare when multiple condition registers ↵Hal Finkel2014-01-021-0/+1
| | | | | | | | | | | | | | | | | | | are available As noted in the comment above CodeGenPrepare::OptimizeInst, which aggressively sinks compares to reduce pressure on the condition register(s), for targets such as PowerPC with multiple condition registers, this may not be the right thing to do. This adds an HasMultipleConditionRegisters boolean to TLI, and CodeGenPrepare::OptimizeInst is skipped when HasMultipleConditionRegisters is true. This functionality will be used by the PowerPC backend in an upcoming commit. Especially when the PowerPC backend starts tracking individual condition register bits as separate allocatable entities (which will happen in this upcoming commit), this sinking from CodeGenPrepare::OptimizeInst is significantly suboptimial. llvm-svn: 198354
* Fix up a couple of review comments:Eric Christopher2014-01-022-9/+9
| | | | | | | | Use an if statement instead of a pair of ternary operators checking the same condition. Use a cheap method call rather than returning the local symbol. llvm-svn: 198351
* Simplify conditional.Eric Christopher2014-01-021-1/+1
| | | | llvm-svn: 198350
* Remove redundant fold call introduced in r195944. Thanks very much to JuergenLang Hames2014-01-021-2/+1
| | | | | | | for pointing this out. llvm-svn: 198341
* Revert "Debug info: Add enumerators to the __apple_names accelerator table."Adrian Prantl2014-01-021-3/+0
| | | | | | | This reverts r197927 until the discussion on llvm-commits comes to a conclusion. llvm-svn: 198333
* Remove the 's' DataLayout specificationRafael Espindola2014-01-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | During the years there have been some attempts at figuring out how to align byval arguments. A look at the commit log suggests that they were * Use the ABI alignment. * When that was not sufficient for x86-64, I added the 's' specification to DataLayout. * When that was not sufficient Evan added the virtual getByValTypeAlignment. * When even that was not sufficient, we just got the FE to add the alignment to the byval. This patch is just a simple cleanup that removes my first attempt at fixing the problem. I also added an AArch64 implementation of getByValTypeAlignment to make sure this patch is a nop. I also left the 's' parsing for backward compatibility. I will send a short email to llvmdev about the change for anyone maintaining an out of tree target. llvm-svn: 198287
* Refactor and reduce code duplication for non-split dwarf strings.Eric Christopher2013-12-301-18/+9
| | | | llvm-svn: 198233
* Revert r198208 and reapply:Eric Christopher2013-12-304-34/+52
| | | | | | | | | | r198196: Use a pointer to keep track of the skeleton unit for each normal unit and construct it up front. r198199: Reapply r198196 with a fix to zero initialize the skeleton pointer. r198202: Fix aranges and split dwarf by ensuring that the symbol and relocation back to the compile unit from the aranges section is to the skeleton unit and not the one in the dwo. with a fix to use integer 0 for DW_AT_low_pc since the relocation to the text section symbol was causing issues with COFF. Accordingly remove addLocalLabelAddress and machinery since we're not currently using it. llvm-svn: 198222
* Revert r198199 (and r198202). It broke 3 DebugInfo tests for targeting ↵NAKAMURA Takumi2013-12-304-75/+34
| | | | | | | | | | | | | | i686-cygming. r198196: Use a pointer to keep track of the skeleton unit for each normal unit and construct it up front. r198199: Reapply r198196 with a fix to zero initialize the skeleton pointer. r198202: Fix aranges and split dwarf by ensuring that the symbol and relocation back to the compile unit from the aranges section is to the skeleton unit and not the one in the dwo. They could be reproducible with explicit target. llvm/lib/MC/WinCOFFObjectWriter.cpp:224: bool {anonymous}::COFFSymbol::should_keep() const: Assertion `Section->Number != -1 && "Sections with relocations must be real!"' failed. llvm-svn: 198208
* Fix aranges and split dwarf by ensuring that the symbol and relocationEric Christopher2013-12-303-7/+23
| | | | | | | | | | | back to the compile unit from the aranges section is to the skeleton unit and not the one in the dwo. Do this by adding a method to grab a forwarded on local sym and local section by querying the skeleton if one exists and using that. Add a few tests to verify the relocations are back to the correct section. llvm-svn: 198202
* Reapply r198196 with a fix to zero initialize the skeleton pointer.Eric Christopher2013-12-303-27/+52
| | | | llvm-svn: 198199
* Temporarily revert "Use a pointer to keep track of the skeleton unit forEric Christopher2013-12-303-51/+26
| | | | | | each normal unit" as it seems to be causing problems in the asan tests. llvm-svn: 198197
* Use a pointer to keep track of the skeleton unit for each normal unitEric Christopher2013-12-303-26/+51
| | | | | | | | | | | and construct it up front. Add address ranges at the end and a helper routine so that we're not needlessly using an indirction in the case of split dwarf. Update testcases according to the new ordering of attributes on the compile unit. llvm-svn: 198196
* Fix a bug in DAGcombiner about zero-extend after setcc.Kevin Qin2013-12-301-1/+2
| | | | | | | | | | For AArch64 backend, if DAGCombiner see "sext(setcc)", it will combine them together to a single setcc with extended value type. Then if it see "zext(setcc)", it assumes setcc is Vxi1, and try to create "(and (vsetcc), (1, 1, ...)". While setcc isn't Vxi1, DAGcombiner will create wrong node and get wrong code emitted. llvm-svn: 198190
* CodeGen: silence a C++11 feature warningSaleem Abdulrasool2013-12-281-1/+1
| | | | llvm-svn: 198133
* Uninitialized variable (in never taken path) after factoring.Andrew Trick2013-12-281-1/+1
| | | | llvm-svn: 198131
* Added debugging options: -misched-only-func/blockAndrew Trick2013-12-281-0/+13
| | | | llvm-svn: 198124
* Add a PostMachineScheduler pass with generic implementation.Andrew Trick2013-12-281-284/+522
| | | | | | | | | | | | | | | | | | | | | | | | | PostGenericScheduler uses either the new machine model or the hazard checker for top-down scheduling. Most of the infrastructure for PreRA machine scheduling is reused. With a some tuning, this should allow MachineScheduler to be default for all ARM targets, including cortex-A9, using the new machine model. Likewise, with additional tuning, it should be able to replace PostRAScheduler for all targets. The PostMachineScheduler pass does not currently run the AntiDepBreaker. There is less need for it on targets that are already running preRA MachineScheduler. I want to prove it's necessary before committing to the maintenance burden. The PostMachineScheduler also currently removes kill flags and adds them all back later. This is a bit ridiculous. I'd prefer passes to directly use a liveness utility than rely on flags. A test case that enables this scheduler will be included in a subsequent checkin that updates the A9 model. llvm-svn: 198122
* Move the PostRA scheduler's fixupKills function for reuse.Andrew Trick2013-12-282-163/+150
| | | | llvm-svn: 198121
* Stub out a PostMachineScheduler pass.Andrew Trick2013-12-283-1/+82
| | | | | | Placeholder and boilerplate for a PostRA MachineScheduler pass. llvm-svn: 198120
* Factor MI-Sched in preparation for post-ra scheduling support.Andrew Trick2013-12-281-186/+308
| | | | | | | | Factor the MachineFunctionPass into MachineSchedulerBase. Split the DAG class into ScheduleDAGMI and SchedulerDAGMILive. llvm-svn: 198119
* Remove AsmPrinter::needsRelocationsForDwarfStringPool() since it'sEric Christopher2013-12-282-6/+3
| | | | | | | just calling into MAI and is only abstracting for a single interface that we actually need to check in multiple places. llvm-svn: 198092
* Teach DAGCombiner how to fold a SIGN_EXTEND_INREG of a BUILD_VECTOR ofAndrea Di Biagio2013-12-272-0/+39
| | | | | | | | | | | | | | | | | | | | ConstantSDNodes (or UNDEFs) into a simple BUILD_VECTOR. For example, given the following sequence of dag nodes: i32 C = Constant<1> v4i32 V = BUILD_VECTOR C, C, C, C v4i32 Result = SIGN_EXTEND_INREG V, ValueType:v4i1 The SIGN_EXTEND_INREG node can be folded into a build_vector since the vector in input is a BUILD_VECTOR of constants. The optimized sequence is: i32 C = Constant<-1> v4i32 Result = BUILD_VECTOR C, C, C, C llvm-svn: 198084
* Debug info: Add enumerators to the __apple_names accelerator table.Adrian Prantl2013-12-231-0/+3
| | | | | | rdar://problem/11516681. llvm-svn: 197927
* Ranges in the .debug_range section need to have begin and end labels,Eric Christopher2013-12-201-13/+8
| | | | | | assert that this is so. llvm-svn: 197780
* Add support for a CU to output a set of ranges for the CU. This is usefulEric Christopher2013-12-202-20/+74
| | | | | | | | when you want to have the full list of addresses for a particular CU or when you have multiple modules linked together and can't depend upon the ordering of a single CU for begin/end ranges. llvm-svn: 197776
* [stackprotector] Use analysis from the StackProtector pass for stack layout ↵Josh Magee2013-12-198-35/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | in PEI a nd LocalStackSlot passes. This changes the MachineFrameInfo API to use the new SSPLayoutKind information produced by the StackProtector pass (instead of a boolean flag) and updates a few pass dependencies (to preserve the SSP analysis). The stack layout follows the same approach used prior to this change - i.e., only LargeArray stack objects will be placed near the canary and everything else will be laid out normally. After this change, structures containing large arrays will also be placed near the canary - a case previously missed by the old implementation. Out of tree targets will need to update their usage of MachineFrameInfo::CreateStackObject to remove the MayNeedSP argument. The next patch will implement the rules for sspstrong and sspreq. The end goal is to support ssp-strong stack layout rules. WIP. Differential Revision: http://llvm-reviews.chandlerc.com/D2158 llvm-svn: 197653
* Debug info: Implement (rvalue) reference qualifiers for C++11 non-staticAdrian Prantl2013-12-181-0/+12
| | | | | | | | member functions. Paired commit with CFE. rdar://problem/15356637 llvm-svn: 197613
* DebugInfo: Introduce new DIValue, DIETypeSignature to encode references to ↵David Blaikie2013-12-176-36/+61
| | | | | | | | | type units via their signatures This simplifies type unit and type unit reference creation as well as setting the stage for inter-type hashing across type unit boundaries. llvm-svn: 197539
* Disabled subregister copy coalescing during MachineCSE.Andrew Trick2013-12-171-5/+15
| | | | | | | | | This effectively backs out r197465 but leaves some of the general fixes in place. Not all targets are ready to handle this feature. To enable it, some infrastructure work is needed to better handle register class constraints. llvm-svn: 197514
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