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* MIsched: Improve the interface to SchedDFS analysis (subtrees).Andrew Trick2013-01-252-34/+42
| | | | | | | Allow the strategy to select SchedDFS. Allow the results of SchedDFS to affect initialization of the scheduler state. llvm-svn: 173425
* SchedDFS: Initial support for nested subtrees.Andrew Trick2013-01-251-37/+73
| | | | | | | This is mostly refactoring, along with adding an instruction count within the subtrees and ensuring we only look at data edges. llvm-svn: 173420
* MISched: Add SchedDFSResult to ScheduleDAGMI to formalize theAndrew Trick2013-01-251-25/+55
| | | | | | interface and allow other strategies to select it. llvm-svn: 173413
* SchedDFS: Refactor and tweak the subtree selection criteria.Andrew Trick2013-01-251-24/+32
| | | | | | | | | | For sanity, create a root when NumDataSuccs >= 4. Splitting large subtrees will no longer be detrimental after my next checkin to handle nested tree. A magic number of 4 is fine because single subtrees seldom rejoin more than this. It makes subtrees easier to visualize and heuristics more sane. llvm-svn: 173399
* Avoid creating duplicate CFG edges in the IfConversion pass.Jakob Stoklund Olesen2013-01-241-1/+1
| | | | | | Patch by Stefan Hepp. llvm-svn: 173395
* MachineScheduler: enable biasCriticalPath for all DAGs.Andrew Trick2013-01-241-0/+4
| | | | llvm-svn: 173318
* MIsched: Added biasCriticalPath.Andrew Trick2013-01-241-0/+15
| | | | | | | Allow schedulers to order DAG edges by critical path. This makes DFS-based heuristics more stable and effective. llvm-svn: 173317
* Add the heuristic to differentiate SSPStrong from SSPRequired.Bill Wendling2013-01-231-23/+103
| | | | | | | | | | | | | | | | | | The requirements of the strong heuristic are: * A Protector is required for functions which contain an array, regardless of type or length. * A Protector is required for functions which contain a structure/union which contains an array, regardless of type or length. Note, there is no limit to the depth of nesting. * A protector is required when the address of a local variable (i.e., stack based variable) is exposed. (E.g., such as through a local whose address is taken as part of the RHS of an assignment or a local whose address is taken as part of a function argument.) llvm-svn: 173231
* Add the IR attribute 'sspstrong'.Bill Wendling2013-01-231-0/+6
| | | | | | | | | | | | | | | | | | | | | SSPStrong applies a heuristic to insert stack protectors in these situations: * A Protector is required for functions which contain an array, regardless of type or length. * A Protector is required for functions which contain a structure/union which contains an array, regardless of type or length. Note, there is no limit to the depth of nesting. * A protector is required when the address of a local variable (i.e., stack based variable) is exposed. (E.g., such as through a local whose address is taken as part of the RHS of an assignment or a local whose address is taken as part of a function argument.) This patch implements the SSPString attribute to be equivalent to SSPRequired. This will change in a subsequent patch. llvm-svn: 173230
* Make APFloat constructor require explicit semantics.Tim Northover2013-01-225-42/+29
| | | | | | | | | Previously we tried to infer it from the bit width size, with an added IsIEEE argument for the PPC/IEEE 128-bit case, which had a default value. This default value allowed bugs to creep in, where it was inappropriate. llvm-svn: 173138
* Introduce a new data structure, the SparseMultiSet, and changes to the MI ↵Michael Ilseman2013-01-211-45/+33
| | | | | | | | scheduler to use it. A SparseMultiSet adds multiset behavior to SparseSet, while retaining SparseSet's desirable properties. Essentially, SparseMultiSet provides multiset behavior by storing its dense data in doubly linked lists that are inlined into the dense vector. This allows it to provide good data locality as well as vector-like constant-time clear() and fast constant time find(), insert(), and erase(). It also allows SparseMultiSet to have a builtin recycler rather than keeping SparseSet's behavior of always swapping upon removal, which allows it to preserve more iterators. It's often a better alternative to a SparseSet of a growable container or vector-of-vector. llvm-svn: 173064
* Revert 172708.Nadav Rotem2013-01-202-14/+8
| | | | | | | | | The optimization handles esoteric cases but adds a lot of complexity both to the X86 backend and to other backends. This optimization disables an important canonicalization of chains of SEXT nodes and makes SEXT and ZEXT asymmetrical. Disabling the canonicalization of consecutive SEXT nodes into a single node disables other DAG optimizations that assume that there is only one SEXT node. The AVX mask optimizations is one example. Additionally this optimization does not update the cost model. llvm-svn: 172968
* The last of PR14471 - emission of constant floatsDavid Blaikie2013-01-202-4/+19
| | | | llvm-svn: 172941
* Split out DW_OP_addr for the split debug info DWARF5 proposal.Eric Christopher2013-01-182-6/+23
| | | | llvm-svn: 172857
* Use AttributeSet accessor methods instead of Attribute accessor methods.Bill Wendling2013-01-181-4/+4
| | | | | | | Further encapsulation of the Attribute object. Don't allow direct access to the Attribute object as an aggregate. llvm-svn: 172853
* Remove unused parameter. Also use the AttributeSet query methods instead of ↵Bill Wendling2013-01-182-9/+9
| | | | | | the Attribute query methods. llvm-svn: 172852
* [MC/Mach-O] Implement integrated assembler support for linker options.Daniel Dunbar2013-01-181-7/+26
| | | | | | - Also, fixup syntax errors in LangRef and missing newline in the MCAsmStreamer. llvm-svn: 172837
* Optimization for the following SIGN_EXTEND pairs:Elena Demikhovsky2013-01-172-8/+14
| | | | | | | | | | | | v8i8 -> v8i64, v8i8 -> v8i32, v4i8 -> v4i64, v4i16 -> v4i64 for AVX and AVX2. Bug 14865. llvm-svn: 172708
* Fix the assembly and dissassembly of DW_FORM_sec_offset. Found this byEric Christopher2013-01-172-4/+7
| | | | | | | | | changing both the string of the dwo_name to be correct and the type of the statement list. Testcases all around. llvm-svn: 172699
* Add the DW_AT_GNU_addr_base for the skeleton cu. Add support forEric Christopher2013-01-172-1/+7
| | | | | | | emitting the dwarf32 version of DW_FORM_sec_offset and correct disassembler support. llvm-svn: 172698
* Move MachineTraceMetrics.h into include/llvm/CodeGen.Jakob Stoklund Olesen2013-01-174-354/+3
| | | | | | Let targets use it. llvm-svn: 172688
* Provide a place for targets to insert ILP optimization passes.Jakob Stoklund Olesen2013-01-171-4/+6
| | | | | | | | | | | | | | Move the early if-conversion pass into this group. ILP optimizations usually need to find the right balance between register pressure and ILP using the MachineTraceMetrics analysis to identify critical paths and estimate other costs. Such passes should run together so they can share dominator tree and loop info analyses. Besides if-conversion, future passes to run here here could include expression height reduction and ARM's MLxExpansion pass. llvm-svn: 172687
* Define metadata interfaces for describing a static data memberEric Christopher2013-01-162-43/+100
| | | | | | | | | | | of a class. Emit static data member declarations and definitions through correctly. Part of PR14471. Patch by Paul Robinson! llvm-svn: 172590
* Split address information for DWARF5 split dwarf proposal. This involvesEric Christopher2013-01-155-23/+114
| | | | | | | | | | | | | | | using the DW_FORM_GNU_addr_index and a separate .debug_addr section which stays in the executable and is fully linked. Sneak in two other small changes: a) Print out the debug_str_offsets.dwo section. b) Change form we're expecting the entries in the debug_str_offsets.dwo section to take from ULEB128 to U32. Add tests for all of this in the fission-cu.ll test. llvm-svn: 172578
* This patch addresses an incorrect transformation in the DAG combiner.Bill Schmidt2013-01-141-5/+15
| | | | | | | | | | | | | | | | | | | | | | The included test case is derived from one of the GCC compatibility tests. The problem arises after the selection DAG has been converted to type-legalized form. The combiner first sees a 64-bit load that can be converted into a pre-increment form. The original load feeds into a SRL that isolates the upper 32 bits of the loaded doubleword. This looks like an opportunity for DAGCombiner::ReduceLoadWidth() to replace the 64-bit load with a 32-bit load. However, this transformation is not valid, as the replacement load is not a pre-increment load. The pre-increment load produces an extra result, which feeds a subsequent add instruction. The replacement load only has one result value, and this value is propagated to all uses of the pre- increment load, including the add. Because the add is looking for the second result value as its operand, it ends up attempting to add a constant to a token chain, resulting in a crash. So the patch simply disables this transformation for any load with more than two result values. llvm-svn: 172480
* When lowering an inreg sext first shift left, then right arithmetically.Benjamin Kramer2013-01-121-3/+3
| | | | | | | Shifting right two times will only yield zero. Should fix SingleSource/UnitTests/SignlessTypes/factor. llvm-svn: 172322
* Limit the search space in RAGreedy::tryEvict().Jakob Stoklund Olesen2013-01-122-1/+33
| | | | | | | When tryEvict() is looking for a cheaper register in the allocation order, skip the tail of too expensive registers when possible. llvm-svn: 172281
* Precompute some information about register costs.Jakob Stoklund Olesen2013-01-121-2/+22
| | | | | | | | | | | Remember the minimum cost of the registers in an allocation order and the number of registers at the end of the allocation order that have the same cost per use. This information can be used to limit the search space for RAGreedy::tryEvict() when looking for a cheaper register. llvm-svn: 172280
* PPC: Implement efficient lowering of sign_extend_inreg.Nadav Rotem2013-01-111-1/+25
| | | | llvm-svn: 172269
* Remove some accidentaly duplicated code. This needs urgent cleanup :(Benjamin Kramer2013-01-111-270/+0
| | | | llvm-svn: 172248
* Split TargetLowering into a CodeGen and a SelectionDAG part.Benjamin Kramer2013-01-1110-992/+1301
| | | | | | | | | This fixes some of the cycles between libCodeGen and libSelectionDAG. It's still a complete mess but as long as the edges consist of virtual call it doesn't cause breakage. BasicTTI did static calls and thus broke some build configurations. llvm-svn: 172246
* ARM Cost Model: Modify the target independent cost model to askNadav Rotem2013-01-111-12/+21
| | | | | | | | the target if it supports the different CAST types. We didn't do this on X86 because of the different register sizes and types, but on ARM this makes sense. llvm-svn: 172245
* For inline asm:Eric Christopher2013-01-113-4/+18
| | | | | | | | | | | - recognize string "{memory}" in the MI generation - mark as mayload/maystore when there's a memory clobber constraint. PR14859. Patch by Krzysztof Parzyszek llvm-svn: 172228
* Follow-up typo correction from building the wrong branch.Andrew Trick2013-01-111-2/+2
| | | | llvm-svn: 172224
* Fix typo from r170452. Affects -enable-misched heuristics.Andrew Trick2013-01-111-2/+2
| | | | llvm-svn: 172223
* Simplify writing floating types to assembly.Tim Northover2013-01-111-74/+32
| | | | | | | This removes previous special cases for each floating-point type in favour of a shared codepath. llvm-svn: 172189
* PR14896: Handle memcpy from constant string where the memcpy size is larger ↵Evan Cheng2013-01-101-2/+3
| | | | | | than the string size. llvm-svn: 172124
* Remove unneeded includes from FunctionLoweringInfo.h.Jakub Staszak2013-01-101-1/+1
| | | | llvm-svn: 172123
* Allow hasProperty() to be called on bundle-internal instructions.Jakob Stoklund Olesen2013-01-101-0/+1
| | | | | | | | | | | | | When calling hasProperty() on an instruction inside a bundle, it should always behave as if IgnoreBundle was passed, and just return properties for the current instruction. Only attempt to aggregate bundle properties whan asked about the bundle header. The assertion fires on existing ARM test cases without this fix. llvm-svn: 172082
* Support headerless bundles in MachineInstr::hasProperty().Jakob Stoklund Olesen2013-01-101-7/+5
| | | | | | This function can still work without a BUNDLE header instruction. llvm-svn: 172029
* Stack Alignment: throw error if we can't satisfy the minimal alignmentManman Ren2013-01-103-20/+34
| | | | | | | | | | | | | | | | | | requirement when creating stack objects in MachineFrameInfo. Add CreateStackObjectWithMinAlign to throw error when the minimal alignment can't be achieved and to clamp the alignment when the preferred alignment can't be achieved. Same is true for CreateVariableSizedObject. Will not emit error in CreateSpillStackObject or CreateStackObject. As long as callers of CreateStackObject do not assume the object will be aligned at the requested alignment, we should not have miscompile since later optimizations which look at the object's alignment will have the correct information. rdar://12713765 llvm-svn: 172027
* ARM Cost model: Use the size of vector registers and widest vectorizable ↵Nadav Rotem2013-01-091-0/+5
| | | | | | instruction to determine the max vectorization factor. llvm-svn: 172010
* Fix a DAG combine bug visitBRCOND() is transforming br(xor(x, y)) to br(x != y).Evan Cheng2013-01-091-12/+18
| | | | | | | | | It cahced XOR's operands before calling visitXOR() but failed to update the operands when visitXOR changed the XOR node. rdar://12968664 llvm-svn: 171999
* Don't print bundle flags.Jakob Stoklund Olesen2013-01-091-1/+2
| | | | | | | The bundle flags are used by MachineBasicBlock::print(), they don't need to clutter up individual MachineInstrs. llvm-svn: 171986
* Don't require BUNDLE headers in MachineInstr::getBundleSize().Jakob Stoklund Olesen2013-01-091-10/+5
| | | | | | | | It is possible to build MI bundles that don't begin with a BUNDLE header. Add support for such bundles, counting all instructions inside the bundle. llvm-svn: 171985
* Fix a typo in MachineInstr::unbundleFromSucc() method.Sergei Larin2013-01-091-1/+1
| | | | llvm-svn: 171983
* Refactor to expose RTLIB calls to targets.Tim Northover2013-01-096-337/+367
| | | | | | | | | | fp128 is almost but not quite completely illegal as a type on AArch64. As a result it needs to have a register class (for argument passing mainly), but all operations need to be lowered to runtime calls. Currently there's no way for targets to do this (without duplicating code), as the relevant functions are hidden in SelectionDAG. This patch changes that. llvm-svn: 171971
* Last in the series of removing unnecessary '0' arguments forEric Christopher2013-01-094-8/+8
| | | | | | | address space. Reordered the EmitULEB128IntValue arguments to make this easier. llvm-svn: 171949
* MIsched: add an ILP window property to machine model.Andrew Trick2013-01-091-10/+2
| | | | | | | | | | This was an experimental option, but needs to be defined per-target. e.g. PPC A2 needs to aggressively hide latency. I converted some in-order scheduling tests to A2. Hal is working on more test cases. llvm-svn: 171946
* These functions have default arguments of 0 for the last arg. UseEric Christopher2013-01-093-5/+5
| | | | | | them. llvm-svn: 171933
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