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* rename selection directory and library to SelectionDAGChris Lattner2003-08-152-2/+2
| | | | llvm-svn: 7877
* Add a bunch of new node types, etcChris Lattner2003-08-152-12/+71
| | | | llvm-svn: 7875
* Factory methods for function passes now return type FunctionPass *.Brian Gaeke2003-08-142-2/+2
| | | | llvm-svn: 7839
* Factory methods for function passes now return type FunctionPass *.Brian Gaeke2003-08-141-5/+2
| | | | | | Get rid of RegisterLLC, which can't handle FunctionPasses anyway. llvm-svn: 7836
* Factory methods for FunctionPasses now return type FunctionPass *.Brian Gaeke2003-08-134-6/+6
| | | | llvm-svn: 7823
* Mapping directory no longer existsChris Lattner2003-08-131-1/+1
| | | | llvm-svn: 7801
* Obsolete fileChris Lattner2003-08-131-4/+0
| | | | llvm-svn: 7799
* For instructions in a delay slot of another instruction,Vikram S. Adve2003-08-121-12/+16
| | | | | | | | we no longer need to find the live-before set of the delayed branch since that set is now included the live-before/after set of the instructions in each delay slot. Just assert that instead. llvm-svn: 7796
* Build the SelectionDAG libraryChris Lattner2003-08-111-1/+1
| | | | llvm-svn: 7718
* Initial checkin of SelectionDAG implementation. This is still rough andChris Lattner2003-08-113-0/+332
| | | | | | unfinished llvm-svn: 7717
* Fix assertion in MachineInstr::substituteValue().Vikram S. Adve2003-08-071-2/+2
| | | | llvm-svn: 7675
* Use a new local data structure instead of the MachineInstr::regsUsed setChris Lattner2003-08-051-8/+7
| | | | llvm-svn: 7621
* Add a mapChris Lattner2003-08-051-0/+4
| | | | llvm-svn: 7620
* Minor cleanupsChris Lattner2003-08-051-23/+22
| | | | llvm-svn: 7619
* Physical registers no longer live in the regsUsed set for each machine instrChris Lattner2003-08-051-18/+30
| | | | llvm-svn: 7618
* Do not insert physical regsiters into the regsUsed setChris Lattner2003-08-051-3/+0
| | | | llvm-svn: 7617
* All callers of these methods actually wanted them to preserve the flags,Chris Lattner2003-08-051-26/+5
| | | | | | | | | so get rid of the def/use parameters that were getting passed in. **** This now changes the semantics of these methods to preserve the flags, not clobber them! llvm-svn: 7602
* Fix bugs handling ESP in alloca referencesChris Lattner2003-08-051-3/+6
| | | | llvm-svn: 7591
* Revert previous change, and be really anal about what physical registers can do.Chris Lattner2003-08-051-27/+19
| | | | llvm-svn: 7588
* Don't bother calculating info unless its needed. May reduce number of stack ↵Chris Lattner2003-08-041-4/+2
| | | | | | slots created. llvm-svn: 7584
* * Fix spelling of 'necessary'Chris Lattner2003-08-041-26/+61
| | | | | | | * Add a lot more DEBUG output, which is better structured than before * Fix bug: Jello/2003-08-04-PhysRegLiveFailure.llx llvm-svn: 7583
* Simplify code, eliminating the need for the X86 isVoid target instr flagChris Lattner2003-08-031-3/+4
| | | | llvm-svn: 7534
* Set debug typesChris Lattner2003-08-032-0/+2
| | | | llvm-svn: 7533
* Remove using declChris Lattner2003-08-031-3/+1
| | | | llvm-svn: 7531
* Wrap at 80 columnsChris Lattner2003-08-031-1/+2
| | | | llvm-svn: 7503
* Move DEBUG to Debug.hChris Lattner2003-08-012-1/+3
| | | | llvm-svn: 7497
* All constant-evaluation code now unified intoVikram S. Adve2003-07-291-31/+8
| | | | | | TargetInstrInfo::ConvertConstantToIntType(). llvm-svn: 7390
* 1. Bug fix: Don't use branch operand reg. as temp. reg. whenVikram S. Adve2003-07-291-81/+326
| | | | | | | | | | | spilling values used by an instruction in the delay slot of the branch (which will eventually be moved before the branch). 2. Bug fix: Delete the delay slot instr, not the branch instr, when moving delay slot instr. out!!!! 3. Move code to insert caller-saves moved here from SparcRegInfo: it is now machine-independent. llvm-svn: 7389
* Add const version of getLiveRangeForValue().Vikram S. Adve2003-07-291-4/+9
| | | | llvm-svn: 7386
* Code to insert caller-saves moved here from SparcRegInfo: it is nowVikram S. Adve2003-07-291-9/+22
| | | | | | | | | machine-independent. Fix problem with using branch operand reg. as temp. reg. when spilling values used by an instruction in the delay slot of the branch (which will eventually be moved before the branch). llvm-svn: 7385
* Making this code const-correct would be a pain, so I'll hack it.Chris Lattner2003-07-262-5/+6
| | | | llvm-svn: 7350
* Const correctness fixesChris Lattner2003-07-262-3/+3
| | | | llvm-svn: 7349
* Be const correctChris Lattner2003-07-261-2/+2
| | | | llvm-svn: 7348
* Hrm, another necesary one :(Chris Lattner2003-07-261-0/+1
| | | | llvm-svn: 7347
* Remove #includeChris Lattner2003-07-261-1/+0
| | | | llvm-svn: 7342
* Remove extraneous #includesChris Lattner2003-07-262-2/+1
| | | | llvm-svn: 7341
* (1) Change the way unused regs. are marked and found to consider regTypeVikram S. Adve2003-07-254-116/+134
| | | | | | | | | | | info (since multiple reg types may share the same reg class). (2) Remove machine-specific regalloc. methods that are no longer needed. In particular, arguments and return value from a call do not need machine-specific code for allocation. (3) Rename TargetRegInfo::getRegType variants to avoid unintentional overloading when an include file is omitted. llvm-svn: 7329
* Remove unused field. Change the way unused regs. are marked andVikram S. Adve2003-07-251-10/+11
| | | | | | | found to consider regType info (since multiple reg types may share the same reg class, e.g., single and double on Sparc). llvm-svn: 7327
* Remove unnecessary castsChris Lattner2003-07-231-2/+2
| | | | llvm-svn: 7250
* Random cleanupsChris Lattner2003-07-231-26/+18
| | | | llvm-svn: 7247
* Remove using declChris Lattner2003-07-231-7/+4
| | | | llvm-svn: 7246
* Values stored in CallArgsDescriptor cannot be const.Vikram S. Adve2003-07-101-2/+2
| | | | llvm-svn: 7156
* isMarkedForSpill() should be const.Vikram S. Adve2003-07-101-1/+1
| | | | llvm-svn: 7155
* Change interface to MachineInstr::substituteValue to specify more preciselyVikram S. Adve2003-07-101-7/+21
| | | | | | which args can be substituted: defsOnly, defsAndUses or usesOnly. llvm-svn: 7154
* Print out all neighbors in interference graph, not just higher-numbered ones.Vikram S. Adve2003-07-101-1/+1
| | | | llvm-svn: 7153
* Several fixes to handling of int CC register:Vikram S. Adve2003-07-101-8/+10
| | | | | | | | | | | | | | | | | | | | | (1) An int CC live range must be spilled if there are any interferences, even if no other "neighbour" in the interf. graph has been allocated that reg. yet. This is actually true of any class with only one reg! (2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must be spilled so that the machine-independent spill code doesn't have to make the machine-dependent decision of which CC name to use based on operand type: %xcc or %icc. (These are two halves of the same register.) (3) LR->isMarkedForSpill() is no longer the same as LR->hasColor(). These should never have been the same, and this is necessary now for #2. (4) All RDCCR and WRCCR instructions are directly generated with the phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to deal with this. llvm-svn: 7152
* Choose register instead of immediate for ConstantExpr in ChooseRegOrImmed.Vikram S. Adve2003-07-061-3/+4
| | | | llvm-svn: 7112
* Minor beautification: fold a couple of lines of code.Vikram S. Adve2003-07-021-3/+2
| | | | llvm-svn: 7054
* A def. operand of a machine instruction may be an ordinary Value*,Vikram S. Adve2003-07-021-13/+12
| | | | | | | | not just an Instruction*, at least in one unfortunate case: the first operand to the va_arg instruction. Modify ValueToDefVecMap to map from Value*, not Instruction*. llvm-svn: 7052
* Merged in autoconf branch. This provides configuration via the autoconfJohn Criswell2003-06-302-1/+2
| | | | | | system. llvm-svn: 7014
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