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This can't be just an assertion, users can always write impossible inline
assembly. Such an assembly statement should be included in the error message.
llvm-svn: 131024
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llvm-svn: 131022
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llvm-svn: 131015
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functionality change.
llvm-svn: 131012
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llvm-svn: 131008
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safely erased.
This should unbreak dragonegg-i386-linux and build-self-4-mingw32.
llvm-svn: 131007
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llvm-svn: 131001
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After a virtual register is split, update any debug user variables that resided
in the old register. This ensures that the LiveDebugVariables are still correct
after register allocation.
This may create DBG_VALUE instructions that place a user variable in a register
in parts of the function and in a stack slot in other parts. DwarfDebug
currently doesn't support that.
llvm-svn: 130998
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llvm-svn: 130997
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llvm-svn: 130996
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The post-ra scheduler was explicitly updating the depth of a node's
successors after scheduling it, regardless of whether the successor
was ready. This is quadratic for DAGs with transitively redundant
edges. I simply removed the useless update of depth, which is lazilly
computed later.
Fixes <rdar://problem/9044332> compiler takes way too long to build TextInput.
llvm-svn: 130992
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DwarfDebug.cpp to DwarfCompileUnit.cpp
llvm-svn: 130991
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llvm-svn: 130989
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llvm-svn: 130988
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llvm-svn: 130987
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llvm-svn: 130985
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llvm-svn: 130984
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possibly related to cbnz formation.
llvm-svn: 130977
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llvm-svn: 130964
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llvm-svn: 130959
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llvm-svn: 130955
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llvm-svn: 130947
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llvm-svn: 130944
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BuildSchedGraph was quadratic in the number of calls in the basic
block. After this fix, it keeps only a single call at the top of the
DefList so compile time doesn't blow up on large blocks. This reduces
postRA sched time on an external test case from 81s to 0.3s. Although
r130800 (reduced ARM register alias defs) also partially fixes the
issue by reducing the constant overhead of checking call interference
by an order of magnitude.
Fixes <rdar://problem/7662664> very poor compile time with post RA scheduling.
llvm-svn: 130943
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llvm-svn: 130942
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llvm-svn: 130934
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llvm-svn: 130933
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llvm-svn: 130931
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this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 .
llvm-svn: 130928
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functionality change intended.
llvm-svn: 130926
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llvm-svn: 130925
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who used this flag, and it now emits CFI and doesn't emit this anymore. All
other targets left this flag "false".
<rdar://problem/8486371>
llvm-svn: 130918
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Joining physregs is inherently dangerous because it uses a heuristic to avoid
creating invalid code. Linear scan had an emergency spilling mechanism to deal
with those rare cases. The new greedy allocator does not.
The greedy register allocator is much better at taking hints, so this has almost
no impact on code size and quality. The few cases where it matters show up as
unit tests that now have -join-physregs enabled explicitly.
llvm-svn: 130896
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landing pad as its successor.
SjLj exception handling jumps to the correct landing pad via a switch statement
that's generated right before code-gen. Loosen the constraint in the machine
instruction verifier to allow for this. Note, this isn't the most rigorous check
since we cannot determine where that switch statement came from. But it's
marginally better than turning this check off when SjLj exceptions are used.
<rdar://problem/9187612>
llvm-svn: 130881
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edge in some cases.
Original message:
Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
llvm-svn: 130877
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llvm-svn: 130867
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allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
llvm-svn: 130862
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it is both inefficient and unexpected by dwarfdump. Change to
a DW_FORM_data4.
While in here, change the predicate name to reflect that the position
is not really absolute (it is an offset), just that the linker needs a
relocation.
llvm-svn: 130846
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Physreg joining is still on by default, but I will turn it off shortly.
llvm-svn: 130844
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fixes dwarf-die2.c test case from gcc test suite.
llvm-svn: 130842
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DW_AT_MIPS_linkage_name. This helps gdb and fixes var-path-expr.exp regression reported by gdb testsuite.
llvm-svn: 130794
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Register coalescing can sometimes create live ranges that end in the middle of a
basic block without any killing instruction. When SplitKit detects this, it will
repair the live range by shrinking it to its uses.
Live range splitting also needs to know about this. When the range shrinks so
much that it becomes allocatable, live range splitting fails because it can't
find a good split point. It is paranoid about making progress, so an allocatable
range is considered an error.
The coalescer should really not be creating these bad live ranges. They appear
when coalescing dead copies.
llvm-svn: 130787
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does it now) then use them directly. This saves one scan of entire module, to collect debug info, which in turns saves few machine cycles at compile time.
llvm-svn: 130759
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pointer type for vector indices. Make the vector unrolling code respect that.
llvm-svn: 130733
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llvm-svn: 130718
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llvm-svn: 130715
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Def operands may also have an <undef> flag, but that just means that a
sub-register redef doesn't actually read the super-register. For physical
registers, it has no meaning.
llvm-svn: 130714
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This works around a limitation in gdb which is reported by following inherit.exp test failures from gdb testsuite.
gdb.cp/inherit.exp: print g_vB.vB::vb
gdb.cp/inherit.exp: print g_vB.vB::vx
gdb.cp/inherit.exp: print g_vC.vC::vc
gdb.cp/inherit.exp: print g_vC.vC::vx
gdb.cp/inherit.exp: print g_vD.vB::vb
...
llvm-svn: 130702
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llvm-svn: 130692
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When an interfering live range ends at a dead slot index between two
instructions, make sure that the inserted copy instruction gets a slot index
after the dead ones. This makes it possible to avoid the interference.
Ideally, there shouldn't be interference ending at a deleted instruction, but
physical register coalescing can sometimes do that to sub-registers.
This fixes PR9823.
llvm-svn: 130687
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