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* Fix some bugs in HMEditor's moveAllOperandsInto logic.Lang Hames2012-02-211-9/+10
| | | | llvm-svn: 151006
* Fix machine-cp by having it to check sub-register indicies. e.g.Evan Cheng2012-02-202-3/+27
| | | | | | | | | | | | ecx = mov eax al = mov ch The second copy is not a nop because the sub-indices of ecx,ch is not the same of that of eax/al. Re-enabled machine-cp. PR11940 llvm-svn: 151002
* Teach the DAGCombiner that certain loadext nodes followed by ANDs can be ↵James Molloy2012-02-201-0/+82
| | | | | | converted to zeroexts. llvm-svn: 150957
* Make post-ra tail duplication bundle safe. No test case as recent codegenEvan Cheng2012-02-201-3/+6
| | | | | | flow changes have already hidden the bug. rdar://10893812 llvm-svn: 150949
* Silence operator precedence warning.Benjamin Kramer2012-02-191-1/+1
| | | | llvm-svn: 150921
* Remove dead code. Improve llvm_unreachable text. Simplify some control flow.Ahmed Charles2012-02-192-2/+1
| | | | llvm-svn: 150918
* Add machinery for pushing live ranges onto bundle starts while bundling.Lang Hames2012-02-191-2/+207
| | | | llvm-svn: 150915
* Simplify moveEnteringDownFrom rules.Lang Hames2012-02-191-11/+3
| | | | llvm-svn: 150914
* Skip through instructions rather than operands when looking for last use slot.Lang Hames2012-02-191-1/+1
| | | | llvm-svn: 150912
* Fix TODO and trailing whitespace.Lang Hames2012-02-191-10/+14
| | | | llvm-svn: 150910
* Defer sanity checks on live intervals until after all have been updated. ↵Lang Hames2012-02-191-171/+170
| | | | | | Hold (LiveInterval, LiveRange) pairs to update, rather than vregs. llvm-svn: 150909
* Bring HMEditor into line with LLVM coding standards.Lang Hames2012-02-171-160/+163
| | | | llvm-svn: 150851
* Ignore the lifetime intrinsics in fast-isel.Eric Christopher2012-02-171-0/+4
| | | | llvm-svn: 150848
* Don't print out pointer values in SUnit::dump().Jakob Stoklund Olesen2012-02-171-5/+3
| | | | llvm-svn: 150842
* Sink variable into assertMatt Beaumont-Gay2012-02-171-2/+2
| | | | llvm-svn: 150841
* Add support for regmask slots to HMEditor. Also fixes a comment error.Lang Hames2012-02-171-3/+17
| | | | llvm-svn: 150840
* Transfer regmasks to MRI.Jakob Stoklund Olesen2012-02-173-13/+7
| | | | | | | | | MRI keeps track of which physregs have been used. Make sure it gets updated with all the regmask-clobbered registers. Delete the closePhysRegsUsed() function which isn't necessary. llvm-svn: 150830
* Refactor 'handleMove' code in live intervals. Clients of LiveIntervals won't seeLang Hames2012-02-171-211/+245
| | | | | | | | | any changes. Internally this adds a private inner class HMEditor, to LiveIntervals. HMEditor provides an API for updating live intervals when code is moved or bundled. llvm-svn: 150826
* Tidy up.Jim Grosbach2012-02-173-5/+6
| | | | llvm-svn: 150820
* Revert r150288, "Allow Post-RA LICM to hoist reserved register reads."Jakob Stoklund Olesen2012-02-171-11/+0
| | | | | | | | | | This caused miscompilations on out-of-tree targets, and possibly i386 as well. I'll find some other way of hoisting %rip-relative loads from loops containing calls. llvm-svn: 150816
* ... and it's probably best to use the correct alignment, rather than just ↵David Chisnall2012-02-171-1/+1
| | | | | | guessing that it's the same as the size. llvm-svn: 150813
* It turns out that putting an 8-byte symbol in a 4-byte section makes Solaris ↵David Chisnall2012-02-171-3/+3
| | | | | | | | | ld sulk. GNU ld is perfectly happy with it, which is worrying for a whole other set of reasons... Thanks to Anton, Duncan and Rafael for helping me track this down. Pointy hat to Rafael for introducing the bug in the first place. llvm-svn: 150811
* Reverse iterator - should be incrementing rather than decrementing.Lang Hames2012-02-171-2/+2
| | | | llvm-svn: 150778
* MachineScheduler shouldn't use/preserve LiveDebugVariables.Lang Hames2012-02-171-4/+0
| | | | llvm-svn: 150773
* Oops - isRegLiveIntoSuccessor is used in non-assert builds now. Remove ↵Lang Hames2012-02-171-2/+0
| | | | | | NDEBUG guards. llvm-svn: 150771
* Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE ↵Lang Hames2012-02-171-3/+9
| | | | | | bail on reserved registers. This *should* be safe as of r150786. llvm-svn: 150769
* Turn off assertion, conservatively compute liveness for live-in ↵Lang Hames2012-02-171-8/+10
| | | | | | un-allocatable registers. llvm-svn: 150768
* Disable machine copy propagation for now. It's known to be buggy (PR11940) ↵Benjamin Kramer2012-02-161-1/+1
| | | | | | and introduces subtle miscompiles in many places. llvm-svn: 150703
* Remove extraneous #include and spelling mistake introduced in r150669.James Molloy2012-02-161-2/+1
| | | | llvm-svn: 150670
* Modify the algorithm when traversing the DAGCombiner's worklist to be O(log ↵James Molloy2012-02-161-13/+36
| | | | | | N) for all operations. This fixes a horrible worst case with lots of nodes where 99% of the time was being spent in std::remove. llvm-svn: 150669
* Oop - r150653 + r150654 broke one of my test cases. Backing out for now...Lang Hames2012-02-161-9/+3
| | | | llvm-svn: 150655
* MachineCSE shouldn't extend the live ranges of reserved or allocatable ↵Lang Hames2012-02-161-3/+9
| | | | | | registers. llvm-svn: 150653
* Handle register masks in branch folding.Jakob Stoklund Olesen2012-02-151-0/+8
| | | | | | | Don't attempt to move instructions with regmask operands. They are most likely calls anyway. llvm-svn: 150634
* Fix library visibility problems with VLIWPacketizer.Andrew Trick2012-02-151-6/+19
| | | | | | The existing framework for postra scheduling is library local. We want to keep it that way. Soon we will have a more general MachineScheduler interface. At that time, various bits will be exposed to targets. In the meantime, the VLIWPacketizer wants to use ScheduleDAGInstrs directly, so it needs to wrapped in a PIMPL to avoid exposing it to the target interface. llvm-svn: 150633
* Make LiveIntervals::handleMove() bundle aware.Lang Hames2012-02-152-4/+16
| | | | llvm-svn: 150630
* Use 'getDataNoRel' for the section kind.Bill Wendling2012-02-151-5/+4
| | | | llvm-svn: 150628
* Fix assertion condition.Lang Hames2012-02-151-1/+1
| | | | llvm-svn: 150627
* Modify the code that emits the module flags to use the new module flags accessorBill Wendling2012-02-152-38/+38
| | | | | | | | | method. This allows the target lowering code to not have to deal with MDNodes. Also, avoid leaking memory like a sieve by not creating a global variable for the image info section, but just emitting the code directly. llvm-svn: 150624
* Don't expose DefaultVLIWSchedulerAndrew Trick2012-02-151-1/+1
| | | | llvm-svn: 150619
* Remove overly conservative assert.Lang Hames2012-02-151-1/+0
| | | | llvm-svn: 150608
* Generic "VLIW" packetizer based on a DFA generated from target itinerary.Andrew Trick2012-02-151-0/+147
| | | | | | Patch by Sundeep! llvm-svn: 150607
* Revert r150565 again. Appears to be a stage2 failure with dragonegg.Andrew Trick2012-02-151-6/+8
| | | | | | I'll put MachineLICM back before PEI. All my arm/x86 benchmarks look good, but buildbots don't like it. llvm-svn: 150568
* Reapply r150565 with the typo fix properly merged.Andrew Trick2012-02-151-8/+6
| | | | llvm-svn: 150567
* reverting r150565. Premature push.Andrew Trick2012-02-151-6/+8
| | | | llvm-svn: 150566
* Move PostRAMachineLICM into MachineLateOptimization. It now runs after PEI!Andrew Trick2012-02-151-8/+6
| | | | llvm-svn: 150565
* Allow CodeGen (llc) command line options to work as expected.Andrew Trick2012-02-151-52/+114
| | | | | | | | | | | | | | | | | | | | | | | | The llc command line options for enabling/disabling passes are local to CodeGen/Passes.cpp. This patch associates those options with standard pass IDs so they work regardless of how the target configures the passes. A target has two ways of overriding standard passes: 1) Redefine the pass pipeline (override TargetPassConfig::add%Stage) 2) Replace or suppress individiual passes with TargetPassConfig::substitutePass. In both cases, the command line options associated with the pass override the target default. For example, say a target wants to disable machine instruction scheduling by default: - The target calls disablePass(MachineSchedulerID) but otherwise does not override any TargetPassConfig methods. - Without any llc options, no scheduler is run. - With -enable-misched, the standard machine scheduler is run and honors the -misched=... flag to select the scheduler variant, which may be used for performance evaluation or testing. Sorry overridePass is ugly. I haven't thought of a better way without replacing the cl::opt framework. I hope to do that one day... I haven't figured out why CodeGen uses char& for pass IDs. AnalysisID is much easier to use and less bug prone. I'm using it wherever I can for internal implementation. Maybe later we can change the global pass ID definitions as well. llvm-svn: 150563
* Added TargetPassConfig::disablePass/substitutePass as a general mechanism to ↵Andrew Trick2012-02-151-6/+42
| | | | | | override specific passes. llvm-svn: 150562
* Don't emit live ranges for physregs live-ins that are dead.Lang Hames2012-02-151-2/+3
| | | | llvm-svn: 150553
* Disentangle moving a machine instr from updating LiveIntervals.Lang Hames2012-02-152-13/+9
| | | | llvm-svn: 150552
* Added hook to let targets custom lower splitting of illegal vectorsPete Cooper2012-02-151-0/+4
| | | | llvm-svn: 150550
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