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* Revert Chris' commits up to r149348 that started causing VMCoreTests unit ↵Argyrios Kyrtzidis2012-02-012-20/+30
| | | | | | | | | | | | | | | | | | | test to fail. These are: r149348 r149351 r149352 r149354 r149356 r149357 r149361 r149362 r149364 r149365 llvm-svn: 149470
* Obvious unnecessary loop removal. Follow through from previous checkin.Andrew Trick2012-01-311-11/+10
| | | | llvm-svn: 149398
* with recent changes, ConstantArray is never a "string". Remove the associatedChris Lattner2012-01-311-23/+10
| | | | | | methods and constant fold the clients to false. llvm-svn: 149362
* RAFast: Generalize the logic for return operands.Andrew Trick2012-01-311-20/+59
| | | | | | | | This removes implicit assumption about the form of MI coming into regalloc. In particular, it should be independent of ProcessImplicitDefs which will eventually become a standard part of coming out of SSA--unless we simply can eliminate IMPLICIT_DEF completely. Current unit tests expose this once I remove incidental pass ordering restrictions. This is not a final fix. Just a temporary workaround until I figure out the right way. llvm-svn: 149360
* remove the last vestiges of llvm::GetConstantStringInfo, in CodeGen.Chris Lattner2012-01-311-7/+4
| | | | llvm-svn: 149356
* rework this logic to not depend on the last argument to GetConstantStringInfo,Chris Lattner2012-01-311-4/+10
| | | | | | which is going away. llvm-svn: 149348
* don't emit a 1-byte object as a .fill. This is silly and causesChris Lattner2012-01-311-1/+3
| | | | | | CodeGen/X86/global-sections.ll to fail with CDArray llvm-svn: 149343
* Remove the now-dead llvm.eh.exception and llvm.eh.selector intrinsics.Bill Wendling2012-01-313-96/+0
| | | | llvm-svn: 149331
* Remove the eh.exception and eh.selector intrinsics. Also remove a hack to copyBill Wendling2012-01-312-53/+0
| | | | | | | over the catch information. The catch information is now tacked to the invoke instruction. llvm-svn: 149326
* Use the correct ShiftAmtTy for creating shifts after legalization. PR11881. ↵Eli Friedman2012-01-311-7/+9
| | | | | | Not committing a testcase because I think it will be too fragile. llvm-svn: 149315
* Chris's constant data sequence refactoring actually enabled printingChandler Carruth2012-01-301-1/+1
| | | | | | | | | | | | | | | | vectors of all one bits to be printed more cleverly in the AsmPrinter. Unfortunately, the byte value for all one bits is the same with -fsigned-char as the error return of '-1'. Force this to be the unsigned byte value when returning it to avoid this problem, and update the test case for the shiny new behavior. Yay for building LLVM and Clang with -funsigned-char. Chris, please review, and let me know if there is any reason to not desire this change. It seems good on the surface, and certainly intended based on the code written. llvm-svn: 149299
* Here's a new one: GCC was complaining about an only-used-in-assertsMatt Beaumont-Gay2012-01-301-2/+2
| | | | | | *function*. Wrap the function in #ifndef NDEBUG. llvm-svn: 149259
* when verbose asm is on, print integers in ConstantDataSequentials justChris Lattner2012-01-301-0/+3
| | | | | | like normal integers. llvm-svn: 149223
* don't lose tail padding on ConstantDataAggregate vec3's.Chris Lattner2012-01-301-21/+24
| | | | llvm-svn: 149222
* Fix some scavenger performance issues.Jakob Stoklund Olesen2012-01-291-20/+8
| | | | | | | | | | | | | - Don't call malloc+free in the very hot forward(). - Don't call isTiedToDefOperand(). - Don't create BitVector temporaries. - Merge DeadRegs into KillRegs. - Eliminate the early clobber checks, they were irrelevant to scavenging. - Remove unnecessary code from -Asserts builds. This speeds up ARM PEI by 3.4x and overall llc -O0 codegen time by 11%. llvm-svn: 149189
* Avoid creating BitVector temporaries.Jakob Stoklund Olesen2012-01-291-7/+7
| | | | llvm-svn: 149188
* Reapply r149159 with a fix to add to a PHI node with a non-null parent.Bill Wendling2012-01-281-34/+64
| | | | llvm-svn: 149164
* Remove code that adds live ranges for dead defs. It seems to be breaking things.Lang Hames2012-01-281-24/+0
| | | | llvm-svn: 149163
* Revert r149159 until I can fix tests.Bill Wendling2012-01-281-61/+32
| | | | llvm-svn: 149162
* Don't always create a separate block for the call to _Unwind_Resume.Bill Wendling2012-01-281-32/+61
| | | | | | | | | | | Sometimes there is only one 'resume' instruction per function. In those situations, we don't need a separate block for the call to _Unwind_Resume. In fact, it adds a lot of overhead to code-gen if we do that -- especially at -O0. If we have a single 'resume' instruction, just generate the call within that block. <rdar://problem/10694814> llvm-svn: 149159
* Silence warning about parens for && within ||Lang Hames2012-01-271-1/+1
| | | | llvm-svn: 149152
* Add a "moveInstr" method to LiveIntervals. This can be used to move instructionsLang Hames2012-01-273-1/+229
| | | | | | | | | around within a basic block while maintaining live-intervals. Updated ScheduleTopDownLive in MachineScheduler.cpp to use the moveInstr API when reordering MIs. llvm-svn: 149147
* Backing out ill-considered 'refactor'.Lang Hames2012-01-271-39/+53
| | | | llvm-svn: 149146
* Move some duplicate loops in the coalescer into their own function.Lang Hames2012-01-271-53/+39
| | | | llvm-svn: 149144
* Physreg dead defs should be handled too.Lang Hames2012-01-271-1/+1
| | | | llvm-svn: 149118
* continue making the world safe for ConstantDataVector. At this point,Chris Lattner2012-01-271-1/+1
| | | | | | | we should (theoretically optimize and codegen ConstantDataVector as well as ConstantVector. llvm-svn: 149116
* Place the GEP instructions nearer to the instructions which use them.Bill Wendling2012-01-271-37/+36
| | | | | | | | | | | GEP instructions are there for the compiler and shouldn't really output much code (if any at all). When a GEP is stored in the entry block, Fast ISel (for one) will not know that it could fold it into further uses. For instance, inside of the EH handling code. This results in a lot of unnecessary spills and loads which bloat code and slows down pretty much everything. <rdar://problem/10694814> llvm-svn: 149114
* make sure the file's matching header is #include'd first.Chris Lattner2012-01-271-3/+1
| | | | llvm-svn: 149113
* Rewrite CanShareConstantPoolEntry to be implemented in terms of theChris Lattner2012-01-271-26/+26
| | | | | | | | mid-level constant folding APIs instead of doing its own analysis. This makes it more general (e.g. can now share a <2 x i64> with a <4 x i32>) and avoid duplicating a bunch of logic. llvm-svn: 149111
* Rewrite instruction operands in AdjustCopiesBackFrom. Fixes PR11861.Lang Hames2012-01-271-4/+6
| | | | llvm-svn: 149097
* progress making the world safe to ConstantDataVector. WhileChris Lattner2012-01-261-1/+4
| | | | | | | | we're at it, allow PatternMatch's "neg" pattern to match integer vector negations, and enhance ComputeNumSigned bits to handle shl of vectors. llvm-svn: 149082
* tidy up forward declarations.Chris Lattner2012-01-261-0/+2
| | | | llvm-svn: 149078
* Update comment for r149070.Chad Rosier2012-01-261-3/+1
| | | | llvm-svn: 149075
* Replace the use of isPredicable() with isPredicated() inChad Rosier2012-01-261-3/+2
| | | | | | | | | MachineBasicBlock::canFallThrough(). We're interested in the state of the instruction (i.e., is this a barrier or not?), not if the instruction is predicable or not. rdar://10501092 llvm-svn: 149070
* Clear kill flags before propagating a copy.Jakob Stoklund Olesen2012-01-262-1/+20
| | | | | | | | | | The live range of the source register may be extended when a redundant copy is eliminated. Make sure any kill flags between the two copies are cleared. This fixes PR11765. llvm-svn: 149069
* Add support for the R_ARM_TARGET1 relocation, which should be given to ↵James Molloy2012-01-261-1/+1
| | | | | | | | relocations applied to all C++ constructors and destructors. This enables the linker to match concrete relocation types (absolute or relative) with whatever library or C++ support code is being linked against. llvm-svn: 149057
* eliminate the Constant::getVectorElements method. There are better (andChris Lattner2012-01-261-13/+4
| | | | | | | more robust) ways to do what it was doing now. Also, add static methods for decoding a ShuffleVector mask. llvm-svn: 149028
* Improve sub-register def handling in ProcessImplicitDefs.Jakob Stoklund Olesen2012-01-251-9/+10
| | | | | | | | | This boils down to using MachineOperand::readsReg() more. This fixes PR11829 where a use ended up after the first def when lowering REG_SEQUENCE instructions involving IMPLICIT_DEFs. llvm-svn: 148996
* Properly emit ctors / dtors with priorities into desired sectionsAnton Korobeynikov2012-01-252-22/+43
| | | | | | | | and let linker handle the rest. This finally fixes PR5329 llvm-svn: 148990
* Don't add live ranges for aliases of physregs that are live in to theLang Hames2012-01-251-5/+0
| | | | | | | | function. They don't appear to be used, and are inconsistent with handling of other physreg intervals (i.e. intervals that are not live-in) where ranges are not inserted for aliases. llvm-svn: 148986
* Always break upon finding a vreg operand (in Release as well as +Asserts). ↵Lang Hames2012-01-251-6/+1
| | | | | | Remove assertion which can no longer trigger. llvm-svn: 148984
* use ConstantVector::getSplat in a few places.Chris Lattner2012-01-251-1/+1
| | | | llvm-svn: 148929
* Use the right method to get the # elements in a CDS.Chris Lattner2012-01-252-4/+4
| | | | llvm-svn: 148897
* Set correct <def,undef> flags when lowering REG_SEQUENCE.Jakob Stoklund Olesen2012-01-241-0/+46
| | | | | | | | | | | | | | | | | | | | A REG_SEQUENCE instruction is lowered into a sequence of partial defs: %vreg7:ssub_0<def,undef> = COPY %vreg20:ssub_0 %vreg7:ssub_1<def> = COPY %vreg2 %vreg7:ssub_2<def> = COPY %vreg2 %vreg7:ssub_3<def> = COPY %vreg2 The first def needs an <undef> flag to indicate it is the beginning of the live range, while the other defs are read-modify-write. Previously, we depended on LiveIntervalAnalysis to notice and fix the missing <def,undef>, but that solution was never robust, it was causing problems with ProcessImplicitDefs and the lowering of chained REG_SEQUENCE instructions. This fixes PR11841. llvm-svn: 148879
* Use the standard MachineFunction::print() after SlotIndexes.Jakob Stoklund Olesen2012-01-241-1/+1
| | | | llvm-svn: 148878
* Fix old doxygen comment.Jakob Stoklund Olesen2012-01-241-2/+1
| | | | llvm-svn: 148825
* add more support for ConstantDataSequentialChris Lattner2012-01-241-2/+19
| | | | llvm-svn: 148802
* An option to selectively enable part of ARM EHABI support.Evgeniy Stepanov2012-01-241-5/+14
| | | | | | | | This change adds an new option --arm-enable-ehabi-descriptors that enables emitting unwinding descriptors. This provides a mode with a working backtrace() without the (currently broken) exception support. llvm-svn: 148800
* Bit pack DIE structures better.Benjamin Kramer2012-01-241-23/+23
| | | | | | 16 bits are sufficient to store attributes, tags and forms. llvm-svn: 148799
* Remove generation of DW_AT_sibling. Nothing as far as I can tell uses it.Eric Christopher2012-01-243-26/+0
| | | | | | | | Saves about 1.5% on debug info size. rdar://10278198 llvm-svn: 148794
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