| Commit message (Collapse) | Author | Age | Files | Lines |
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Emit such ranges using DW_AT_ranges.
This patch fixes bug (PR6894) introduced by previous version of this patch.
llvm-svn: 102454
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llvm-svn: 102453
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should fix some "g++.dg-struct-layout-1" failures,
rdar://7886017
llvm-svn: 102421
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of the dbg testsuite regressions. I don't think this is
really the right fix; this change exposed an existing problem
upstream somewhere.
llvm-svn: 102410
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llvm-svn: 102401
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otherwise labels get incorrectly merged. We handled this by emitting a
".byte 0", but this isn't correct on thumb/arm targets where the text segment
needs to be a multiple of 2/4 bytes. Handle this by emitting a noop. This
is more gross than it should be because arm/ppc are not fully mc'ized yet.
This fixes rdar://7908505
llvm-svn: 102400
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to print the operand.
llvm-svn: 102395
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simplifies debug range entries.
llvm-svn: 102394
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llvm-svn: 102380
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produces a comment on targets that support it, but
the Dwarf writer is not hooked up yet.
llvm-svn: 102372
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function arguments).
llvm-svn: 102368
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alignment of globals with a specified alignment, we fix
common variables to obey their alignment. Add a comment
explaining why this behavior is important.
llvm-svn: 102365
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indices when the live interval are being re-materialized.
llvm-svn: 102361
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llvm-svn: 102359
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SSAUpdater. I'm going to try to refactor this to share most of the code
between them.
llvm-svn: 102353
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llvm-svn: 102327
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and rename it to emitFrameIndexDebugValue.
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.
llvm-svn: 102323
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form of DEBUG_VALUE, as it doesn't have reasonable default
behavior for unsupported targets. Add a new hook instead.
No functional change.
llvm-svn: 102320
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xs
llvm-svn: 102316
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preferred alignment unless they were common or some other special
case.
llvm-svn: 102300
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of extload result truncated.
llvm-svn: 102236
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testcase yet, as the testcase now fails downstream.
llvm-svn: 102228
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llvm-svn: 102202
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itself too.
llvm-svn: 102176
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because 102004 causes codegen to emit invalid assembly on at least
x86_64-unknown-gnu-linux.
llvm-svn: 102155
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llvm-svn: 102129
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into SelectionDAGBuilder itself.
llvm-svn: 102128
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llvm-svn: 102127
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and into SelectionDAGBuilder and FastISel.
llvm-svn: 102123
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- Some code refactoring.
llvm-svn: 102111
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llvm-svn: 102110
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FunctionLoweringInfo, as it isn't SelectionDAG-specific. This isn't
completely natural, as PHI node state is not per-function but rather
per-basic-block, however there's currently no other convenient
per-basic-block state to group it with.
llvm-svn: 102109
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llvm-svn: 102106
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llvm-svn: 102104
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llvm-svn: 102102
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This actually makes everything slower, but the plan is to have isel add <kill>
flags the way it is already adding <dead> flags. Then LiveVariables can be
removed again.
When ignoring the time spent in LiveVariables, -regalloc=fast is now twice as
fast as -regalloc=local.
llvm-svn: 102034
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llvm-svn: 102027
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option does not impact debug info generation and preservation through earlier compile starges.
llvm-svn: 102012
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So far this is just a clone of -regalloc=local that has been lobotomized to run
25% faster. It drops the least-recently-used calculations, and is just plain
stupid when it runs out of registers.
The plan is to make this go even faster for -O0 by taking advantage of the short
live intervals in unoptimized code. It should not be necessary to calculate
liveness when most virtual registers are killed 2-3 instructions after they are
born.
llvm-svn: 102006
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Emit such ranges using DW_AT_ranges.
llvm-svn: 102004
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optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181
llvm-svn: 101984
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llvm-svn: 101977
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llvm-svn: 101976
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SelectionDAG directory and into a new Analysis.cpp file.
llvm-svn: 101975
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extract_subreg / insert_subreg, etc.
- Add support for more aggressive insert_subreg coalescing.
llvm-svn: 101971
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llvm-svn: 101964
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CodeGen's ComputeMaskedBits was being over-conservative when computing
bits for an ADD.
llvm-svn: 101963
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user-defined operations that use MMX register types, but
the compiler shouldn't generate them on its own. This adds
a Synthesizable abstraction to represent this, and changes
the vector widening computation so it won't produce MMX types.
(The motivation is to remove noise from the ABI compatibility
part of the gcc test suite, which has some breakage right now.)
llvm-svn: 101951
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register is not killed in the loop.
This fixes 188.ammp on ARM where the post-ra scheduler would grab a register
that looked available but wasn't.
A testcase would be huge and fragile, sorry.
llvm-svn: 101930
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llvm-svn: 101914
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