summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
* [DWARF] Fix debug info generation for function static variables, typedefs, ↵Michael Kuperstein2015-07-016-35/+62
| | | | | | | | | | | | | | | and records Function static variables, typedefs and records (class, struct or union) declared inside a lexical scope were associated with the function as their parent scope, rather than the lexical scope they are defined or declared in. This fixes PR19238 Patch by: amjad.aboud@intel.com Differential Revision: http://reviews.llvm.org/D9758 llvm-svn: 241153
* [SEH] Add new intrinsics for recovering and restoring parent framesReid Kleckner2015-06-302-15/+26
| | | | | | | | | | | | | | | | | | | | | | | | | The incoming EBP value established by the runtime is actually a pointer to the end of the EH registration object, and not the true parent function frame pointer. Clang doesn't need llvm.x86.seh.exceptioninfo anymore because we know that the exception info pointer is at a fixed offset from this incoming EBP. The llvm.x86.seh.recoverfp intrinsic takes an EBP value provided by the EH runtime and returns a pointer that is usable with llvm.framerecover. The llvm.x86.seh.restoreframe intrinsic is inserted by the 32-bit specific preparation pass in blocks targetted by the EH runtime. It re-establishes any physical registers used by the parent function to address the stack, such as the frame, base, and stack pointers. Neither of these intrinsics correctly handle stack realignment prologues yet, but it's possible to add that later. Reviewers: majnemer Differential Revision: http://reviews.llvm.org/D10848 llvm-svn: 241125
* [FaultMaps] Let the frontend pre-select implicit null check candidates.Sanjoy Das2015-06-301-0/+7
| | | | | | | | | | | | | | | | | | Summary: This change introduces a !make.implicit metadata that allows the frontend to pre-select the set of explicit null checks that will be considered for transformation into implicit null checks. The reason for not using profiling data instead of !make.implicit is explained in the change to `FaultMaps.rst`. Reviewers: atrick, reames, pgavlin, JosephTremoulet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10824 llvm-svn: 241116
* COFF: Do not assign linker-weak symbols to selectany comdat sections.Peter Collingbourne2015-06-301-2/+0
| | | | | | | | | | | | | | It is mandatory to specify a comdat in order to receive comdat semantics for a symbol. We were previously getting this wrong in -function-sections mode; linker-weak symbols were being emitted in a selectany comdat. This change causes such symbols to use a noduplicates comdat instead, fixing the inconsistency. Also correct an inaccuracy in the docs. Differential Revision: http://reviews.llvm.org/D10828 llvm-svn: 241103
* Fix compilation failure introduced in r241093.Alex Lorenz2015-06-301-2/+2
| | | | llvm-svn: 241096
* MIR Serialization: Serialize MBB successors.Alex Lorenz2015-06-304-3/+52
| | | | | | | | | | | | | This commit implements serialization of the machine basic block successors. It uses a YAML flow sequence that contains strings that have the MBB references. The MBB references in those strings use the same syntax as the MBB machine operands in the machine instruction strings. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10699 llvm-svn: 241093
* MIR Printer: extract the code that prints MBB references into a new method. NFC.Alex Lorenz2015-06-301-5/+10
| | | | | | | This commit enables the MIR printer to reuse the code that prints MBB references. llvm-svn: 241087
* MIR Parser: refactor error reporting for machine instruction parser errors. NFC.Alex Lorenz2015-06-301-5/+14
| | | | | | | This commit extracts the code that reports an error that's produced by the machine instruction parser into a new method that can be reused in other places. llvm-svn: 241086
* MIR Parser: make the machine instruction parsing interface more consistent. NFC.Alex Lorenz2015-06-303-30/+26
| | | | | | | | | This commit refactors the interface for machine instruction parser. It adopts the pattern of returning a bool and passing in the result in the first argument that is used by the other parsing methods for the the method 'parse' and the function 'parseMachineInstr'. llvm-svn: 241085
* MIR Parser: adopt the 'maybeLex...' pattern. NFC.Alex Lorenz2015-06-301-22/+37
| | | | | | | | | | | | This commit refactors the machine instruction lexer so that the lexing functions use the 'maybeLex...' pattern, where they determine if they can lex the current token by themselves. Reviewers: Sean Silva Differential Revision: http://reviews.llvm.org/D10817 llvm-svn: 241078
* use range-based for loops; NFCISanjay Patel2015-06-301-7/+5
| | | | llvm-svn: 241076
* Debug info: Add dwarf backend support for DIModule.Adrian Prantl2015-06-303-0/+27
| | | | | | rdar://problem/20965932 llvm-svn: 241034
* RegisterCoalescer: Cleanup empty subranges after shrinkToUses()Matthias Braun2015-06-301-0/+1
| | | | | | | | A call to removeEmptySubranges() is necessary after every operation that potentially removes all segments from a subregister range; this case in the register coalescer was missing. llvm-svn: 241027
* Teach LTOModule to emit linker flags for dllexported symbols, plus interface ↵Peter Collingbourne2015-06-291-18/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cleanup. This change unifies how LTOModule and the backend obtain linker flags for globals: via a new TargetLoweringObjectFile member function named emitLinkerFlagsForGlobal. A new function LTOModule::getLinkerOpts() returns the list of linker flags as a single concatenated string. This change affects the C libLTO API: the function lto_module_get_*deplibs now exposes an empty list, and lto_module_get_*linkeropts exposes a single element which combines the contents of all observed flags. libLTO should never have tried to parse the linker flags; it is the linker's job to do so. Because linkers will need to be able to parse flags in regular object files, it makes little sense for libLTO to have a redundant mechanism for doing so. The new API is compatible with the old one. It is valid for a user to specify multiple linker flags in a single pragma directive like this: #pragma comment(linker, "/defaultlib:foo /defaultlib:bar") The previous implementation would not have exposed either flag via lto_module_get_*deplibs (as the test in TargetLoweringObjectFileCOFF::getDepLibFromLinkerOpt was case sensitive) and would have exposed "/defaultlib:foo /defaultlib:bar" as a single flag via lto_module_get_*linkeropts. This may have been a bug in the implementation, but it does give us a chance to fix the interface. Differential Revision: http://reviews.llvm.org/D10548 llvm-svn: 241010
* [DAGCombiner] Fix & simplify constant folding of sext/zext.Pawel Bylica2015-06-291-13/+11
| | | | | | | | | | | | | | | | Summary: This patch fixes the cases of sext/zext constant folding in DAG combiner where constans do not fit 64 bits. The fix simply removes un$ Test Plan: New regression test included. Reviewers: RKSimon Reviewed By: RKSimon Subscribers: RKSimon, llvm-commits Differential Revision: http://reviews.llvm.org/D10607 llvm-svn: 240991
* [MMI] Use TinyPtrVector instead of PointerUnion with vector.Benjamin Kramer2015-06-292-100/+22
| | | | | | Also simplify duplicated code a bit. No functionality change intended. llvm-svn: 240990
* MIR Serialization: Serialize the register mask machine operands.Alex Lorenz2015-06-292-3/+65
| | | | | | | | | | | | | | | | | This commit implements serialization of the register mask machine operands. This commit serializes only the call preserved register masks that are defined by a target, it doesn't serialize arbitrary register masks. This commit also extends the TargetRegisterInfo class and TableGen so that the users of TRI can get the list of all the call preserved register masks and their names. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10673 llvm-svn: 240966
* Revert "Debug Info: One more bitfield bugfix. While yesterday's r240853 fixed"Adrian Prantl2015-06-271-18/+13
| | | | | | This reverts commit 240890. Breaking the gdb buildbot. llvm-svn: 240893
* [SDAG] Now that we have a way to communicate the exact bit on sdiv use it to ↵Benjamin Kramer2015-06-273-18/+22
| | | | | | | | | | | | | | | | | simplify sdiv by a constant. We had a hack in SDAGBuilder in place to work around this but now we can avoid that. Call BuildExactSDIV from BuildSDIV so DAGCombiner can perform this trick automatically. The added check in DAGCombiner is necessary to prevent exact sdiv by pow2 from regressing as the target-specific pow2 lowering is not aware of exact bits yet. This is mostly covered by existing tests. One side effect is that we get the better lowering for exact vector sdivs now too :) llvm-svn: 240891
* Debug Info: One more bitfield bugfix. While yesterday's r240853 fixedAdrian Prantl2015-06-271-16/+21
| | | | | | | | | | the DW_AT_bit_offset computation, the byte offset is in fact also endian-dependent as it needs to point to the storage unit containing the most-significant bit of the the bitfield. I'm so looking forward to emitting the endian-agnostic DWARF 3 version instead. llvm-svn: 240890
* Debug Info: Fix a bug in the DW_AT_bit_offset calculation that wouldAdrian Prantl2015-06-261-13/+28
| | | | | | | | | result in negative offsets and attempt a better job at documenting the algorithm. rdar://21082998 llvm-svn: 240853
* CodeGen: Create a proper ModuleSlotTracker for MachineInstrDuncan P. N. Exon Smith2015-06-261-2/+7
| | | | | | | | | | | Another follow-up related to r240848: try a little harder to share slot tracking calculations within a single `MachineInstr` dump. This is unrelated to `MachineFunction::print()`, since that should be passing through the function's `ModuleSlotTracker` by now, but could affect the speed of dumping from a debugger if there is more than one IR-level operand. llvm-svn: 240852
* MIR Serialization: Serialize global address machine operands.Alex Lorenz2015-06-266-14/+93
| | | | | | | | | | | | This commit serializes the global address machine operands. This commit doesn't serialize the operand's offset and target flags, it serializes only the global value reference. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10671 llvm-svn: 240851
* CodeGen: Push the ModuleSlotTracker through MetadataDuncan P. N. Exon Smith2015-06-261-4/+4
| | | | | | | | For another 1% speedup on the testcase in PR23865, push the `ModuleSlotTracker` through to metadata-related printing in `MachineBasicBlock::print()`. llvm-svn: 240848
* CodeGen: Push the ModuleSlotTracker through MachineOperandsDuncan P. N. Exon Smith2015-06-262-34/+46
| | | | | | | | | Push `ModuleSlotTracker` through `MachineOperand`s, dropping the time for `llc -print-machineinstrs` on the testcase in PR23865 from ~13 seconds to ~9 seconds. Now `SlotTracker::processFunctionMetadata()` accounts for only 8% of the runtime, which seems reasonable. llvm-svn: 240845
* CodeGen: Use a single SlotTracker in MachineFunction::print()Duncan P. N. Exon Smith2015-06-262-2/+20
| | | | | | | | | | | | | Expose enough of the IR-level `SlotTracker` so that `MachineFunction::print()` can use a single one for printing `BasicBlock`s. Next step would be to lift this through a few more APIs so that we can make other print methods faster. Fixes PR23865, changing the runtime of `llc -print-machineinstrs` from many minutes (killed after 3 minutes, but it wasn't very close) to 13 seconds for a 502185 line dump. llvm-svn: 240842
* Debug Info: Clarify the documentation for bitfields emission.Adrian Prantl2015-06-261-2/+7
| | | | llvm-svn: 240835
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-263-34/+30
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240822
* Wrap assert loops in #ifndef NDEBUGPete Cooper2015-06-261-0/+2
| | | | | | | The body of the loops here only contained asserts. This triggered an unused variable warning on release builds and -Werror on the bots. llvm-svn: 240819
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-263-21/+18
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240817
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-264-18/+18
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240815
* Show invariant loads in MMO dumpingMatt Arsenault2015-06-261-0/+3
| | | | llvm-svn: 240813
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-261-14/+12
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240809
* Fix unused variable from r240792.Alex Lorenz2015-06-261-0/+1
| | | | | | | The variable 'I' wasn't used when assertions were disabled. This commit ensures that 'I' is used outside of an assert. llvm-svn: 240797
* [DAGCombine] Fix demanded bits computation for exact shifts.Benjamin Kramer2015-06-261-1/+13
| | | | | | Fixes a miscompilation of MultiSource/Benchmarks/MallocBench/gs llvm-svn: 240796
* MIR Serialization: Serialize machine basic block operands.Alex Lorenz2015-06-266-21/+138
| | | | | | | | | | | | | | | | | | | | | | | | | This commit serializes machine basic block operands. The machine basic block operands use the following syntax: %bb.<id>[.<name>] This commit also modifies the YAML representation for the machine basic blocks - a new, required field 'id' is added to the MBB YAML mapping. The id is used to resolve the MBB references to the actual MBBs. And while the name of the MBB can be included in a MBB reference, this name isn't used to resolve MBB references - as it's possible that multiple MBBs will reference the same BB and thus they will have the same name. If the name is specified, the parser will verify that it is equal to the name of the MBB with the specified id. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10608 llvm-svn: 240792
* [DAGCombiner] Preserve the exact bit when simplifying SRA to SRL.Benjamin Kramer2015-06-261-4/+7
| | | | | | Allows more aggressive folding of ashr/shl pairs. llvm-svn: 240788
* [DAGCombine] fold (X >>?,exact C1) << C2 --> X << (C2-C1)Benjamin Kramer2015-06-261-0/+16
| | | | | | | Instcombine also does this but many opportunities only become visible after GEPs are lowered. llvm-svn: 240787
* [InterleavedAccess] Fix failures "undefined type 'llvm::raw_ostream'" on ↵Hao Liu2015-06-261-0/+1
| | | | | | windows. llvm-svn: 240760
* [InterleavedAccess] Add a pass InterleavedAccess to identify interleaved ↵Hao Liu2015-06-262-0/+286
| | | | | | | | | | | | | | | | | | | memory accesses and transform into target specific intrinsics. E.g. An interleaved load (Factor = 2): %wide.vec = load <8 x i32>, <8 x i32>* %ptr %v0 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <0, 2, 4, 6> %v1 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <1, 3, 5, 7> It can be transformed into a ld2 intrinsic in AArch64 backend or a vld2 intrinsic in ARM backend. E.g. An interleaved store (Factor = 3): %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11> store <12 x i32> %i.vec, <12 x i32>* %ptr It can be transformed into a st3 intrinsic in AArch64 backend or a vst3 intrinsic in ARM backend. Differential Revision: http://reviews.llvm.org/D10533 llvm-svn: 240751
* AsmPrinter: Use an intrusively linked list for DIE::ChildrenDuncan P. N. Exon Smith2015-06-258-53/+47
| | | | | | | | | | | | | | Replace the `std::vector<>` for `DIE::Children` with an intrusively linked list. This is a strict memory improvement: it requires no auxiliary storage, and reduces `sizeof(DIE)` by one pointer. It also factors out the DIE-related malloc traffic. This drops llc memory usage from 735 MB down to 718 MB, or ~2.3%. (I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`; see r236629 for details.) llvm-svn: 240736
* AsmPrinter: Convert DIE::Values to a linked listDuncan P. N. Exon Smith2015-06-257-59/+66
| | | | | | | | | | | | | | | | Change `DIE::Values` to a singly linked list, where each node is allocated on a `BumpPtrAllocator`. In order to support `push_back()`, the list is circular, and points at the tail element instead of the head. I abstracted the core list logic out to `IntrusiveBackList` so that it can be reused for `DIE::Children`, which also cares about `push_back()`. This drops llc memory usage from 799 MB down to 735 MB, about 8%. (I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`; see r236629 for details.) llvm-svn: 240733
* DAGCombiner: Use pop_back_val()Matt Arsenault2015-06-251-2/+1
| | | | llvm-svn: 240709
* fix typos; NFCSanjay Patel2015-06-251-4/+4
| | | | llvm-svn: 240699
* DAGCombiner: Remove redundant checkMatt Arsenault2015-06-251-1/+1
| | | | | | | MemIntrinsicSDNode is already a subclass of MemSDNode, so the MemSDNode check is sufficient. llvm-svn: 240672
* [AsmPrinter] Fix crash in handleIndirectSymViaGOTPCRelBruno Cardoso Lopes2015-06-251-2/+9
| | | | | | | | | | | Check for symbols in MCValue before using them. Bail out early in case they are null. This fixes PR23779. Differential Revision: http://reviews.llvm.org/D10712 rdar://problem/21532830 llvm-svn: 240649
* [If Converter] Convert recursion to iteration.Akira Hatanaka2015-06-241-126/+155
| | | | | | | | | | | | | | | | | | | | | | | | | | | This commit makes changes to IfConverter::AnalyzeBlock to use iteration instead of recursion. Previously, this function would get called recursively a large number of times and eventually segfault when a function with the following CFG was compiled: BB0: if (condition0) goto BB1 goto BB2 BB1: goto BB2 BB2: if (condition1) goto BB3 goto BB4 BB3: ... (repeat until BB7488) rdar://problem/21386145 Differential Revision: http://reviews.llvm.org/D10587 llvm-svn: 240589
* MIR Serialization: Serialize simple MachineRegisterInfo attributes.Alex Lorenz2015-06-242-0/+29
| | | | | | | | | | | | | This commit serializes the 3 scalar boolean attributes from the MachineRegisterInfo class: IsSSA, TracksRegLiveness, and TracksSubRegLiveness. These attributes are serialized as part of the machine function YAML mapping. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10618 llvm-svn: 240579
* AsmPrinter: Cleanup DIEValue::EmitValue() API, NFCDuncan P. N. Exon Smith2015-06-243-14/+13
| | | | | | | | | Stop taking a `dwarf::Form` in `DIEValue::EmitValue()` and `DIEValue::SizeOf()`, since they're always passed `DIEValue::getForm()` anyway. This is just left over from when `DIEValue` didn't know its own form. llvm-svn: 240566
* MIR Serialization: Serialize the null register operands.Alex Lorenz2015-06-244-4/+16
| | | | | | | | | | | | This commit serializes the null register machine operands. It uses the '_' keyword to represent them, but the parser also allows the '%noreg' named register syntax. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10580 llvm-svn: 240558
OpenPOWER on IntegriCloud