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* Also print alignment and volatileness.Evan Cheng2007-12-181-13/+19
| | | | llvm-svn: 45164
* FIX for PR1799: When a load is unfolded from an instruction, check if it is ↵Evan Cheng2007-12-181-26/+36
| | | | | | a new node. If not, do not create a new SUnit. llvm-svn: 45157
* SelectionDAG::dump() should print SrcValue of LoadSDNode and StoreSDNode.Evan Cheng2007-12-181-0/+18
| | | | llvm-svn: 45151
* Make invokes of inline asm legal. Teach codegenDuncan Sands2007-12-171-17/+20
| | | | | | | | how to lower them (with no attempt made to be efficient, since they should only occur for unoptimized code). llvm-svn: 45108
* Change the PointerType api for creating pointer types. The old functionality ↵Christopher Lamb2007-12-172-10/+11
| | | | | | of PointerType::get() has become PointerType::getUnqual(), which returns a pointer in the generic address space. The new prototype of PointerType::get() requires both a type and an address space. llvm-svn: 45082
* Break local interferences in StrongPHIElimination. One step closer...Owen Anderson2007-12-161-0/+135
| | | | llvm-svn: 45070
* A few more comments.Owen Anderson2007-12-161-1/+6
| | | | llvm-svn: 45069
* Add explicit keywords, and fix a minor typo that they uncovered.Dan Gohman2007-12-143-4/+5
| | | | llvm-svn: 45034
* Bug fix. Must also match ResNo when matching an operand with a user.Evan Cheng2007-12-141-1/+1
| | | | llvm-svn: 45028
* Add register pairs to the list to check for local interferences.Owen Anderson2007-12-131-4/+10
| | | | llvm-svn: 44987
* Remove ugly and horrible code. It's not necessary for correctness, and can ↵Owen Anderson2007-12-131-47/+7
| | | | | | be added back later if it causes code quality issues. llvm-svn: 44986
* Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always ↵Evan Cheng2007-12-121-3/+15
| | | | | | re-materializable and they should not be spilled. llvm-svn: 44960
* Allow vector integer constants to be created withDan Gohman2007-12-121-9/+22
| | | | | | | | SelectionDAG::getConstant, in the same way as vector floating-point constants. This allows the legalize expansion code for @llvm.ctpop and friends to be usable with vector types. llvm-svn: 44954
* Forgot to remove a register from the PHI-union after I'd determined that itOwen Anderson2007-12-121-3/+6
| | | | | | interfered with other registers. Seems like that might be a good thing to do. :-) llvm-svn: 44902
* If deleting a reload instruction due to reuse (value is available in ↵Evan Cheng2007-12-111-2/+18
| | | | | | register R and reload is targeting R), make sure to invalidate the kill information of the last kill. llvm-svn: 44894
* Need to grow the indexed map. Added debug statements.Bill Wendling2007-12-111-21/+27
| | | | llvm-svn: 44892
* Simplify slightly.Bill Wendling2007-12-111-3/+4
| | | | llvm-svn: 44881
* More progress on StrongPHIElimination. Now we actually USE the DomForest!Owen Anderson2007-12-111-0/+89
| | | | llvm-svn: 44877
* Blark! How in the world did this work without this?!Bill Wendling2007-12-111-4/+9
| | | | llvm-svn: 44874
* - Update the virtual reg to machine instruction map when hoisting.Bill Wendling2007-12-111-2/+12
| | | | | | - Fix subtle bug when creating initially creating this map. llvm-svn: 44873
* Checking for "zero operands" during the "CanHoistInst()" method isn't necessaryBill Wendling2007-12-111-11/+4
| | | | | | | | because those with side effects will be caught by other checks in here. Also, simplify the check for a BB in a sub loop. llvm-svn: 44871
* Switch over to MachineLoopInfo.Evan Cheng2007-12-114-24/+23
| | | | llvm-svn: 44838
* Pretty print shuffle mask operand.Evan Cheng2007-12-111-0/+13
| | | | llvm-svn: 44837
* CollectorMetadata and Collector are rejiggered to get along withGordon Henriksen2007-12-112-111/+186
| | | | | | | per-function collector model. Collector is now the factory for CollectorMetadata, so the latter may be subclassed. llvm-svn: 44827
* A little more progress on StrongPHIElimination, now that I have a better ↵Owen Anderson2007-12-101-11/+16
| | | | | | | | sense of how the CodeGen machinery works. llvm-svn: 44786
* Improve branch folding by recgonizing that explict successor relationships ↵Christopher Lamb2007-12-101-0/+5
| | | | | | impact the value of fall-through choices. llvm-svn: 44785
* Duncan points out that the subtraction is unneeded since hte codeChris Lattner2007-12-091-1/+1
| | | | | | knows the vector is not pow2 llvm-svn: 44740
* Add support for splitting the operand of a return instruction.Chris Lattner2007-12-093-53/+21
| | | | llvm-svn: 44728
* Reverting 44702. It wasn't correct to rename them.Bill Wendling2007-12-082-14/+14
| | | | llvm-svn: 44727
* add many new cases to SplitResult. SplitResult now handles all the cases ↵Chris Lattner2007-12-082-3/+178
| | | | | | that LegalizeDAG does. llvm-svn: 44726
* Implement splitting support for store, allowing us to compile:Chris Lattner2007-12-082-3/+27
| | | | | | | | | | | | | | | | | | | | | | | | | %f8 = type <8 x float> define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) { %p = load %f8* %P ; <%f8> [#uses=1] %q = load %f8* %Q ; <%f8> [#uses=1] %R = add %f8 %p, %q ; <%f8> [#uses=1] store %f8 %R, %f8* %S ret void } into: _test_f8: movaps 16(%rdi), %xmm0 addps 16(%rsi), %xmm0 movaps (%rdi), %xmm1 addps (%rsi), %xmm1 movaps %xmm0, 16(%rdx) movaps %xmm1, (%rdx) ret llvm-svn: 44725
* implement vector splitting of load, undef, and binops.Chris Lattner2007-12-082-4/+88
| | | | llvm-svn: 44724
* implement some methods.Chris Lattner2007-12-082-2/+29
| | | | llvm-svn: 44723
* add scaffolding for splitting of vectors.Chris Lattner2007-12-083-4/+138
| | | | llvm-svn: 44722
* reorganize header to separate into functional blocks.Chris Lattner2007-12-081-47/+59
| | | | llvm-svn: 44719
* split scalarization out to its own file.Chris Lattner2007-12-082-183/+202
| | | | llvm-svn: 44718
* Split expansion out into its own file.Chris Lattner2007-12-082-1144/+1166
| | | | llvm-svn: 44717
* Split promotion support out to its own file.Chris Lattner2007-12-082-472/+490
| | | | llvm-svn: 44716
* Rename LegalizeDAGTypes.cpp -> LegalizeTypes.cppChris Lattner2007-12-081-1/+0
| | | | llvm-svn: 44715
* Split the class definition of DAGTypeLegalizer out into a header.Chris Lattner2007-12-082-234/+256
| | | | | | Leave it visibility hidden, but not in an anon namespace. llvm-svn: 44714
* Renaming:Bill Wendling2007-12-082-2/+2
| | | | | | | isTriviallyReMaterializable -> hasNoSideEffects isReallyTriviallyReMaterializable -> isTriviallyReMaterializable llvm-svn: 44702
* Incorporated comments from Evan and Chris:Bill Wendling2007-12-081-58/+54
| | | | | | | http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056043.html http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056048.html llvm-svn: 44696
* Initial commit of the machine code LICM pass. It successfully hoists this:Bill Wendling2007-12-072-4/+344
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | _foo: li r2, 0 LBB1_1: ; bb li r5, 0 stw r5, 0(r3) addi r2, r2, 1 addi r3, r3, 4 cmplw cr0, r2, r4 bne cr0, LBB1_1 ; bb LBB1_2: ; return blr to: _foo: li r2, 0 li r5, 0 LBB1_1: ; bb stw r5, 0(r3) addi r2, r2, 1 addi r3, r3, 4 cmplw cr0, r2, r4 bne cr0, LBB1_1 ; bb LBB1_2: ; return blr ZOMG!! :-) Moar to come... llvm-svn: 44687
* Add an option to control this heuristic tweak so I can test it.Evan Cheng2007-12-071-1/+6
| | | | llvm-svn: 44671
* Redo previous patch so optimization only done for i1.Dale Johannesen2007-12-061-16/+4
| | | | | | Simpler and safer. llvm-svn: 44663
* Turning simple splitting on. Start testing new coalescer heuristics as new ↵Evan Cheng2007-12-061-1/+1
| | | | | | llcbeta. llvm-svn: 44660
* third time around: instead of disabling this completely,Chris Lattner2007-12-061-6/+13
| | | | | | | only disable it if we don't know it will be obviously profitable. Still fixme, but less so. :) llvm-svn: 44658
* Actually, disable this code for now. More analysis and improvements toChris Lattner2007-12-061-0/+6
| | | | | | the X86 backend are needed before this should be enabled by default. llvm-svn: 44657
* implement a readme entry, compiling the code into:Chris Lattner2007-12-061-19/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | _foo: movl $12, %eax andl 4(%esp), %eax movl _array(%eax), %eax ret instead of: _foo: movl 4(%esp), %eax shrl $2, %eax andl $3, %eax movl _array(,%eax,4), %eax ret As it turns out, this triggers all the time, in a wide variety of situations, for example, I see diffs like this in various programs: - movl 8(%eax), %eax - shll $2, %eax - andl $1020, %eax - movl (%esi,%eax), %eax + movzbl 8(%eax), %eax + movl (%esi,%eax,4), %eax - shll $2, %edx - andl $1020, %edx - movl (%edi,%edx), %edx + andl $255, %edx + movl (%edi,%edx,4), %edx Unfortunately, I also see stuff like this, which can be fixed in the X86 backend: - andl $85, %ebx - addl _bit_count(,%ebx,4), %ebp + shll $2, %ebx + andl $340, %ebx + addl _bit_count(%ebx), %ebp llvm-svn: 44656
* implement the rest of the functionality from ↵Chris Lattner2007-12-061-10/+24
| | | | | | SelectionDAGLegalize::ScalarizeVectorOp llvm-svn: 44654
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