| Commit message (Collapse) | Author | Age | Files | Lines |
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StripSymbols when EH is on.
llvm-svn: 49110
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defs, I can do away with the horribleness I introduced a while back. It's impossible to detect if there is any use of a physical register below an instruction (and before any def of the register) with some cheap book keeping.
llvm-svn: 49105
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llvm-svn: 49099
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llvm-svn: 49096
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node and its inputs.
llvm-svn: 49070
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unknown defining inst after PHI elimination.
llvm-svn: 49069
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review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.
llvm-svn: 49064
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llvm-svn: 49053
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llvm-svn: 49046
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llvm-svn: 49043
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llvm-svn: 49016
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llvm-svn: 49014
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llvm-svn: 49013
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llvm-svn: 49012
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not marked nounwind, or for all functions when -enable-eh
is set, provided the target supports Dwarf EH.
llvm-gcc generates nounwind in the right places; other FEs
will need to do so also. Given such a FE, -enable-eh should
no longer be needed.
llvm-svn: 49006
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use.
llvm-svn: 49002
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llvm-svn: 48995
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llvm-svn: 48994
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say the least. Since the register operand guaranteed to be PIC base and that it is already live at all uses, we are making sure it will not be spilled after its uses are rematerialized for both performance and correctness reasons.
llvm-svn: 48976
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pointing this out.
llvm-svn: 48973
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patch by David Chisnall.
llvm-svn: 48963
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llvm-svn: 48947
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elimination algorithm where we were accidentally reasoning about
the source rather than the destination.
llvm-svn: 48936
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llvm-svn: 48916
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llvm-svn: 48914
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llvm-svn: 48908
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In order to handle indexed nodes I had to introduce
a new constructor, and since I was there I factorized
the code in the various load constructors.
llvm-svn: 48894
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nodes. This doesn't currently have much impact the generated code, but it
does produce simpler-looking SelectionDAGs, and consequently
simpler-looking ScheduleDAGs, because there are fewer spurious
dependencies.
In particular, CopyValueToVirtualRegister now uses the entry node as the
input chain dependency for new CopyToReg nodes instead of calling getRoot
and depending on the most recent memory reference.
Also, rename UnorderedChains to PendingExports and pull it up from being
a local variable in SelectionDAGISel::BuildSelectionDAG to being a
member variable of SelectionDAGISel, so that it doesn't have to be
passed around to all the places that need it.
llvm-svn: 48893
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llvm-svn: 48873
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called LimitedSumOfUnscheduledPredsOfSuccs. It terminates the computation
after a given treshold is reached. This new function is always faster, but
brings real wins only on bigger test-cases.
The old function SumOfUnscheduledPredsOfSuccs is left in-place for now and therefore a warning about an unused static function is produced.
llvm-svn: 48872
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llvm-svn: 48853
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be relocatable. Describe why .set is needed better.
llvm-svn: 48848
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llvm-svn: 48837
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use of the same val# is a copy instruction that has already been coalesced.
llvm-svn: 48833
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LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.
The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.
On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better.
llvm-svn: 48822
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llvm-svn: 48819
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This fixes Bugzilla #1835 (http://llvm.org/bugs/show_bug.cgi?id=1835).
This patched is reviewed by Tanya and Dan. Dan tested and approved it.
The reason for the bad performance of the old algorithm is that it is very naive and scans every
time all nodes of the DAG in the worst case.
This patch introduces a new algorithm based on the paper "Online algorithms
for maintaining the topological order of a directed acyclic graph" by
David J.Pearce and Paul H.J.Kelly. This is the MNR algorithm. It has a
linear time worst-case and performs much better in most situations.
The paper can be found here:
http://fano.ics.uci.edu/cites/Document/Online-algorithms-for-maintaining-the-topological-order-of-a-directed-acyclic-graph.html
The main idea of the new algorithm is to compute the topological ordering of the SNodes in the
DAG and to maintain it even after DAG modifications. The topological ordering allows for very fast
node reachability checks.
Tests on very big input files with tens of thousands of instructions in a BB indicate huge
speed-ups (up to 10x compilation time improvement) compared to the old version.
llvm-svn: 48817
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llvm-svn: 48811
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llvm-svn: 48803
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coalescer does.
llvm-svn: 48802
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marked read-write. Use const so that they can be allocated in a
read-only segment.
llvm-svn: 48800
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llvm-svn: 48797
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llvm-svn: 48794
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transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
llvm-svn: 48792
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llvm-svn: 48779
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llvm-svn: 48759
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llvm-svn: 48755
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previously coalesced copy into an non-identity copy.
llvm-svn: 48752
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llvm-svn: 48751
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llvm-svn: 48739
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