summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
...
* Fix ARM EHABI when function has landingpad and nounwind.Logan Chien2014-05-141-8/+7
| | | | | | | | | | | | | | | | | | | | If the function has the landingpad instruction, then the handlerdata should be emitted even if the function has nouwnind attribute. Otherwise, following code will not work: void test1() noexcept { try { throw_exception(); } catch (...) { log_unexpected_exception(); } } Since the cantunwind was incorrectly emitted and the LSDA is not available. llvm-svn: 208791
* Update the comments for ComputeMaskedBits, which lost its Mask parameterJay Foad2014-05-141-3/+2
| | | | | | in r154011. llvm-svn: 208757
* Recommit r208506: DebugInfo: Include lexical scopes in inlined subroutines.David Blaikie2014-05-142-17/+34
| | | | | | | | | | | | | | | | | | | | This was reverted in r208642 due to regressions surrounding file changes within lexical scopes causing inlining information to be lost. The issue was in LexicalScopes::getOrCreateInlinedScope, where I was previously testing "isLexicalBlock" which is false for "DILexicalBlockFile" (a scope used to represent changes in the current file name) and assuming it was then a function (breaking out of the inlined scope path and reaching for the parent non-inlined scopes). By inverting the condition and testing for "isSubprogram" the correct behavior is attained. (also found some weirdness in Clang, see r208742 when reducing this test case - the resulting test case doesn't apply with the Clang fix, but I've added a more realistic test case to inline-scopes.ll which does reproduce the issue and demonstrate the fix) llvm-svn: 208748
* Add missing line breaks to debug output in CodeGenPrepareLouis Gerbarg2014-05-131-3/+3
| | | | llvm-svn: 208731
* Split GlobalValue into GlobalValue and GlobalObject.Rafael Espindola2014-05-131-1/+1
| | | | | | | | | This allows code to statically accept a Function or a GlobalVariable, but not an alias. This is already a cleanup by itself IMHO, but the main reason for it is that it gives a lot more confidence that the refactoring to fix the design of GlobalAlias is correct. That will be a followup patch. llvm-svn: 208716
* [CGP] r205941 changed the logic, so that a cast happens *before* 'Result' isJoey Gouly2014-05-131-1/+1
| | | | | | | | | | | compared to 'AddrMode.BaseReg'. In the case that 'AddrMode.BaseReg' is nullptr, 'Result' will also be nullptr, so the cast causes an assertion. We should use dyn_cast_or_null here to check 'Result' is not null and it is an instruction. Bug found by Mats Petersson, and I reduced his IR to get a test case. llvm-svn: 208705
* Revert "DebugInfo: Include lexical scopes in inlined subroutines."David Blaikie2014-05-122-35/+17
| | | | | | | | | This reverts commit r208506. Some inlined subroutine scopes appear to be missing with this change. Reverting while I investigate. llvm-svn: 208642
* Use a logical not when inverting SetCC. This unfortunately doesn't fire on ↵Pete Cooper2014-05-122-3/+19
| | | | | | | | | | | | any targets so I couldn't find a test case to trigger it. The problem occurs when a non-i1 setcc is inverted. For example 'i8 = setcc' will get 'xor 0xff' to invert this. This is clearly wrong when the boolean contents are ZeroOrOne. This patch introduces getLogicalNOT and updates SetCC legalisation to use it. Reviewed by Hal Finkel. llvm-svn: 208641
* [DAGCombiner] Split up an indexed load if only the base pointer value is liveAdam Nemet2014-05-121-7/+30
| | | | | | | | | | | | | | | | | | | | Right now the load may not get DCE'd because of the side-effect of updating the base pointer. This can happen if we lower a read-modify-write of an illegal larger type (e.g. i48) such that the modification only affects one of the subparts (the lower i32 part but not the higher i16 part). See the testcase. In order to spot the dead load we need to revisit it when SimplifyDemandedBits decided that the value of the load is masked off. This is the CommitTargetLoweringOpt piece. I checked compile time with ARM64 by sending SPEC bitcode files through llc. No measurable change. Fixes <rdar://problem/16031651> llvm-svn: 208640
* DebugInfo: Attach DW_AT_inline to inlined subprograms at DIE-construction ↵David Blaikie2014-05-121-4/+1
| | | | | | time rather than as a post-processing step. llvm-svn: 208636
* DwarfDebug: Avoid an extra map lookup while constructing abstract scope DIEs ↵David Blaikie2014-05-121-19/+20
| | | | | | | | | | and reduce nesting/conditionals. One test case had to be updated as it still had the extra indirection for the variable list - removing the extra indirection got it back to passing. llvm-svn: 208608
* Make SimplifyDemandedBits understand BUILD_PAIRMatt Arsenault2014-05-121-0/+25
| | | | llvm-svn: 208598
* CodeGen: add parenthesis around complex expressionSaleem Abdulrasool2014-05-121-5/+5
| | | | | | Add missing parenthesis suggested by GCC. NFC. llvm-svn: 208519
* Pass the value type to TLI::getRegisterByNameHal Finkel2014-05-111-2/+2
| | | | | | | | | | | | | We must validate the value type in TLI::getRegisterByName, because if we don't and the wrong type was used with the IR intrinsic, then we'll assert (because we won't be able to find a valid register class with which to construct the requested copy operation). For PPC64, additionally, the type information is necessary to decide between the 64-bit register and the 32-bit subregister. No functionality change. llvm-svn: 208508
* DebugInfo: Include lexical scopes in inlined subroutines.David Blaikie2014-05-112-17/+35
| | | | llvm-svn: 208506
* DwarfUnit: Make explicit a limitation/bug in enumeration constant emission.David Blaikie2014-05-111-4/+9
| | | | | | | | Filed as PR19712, LLVM fails to detect the right type of an enum constant when a frontend does not provide an underlying type for the enumeration type. llvm-svn: 208502
* DwarfUnit: Pick a winner between isTypeSigned and isUnsignedDIType.David Blaikie2014-05-112-24/+17
| | | | | | | | | And the winner by a nose is isUnsignedDIType, for no particular reason. These two functions were just complements of each other and used in very related code, so refactor callers to just use one of them. llvm-svn: 208500
* DwarfUnit: Factor out calling isUnsignedDIType into a utility function so ↵David Blaikie2014-05-112-9/+12
| | | | | | each caller of emitConstantValue doesn't have to call it separately. llvm-svn: 208496
* DwarfUnit: Share common constant value emission between APInts of small (<= ↵David Blaikie2014-05-112-40/+17
| | | | | | | | | | | | 64 bit) and MCOperand immediates. Doesn't seem a good reason to duplicate this code (it was more literally duplicated prior to r208494, and while the dataN code /does/ actually fire in this case, it doesn't seem necessary (and the DWARF standard recommends using udata/sdata pervasively instead of dataN, so as to indicate signedness of the values)) llvm-svn: 208495
* DebugInfo: Simplify constant value emission.David Blaikie2014-05-111-41/+11
| | | | | | | | | | | | | This code looks to have become dead at some time in the past. I tried to reproduce cases where LLVM would emit constants with dataN, but could not. Upon inspection it seems the code doesn't do that anymore - the only time a size is provided by isTypeSigned is when the type is signed, and in those cases we use sdata. dataN is only used for unsigned types and isTypeSigned doesn't provide a value for sizeInBits in that case. Remove the dead cases/size plumbing. llvm-svn: 208494
* ARM: HFAs must be passed in consecutive registersOliver Stannard2014-05-091-2/+22
| | | | | | | | | | When using the ARM AAPCS, HFAs (Homogeneous Floating-point Aggregates) must be passed in a block of consecutive floating-point registers, or on the stack. This means that unused floating-point registers cannot be back-filled with part of an HFA, however this can currently happen. This patch, along with the corresponding clang patch (http://reviews.llvm.org/D3083) prevents this. llvm-svn: 208413
* [TargetInstrInfo] Fix the implementation of commuteInstruction to match theQuentin Colombet2014-05-081-4/+2
| | | | | | | | | | | | | comment of the API. Relaxes the behavior of TargetInstrInfo::commuteInstruction when TargetInstrInfo::findCommutedOpIndices returns false. Previously TargetInstrInfo triggered a fatal error in such situation whereas based on the comment in the API it should just return nullptr. Indeed the only precondition that should be ensured is that the instruction must be commutable. llvm-svn: 208371
* Reapply r207876 (Try simplifying LexicalScopes ownership again) including a ↵David Blaikie2014-05-081-28/+35
| | | | | | | | | | | | | | | | | | | workaround for an MSVC2012 bug regarding forward_as_tuple (r207876 was reverted in r208131 after seeing some consistent buildbot failure for MSVC 2012. The original commits were in r207724-r207726) Takumi was nice enough to dig into this and locate this Microsoft Connect issue: http://connect.microsoft.com/VisualStudio/feedback/details/814899/forward-as-tuple-debug-implementation-error describing a bug in MSVC2012's forward_as_tuple implementation. Since the parameters in this instance are trivial/small, pass them by value (using make_tuple) instead of perfectly-forwarded tuple of rvalue references (involving the broken forward_as_tuple). Hopefully this will satisfy MSVC2012. llvm-svn: 208364
* Fix a spelling errorHal Finkel2014-05-081-1/+1
| | | | llvm-svn: 208314
* Move late partial-unrolling thresholds into the processor definitionsHal Finkel2014-05-081-1/+62
| | | | | | | | | | | | | | | | | | | | | | The old method used by X86TTI to determine partial-unrolling thresholds was messy (because it worked by testing target features), and also would not correctly identify the target CPU if certain target features were disabled. After some discussions on IRC with Chandler et al., it was decided that the processor scheduling models were the right containers for this information (because it is often tied to special uop dispatch-buffer sizes). This does represent a small functionality change: - For generic x86-64 (which uses the SB model and, thus, will get some unrolling). - For AMD cores (because they still currently use the SB scheduling model) - For Haswell (based on benchmarking by Louis Gerbarg, it was decided to bump the default threshold to 50; we're working on a test case for this). Otherwise, nothing has changed for any other targets. The logic, however, has been moved into BasicTTI, so other targets may now also opt-in to this functionality simply by setting LoopMicroOpBufferSize in their processor model definitions. llvm-svn: 208289
* Fix using wrong result type for setcc.Matt Arsenault2014-05-072-4/+16
| | | | | | | | | | | When reducing the bitwidth of a comparison against a constant, the original setcc's result type was used, which was incorrect. No test since I don't think any other in tree targets change the bitwidth of the setcc type depending on the bitwidth of the compared type. llvm-svn: 208236
* Remove the UseCFI option from createAsmStreamer.Rafael Espindola2014-05-071-1/+0
| | | | | | We were already always passing true, this just removes the option. llvm-svn: 208205
* [BUG][REFACTOR]Zinovy Nis2014-05-071-20/+2
| | | | | | | | | 1) Fix for printing debug locations for absolute paths. 2) Location printing is moved into public method DebugLoc::print() to avoid re-inventing the wheel. Differential Revision: http://reviews.llvm.org/D3513 llvm-svn: 208177
* Revert "Try simplifying LexicalScopes ownership again."David Blaikie2014-05-061-32/+28
| | | | | | | | | Speculatively reverting due to a suspicious failure on a Windows buildbot. This reverts commit 10c37a012ea11596d44cd9059fe09c959caf30c8. llvm-svn: 208131
* TTI: Estimate @llvm.fmuladd cost as fmul + fadd when FMA's aren't legal on ↵Benjamin Kramer2014-05-061-1/+7
| | | | | | the target. llvm-svn: 208115
* Implememting named register intrinsicsRenato Golin2014-05-064-0/+55
| | | | | | | | | | | This patch implements the infrastructure to use named register constructs in programs that need access to specific registers (bare metal, kernels, etc). So far, only the stack pointer is supported as a technology preview, but as it is, the intrinsic can already support all non-allocatable registers from any architecture. llvm-svn: 208104
* Try simplifying LexicalScopes ownership again.David Blaikie2014-05-021-28/+32
| | | | | | | | | | | | | | Committed initially in r207724-r207726 and reverted due to compiler-rt crashes in r207732. Instead, fix this harder with unordered_map and store the LexicalScopes by value in the map. This did necessitate moving the definition of LexicalScope above the definition of LexicalScopes. Let's see how the buildbots/compilers tolerate unordered_map::emplace + std::piecewise_construct + std::forward_as_tuple... llvm-svn: 207876
* Satisfy GCC's urgent need for parentheses around ‘&&’ within ‘||’.Benjamin Kramer2014-05-021-2/+2
| | | | llvm-svn: 207871
* DAGCombine: prevent formation of illegal ConstantFP nodes.Tim Northover2014-05-021-5/+10
| | | | llvm-svn: 207850
* Allow SelectionDAG::FoldConstantArithmetic to work when it's called with a ↵Benjamin Kramer2014-05-021-2/+8
| | | | | | vector VT but scalar values. llvm-svn: 207835
* [Stackmaps] Pacify windows buildbot.Juergen Ributzka2014-05-011-0/+3
| | | | llvm-svn: 207807
* [Stackmaps] Add command line option to specify the stackmap version.Juergen Ributzka2014-05-011-1/+10
| | | | llvm-svn: 207805
* [Stackmaps] Refactor serialization code. No functional change intended.Juergen Ributzka2014-05-011-125/+144
| | | | llvm-svn: 207804
* [Stackmaps] Replace the custom ConstantPool class with a MapVector.Juergen Ributzka2014-05-011-5/+7
| | | | llvm-svn: 207803
* Speculatively roll back r207724-r207726, which are code cleanup changes andRichard Smith2014-05-011-30/+25
| | | | | | appear to be breaking a bootstrapped build of compiler-rt. llvm-svn: 207732
* LexicalScopes: Use unique_ptr to manage ownership of abstract LexicalScopes.David Blaikie2014-04-301-8/+9
| | | | llvm-svn: 207726
* Forgotten reformatting.David Blaikie2014-04-301-5/+9
| | | | llvm-svn: 207725
* LexicalScopes: use unique_ptr to own LexicalScope objects.David Blaikie2014-04-301-16/+16
| | | | | | Ownership of abstract scopes coming soon. llvm-svn: 207724
* Use a single data structure to store all user variables in DwarfDebugAlexey Samsonov2014-04-303-19/+15
| | | | | | | | | | | | | | | | | | Summary: Get rid of UserVariables set, and turn DbgValues into MapVector to get a fixed ordering, as suggested in review for http://reviews.llvm.org/D3573. Test Plan: llvm regression tests Reviewers: dblaikie Reviewed By: dblaikie Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D3579 llvm-svn: 207720
* Revert "Emit DW_AT_object_pointer once, on the declaration, for each function."David Blaikie2014-04-304-18/+8
| | | | | | | | | | | | | | Breaks GDB buildbot (http://lab.llvm.org:8011/builders/clang-x86_64-ubuntu-gdb-75/builds/14517) GCC emits DW_AT_object_pointer /everywhere/ (declaration, abstract definition, inlined subroutine), but it looks like GCC relies on it being somewhere other than the declaration, at least. I'll experiment further & can hopefully still remove it from the inlined_subroutine. This reverts commit r207705. llvm-svn: 207719
* Prepare support of Itanium ABI on ARM as opposed to EHABI byJoerg Sonnenberger2014-04-301-2/+4
| | | | | | conditionally emitting .fnstart and friends only for EHABI. llvm-svn: 207718
* DebugInfo: Omit DW_AT_artificial on DW_TAG_formal_parameters in ↵David Blaikie2014-04-303-20/+32
| | | | | | | | | | | | DW_TAG_inlined_subroutines. They just don't need to be there - they're inherited from the abstract definition. In theory I would like them to be inherited from the declaration, but the DWARF standard doesn't quite say that... we can probably do it anyway but I'm less confident about that so I'll leave it for a separate commit. llvm-svn: 207717
* Convert more loops to range-based equivalentsAlexey Samsonov2014-04-3013-130/+103
| | | | llvm-svn: 207714
* Slightly simplify code in DwarfDebug::beginFunctionAlexey Samsonov2014-04-301-7/+5
| | | | llvm-svn: 207710
* Move logic for calculating DBG_VALUE history map into separate file/class.Alexey Samsonov2014-04-305-124/+207
| | | | | | | | | | | | | | | | Summary: No functionality change. Test Plan: llvm regression test suite. Reviewers: dblaikie Reviewed By: dblaikie Subscribers: echristo, llvm-commits Differential Revision: http://reviews.llvm.org/D3573 llvm-svn: 207708
OpenPOWER on IntegriCloud