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* Shuffle header file as per the Coding StandardsDavid Majnemer2016-02-191-1/+1
| | | | llvm-svn: 261308
* [SjLjEHPrepare] Simplify/cleanup codeDavid Majnemer2016-02-191-64/+50
| | | | | | No functional change is intended. llvm-svn: 261307
* LegalizeDAG: Fix ExpandFCOPYSIGN assuming the same type on both inputsMatthias Braun2016-02-191-5/+31
| | | | llvm-svn: 261306
* [SjLjEHPrepare] Don't grab pointers to functions in doInitializationDavid Majnemer2016-02-191-18/+17
| | | | | | | | | | Certain optimization passes (like globaldce) can prune function declaration that SjLjEHPrepare assumed would exit when it'd runOnFunction. This fixes PR26669. llvm-svn: 261303
* When printing MIR, output to errs() rather than outs().Justin Lebar2016-02-191-1/+1
| | | | | | | | | | | | | | | | | | | | | Summary: Without this, this command $ llvm-run llc -stop-after machine-cp -o - <( echo '' ) outputs an error, because we close stdout twice -- once when closing the file opened for "-o", and again when closing outs(). Also clarify in the outs() definition that you can't ever call it if you want to open your own raw_fd_ostream on stdout. Reviewers: jroelofs, tstellarAMD Subscribers: jholewinski, qcolombet, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D17422 llvm-svn: 261286
* [IR] Extend cmpxchg to allow pointer type operandsPhilip Reames2016-02-191-4/+63
| | | | | | | | | | | | Today, we do not allow cmpxchg operations with pointer arguments. We require the frontend to insert ptrtoint casts and do the cmpxchg in integers. While correct, this is problematic from a couple of perspectives: 1) It makes the IR harder to analyse (for instance, it make capture tracking overly conservative) 2) It pushes work onto the frontend authors for no real gain This patch implements the simplest form of IR support. As we did with floating point loads and stores, we teach AtomicExpand to convert back to the old representation. This prevents us needing to change all backends in a single lock step change. Over time, we can migrate each backend to natively selecting the pointer type. In the meantime, we get the advantages of a cleaner IR representation without waiting for the backend changes. Differential Revision: http://reviews.llvm.org/D17413 llvm-svn: 261281
* Remove uses of builtin comma operator.Richard Trieu2016-02-1810-54/+93
| | | | | | Cleanup for upcoming Clang warning -Wcomma. No functionality change intended. llvm-svn: 261270
* Restrict scope of variables [NFC]Philip Reames2016-02-181-2/+2
| | | | llvm-svn: 261250
* Make header self-contained. NFC.Benjamin Kramer2016-02-181-0/+1
| | | | llvm-svn: 261234
* Stop creating covmap as note section on ELFXinliang David Li2016-02-181-3/+0
| | | | | | | | | | | | covmap needs to created as non allocatable, but not with SHT_NOTE. The latter was needed to workaround a problem of BFD linker with gc, which is no longer needed. (A more proper longer term fix requires changing FE driver to force referencing the section using linker script). Differential Revision: http://reviews.llvm.org/D17309 llvm-svn: 261228
* Revert "LiveIntervalAnalysis: Remove LiveVariables requirement" and ↵Matthias Braun2016-02-183-3/+7
| | | | | | | | | | | | | | | | | | | LiveIntervalTest The commit breaks stage2 compilation on PowerPC. Reverting for now while this is analyzed. I also have to revert the LiveIntervalTest for now as that depends on this commit. Revert "LiveIntervalAnalysis: Remove LiveVariables requirement" This reverts commit r260806. Revert "Remove an unnecessary std::move to fix -Wpessimizing-move warning." This reverts commit r260931. Revert "Fix typo in LiveIntervalTest" This reverts commit r260907. Revert "Add unittest for LiveIntervalAnalysis::handleMove()" This reverts commit r260905. llvm-svn: 261189
* DwarfDebug: Don't drop the DIExpression just because a variable isAdrian Prantl2016-02-171-3/+14
| | | | | | | | | | | described by an immediate. Found via http://reviews.llvm.org/D16867 Thanks to Paul Robinson for pointing this out. <rdar://problem/24456528> llvm-svn: 261168
* DbgVariable: Add an accessor for the common case of a single expressionAdrian Prantl2016-02-172-2/+5
| | | | | | | | belonging to a single DBG_VALUE instruction. NFC llvm-svn: 261167
* Revert r261070, it caused PR26652 / PR26653.Nico Weber2016-02-171-126/+0
| | | | llvm-svn: 261127
* Detecte vector reduction operations just before instruction selection.Cong Hou2016-02-171-0/+126
| | | | | | | | | | | | | | | | | | | | | | | | | This patch detects vector reductions before instruction selection. Vector reductions are vectorized reduction operations, and for such operations we have freedom to reorganize the elements of the result as long as the reduction of them stay unchanged. This will enable some reduction pattern recognition during instruction combine such as SAD/dot-product on X86. A flag is added to SDNodeFlags to mark those vector reduction nodes to be checked during instruction combine. To detect those vector reductions, we search def-use chains starting from the given instruction, and check if all uses fall into two categories: 1. Reduction with another vector. 2. Reduction on all elements. in which 2 is detected by recognizing the pattern that the loop vectorizer generates to reduce all elements in the vector outside of the loop, which includes several ShuffleVector and one ExtractElement instructions. Differential revision: http://reviews.llvm.org/D15250 llvm-svn: 261070
* [codeview] Bail on a DBG_VALUE register operand with no registerReid Kleckner2016-02-161-5/+7
| | | | | | | | | | This apparently comes up when the register allocator decides that a variable will become undef along a certain path. Also improve the error message we emit when we can't map from LLVM register number to CV register number. llvm-svn: 261016
* [codeview] Fix assertion on non-memory, non-register DBG_VALUE instructionsReid Kleckner2016-02-161-0/+7
| | | | | | | Eventually we should find a way to describe constant variables, but it is not obvious how to do this at the moment. llvm-svn: 261010
* [GlobalISel] Re-apply r260922-260923 with MSVC-friendly code.Quentin Colombet2016-02-161-5/+5
| | | | | | | | | Original message: Get rid of the ifdefs in TargetLowering. Introduce a new API used only by GlobalISel: CallLowering. This API will contain target hooks dedicated to call lowering. llvm-svn: 260998
* A signed bitfield's range is [-1,0], so assigning 1 is technically an ↵Aaron Ballman2016-02-161-1/+1
| | | | | | overflow. However, the other bitfield requires a signed value (it supports negative offsets), so it is slightly better to retain a signed 1-bit bitfield and use -1 instead of 1. Silences an MSVC warning. llvm-svn: 260973
* Reverting r260922-260923; they cause link failures with MSVC.Aaron Ballman2016-02-161-4/+3
| | | | | | | http://lab.llvm.org:8011/builders/lldb-x86-windows-msvc2015/builds/15436/steps/build/logs/stdio http://bb.pgr.jp/builders/msbuild-llvmclang-x64-msc18-DA/builds/961/steps/build_llvm/logs/stdio llvm-svn: 260972
* [GlobalISel] Get rid of the ifdefs in TargetLowering.Quentin Colombet2016-02-161-3/+4
| | | | | | | Introduce a new API used only by GlobalISel: CallLowering. This API will contain target hooks dedicated to call lowering. llvm-svn: 260922
* Implemented stack symbol table ordering/packing optimization to improve data ↵Zia Ansari2016-02-151-3/+14
| | | | | | | | locality and code size from SP/FP offset encoding. Differential Revision: http://reviews.llvm.org/D15393 llvm-svn: 260917
* LiveIntervalAnalysis: Support moving of subregister defs in handleMoveMatthias Braun2016-02-151-34/+153
| | | | | | | | | | | | | | | | | | | This is an updated version which fixes a bug that happened with uses tied to an earlyclobber operand which end at an unusual slotindex. If two definitions write to independent subregisters then they can be put in any order. LiveIntervalAnalysis::handleMove() did not support this previously because it looks like moving a definition of a vreg past another one. This is a modified version of a patch proposed (two years ago) by Vincent Lejeune! This version does not touch the read-undef flags and is extended for the case of moving a subregister def behind all uses - this can happen for subregister defs that are completely unused. Differential Revision: http://reviews.llvm.org/D9067 llvm-svn: 260906
* MachineVerifier: Add parameter to choose if MachineFunction::verify() abortsMatthias Braun2016-02-151-10/+13
| | | | | | | The abort on error behaviour is unpractical for debugger and unittest usage. llvm-svn: 260904
* [CodeGen] Document and use getConstant's splat-building feature. NFC.Ahmed Bougacha2016-02-152-10/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D17229 llvm-svn: 260901
* [ScheduleDAGInstrs] isUnsafeMemoryObject() removedJonas Paulsson2016-02-151-36/+5
| | | | | | | | | | | This function was basically useless, since volatile memacesses or MIs with unmodelled sideffects become global memory objects, and the other little checks are also done elsewhere. Reviewed by Andy Trick http://reviews.llvm.org/D16881 llvm-svn: 260899
* [AggressiveAntiDepBreaker] Skip some unnecessary BitVector copies.Benjamin Kramer2016-02-131-9/+11
| | | | llvm-svn: 260825
* LiveIntervalAnalysis: Remove LiveVariables requirementMatthias Braun2016-02-133-7/+3
| | | | | | | | | This requirement was a huge hack to keep LiveVariables alive because it was optionally used by TwoAddressInstructionPass and PHIElimination. However we have AnalysisUsage::addUsedIfAvailable() which we can use in those passes. llvm-svn: 260806
* Don't combine fp_round (fp_round x) if f80 to f16 is generatedPirama Arumuga Nainar2016-02-131-0/+11
| | | | | | | | | | | | | | | | | | | | Summary: This patch skips DAG combine of fp_round (fp_round x) if it results in an fp_round from f80 to f16. fp_round from f80 to f16 always generates an expensive (and as yet, unimplemented) libcall to __truncxfhf2. This prevents selection of native f16 conversion instructions from f32 or f64. Moreover, the first (value-preserving) fp_round from f80 to either f32 or f64 may become a NOP in platforms like x86. Reviewers: ab Subscribers: srhines, llvm-commits Differential Revision: http://reviews.llvm.org/D17221 llvm-svn: 260769
* [codeview] Describe local variables in registersReid Kleckner2016-02-122-51/+225
| | | | llvm-svn: 260746
* [WinEH] Prevent EH state numbering from skipping nested cleanup pads that ↵Andrew Kaylor2016-02-121-6/+14
| | | | | | | | never return Differential Revision: http://reviews.llvm.org/D17208 llvm-svn: 260733
* Get rid of some GLOBAL_ISEL ifdefs that should be harmless for code size.Quentin Colombet2016-02-121-8/+3
| | | | | | More to come, but those were easy. llvm-svn: 260723
* GlobalISel is always built since r260566, reflect it in LLVMBuild.txtMehdi Amini2016-02-121-1/+1
| | | | | | | Other component could not depends on an optional library in llvm-config From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 260701
* [IRTranslator] Use a single virtual register to represent any Value.Quentin Colombet2016-02-111-13/+11
| | | | | | PR26161. llvm-svn: 260602
* [Target] Add a helper function to check if an opcode is invalid after isel.Quentin Colombet2016-02-111-1/+13
| | | | llvm-svn: 260590
* Revert "LiveIntervalAnalysis: Support moving of subregister defs in handleMove"Matthias Braun2016-02-111-152/+34
| | | | | | | | | | | | This is broke a bot: http://lab.llvm.org:8011/builders/clang-cmake-aarch64-quick/builds/4703/steps/test-suite/logs/test.log Reverting while I investigate. This reverts commit r260565. llvm-svn: 260586
* [SelectionDAG] change getConstant() to use the input SDLoc when building ↵Sanjay Patel2016-02-111-5/+4
| | | | | | | | | | | | | | | | | | | | | | splat vectors The code change is simple enough: instead of attaching an anonymous SDLoc to splatted vector constants, use the scalar constant's existing SDLoc since that is what is passed into getConstant() as a param. But this changes instruction scheduling, so I'll explain why that happens. The motivation for this patch starts near: http://reviews.llvm.org/rL258833 ...x86's getZeroVector() could be similarly cleaned up and I thought it would be 'NFC'. But when I made that change locally, several x86 codegen tests wiggled. It turns out that the lack of SDLoc consistency in getConstant() changes the way ScheduleDAGRRList behaves. This is because the SDLoc contains 'IROrder' and some DAG scheduler algorithms use IROrder for tie-breaking. Differential Revision: http://reviews.llvm.org/D16972 llvm-svn: 260582
* [GlobalISel] Add the necessary plumbing to lower formal arguments.Quentin Colombet2016-02-111-0/+14
| | | | llvm-svn: 260579
* DwarfDebug: emit type units immediately.Peter Collingbourne2016-02-1110-85/+88
| | | | | | | | | | | | | | | | | | | Rather than storing type units in a vector and emitting them at the end of code generation, emit them immediately and destroy them, reclaiming the memory we were using for their DIEs. In one benchmark carried out against Chromium's 50 largest (by bitcode file size) translation units, total peak memory consumption with type units decreased by median 17%, or by 7% when compared against disabling type units. Tested using check-{llvm,clang}, the GDB 7.5 test suite (with '-fdebug-types-section') and by eyeballing llvm-dwarfdump output on those Chromium translation units with split DWARF both disabled and enabled, and verifying that the only changes were to addresses and abbreviation ordering. Differential Revision: http://reviews.llvm.org/D17118 llvm-svn: 260578
* [codeview] Fix bug around multi-level wrapper inliningReid Kleckner2016-02-111-13/+20
| | | | | | | If there were wrapper functions with no instructions of their own in the inlining tree, we would fail to emit InlineSite records for them. llvm-svn: 260571
* Play nice with Visual Studio and attributesQuentin Colombet2016-02-111-1/+3
| | | | llvm-svn: 260568
* [CMake] Produce an empty library for GlobalISel when not building it.Quentin Colombet2016-02-113-5/+40
| | | | | | | | | | | | | | | | The rational for this change is that LLVMBuild cannot express conditional dependencies. Therefore, when we start optionally using GlobalISel library for say AArch64, without that change, all the tools that use the AArch64 library would need to explicitly link with GlobalISel when we ask for it. This does not scale. Instead, we will set the dependencies between the target and GlobalISel and if we did not ask to build GlobalISel, the library will just be empty. Thanks to Chris Bieneman and Mehdi Animi for the idea. llvm-svn: 260566
* LiveIntervalAnalysis: Support moving of subregister defs in handleMoveMatthias Braun2016-02-111-34/+152
| | | | | | | | | | | | | | | | If two definitions write to independent subregisters then they can be put in any order. LiveIntervalAnalysis::handleMove() did not support this previously because it looks like moving a definition of a vreg past another one. This is a modified version of a patch proposed (two years ago) by Vincent Lejeune! This version does not touch the read-undef flags and is extended for the case of moving a subregister def behind all uses - this can happen for subregister defs that are completely unused. Differential Revision: http://reviews.llvm.org/D9067 llvm-svn: 260565
* [GlobalISel] Teach the IRTranslator how to lower returns.Quentin Colombet2016-02-112-6/+42
| | | | llvm-svn: 260562
* [GlobalISel] Add a type to MachineInstr.Quentin Colombet2016-02-111-5/+20
| | | | | | | | | | | | | | | | | | | | | | | | We actually need that information only for generic instructions, therefore it would be nice not to have to pay the extra memory consumption for all instructions. Especially because a typed non-generic instruction does not make sense. The question is then, is it possible to have that information in a union or something? My initial thought was that we could have a derived class GenericMachineInstr with additional information, but in practice it makes little to no sense since generic MachineInstrs are likely turned into non-generic ones by just switching the opcode. In other words, we don't want to go through the process of creating a new, non-generic MachineInstr, object each time we do this switch. The memory benefit probably is not worth the extra compile time. Another option would be to keep the type of the MachineInstr in a side table. This would induce an extra indirection though. Anyway, I will file a PR to discuss about it and remember we need to come back to it at some point. llvm-svn: 260558
* [GlobalISel] Add a hook in TargetConfigPass to run GlobalISel.Quentin Colombet2016-02-111-2/+14
| | | | llvm-svn: 260553
* [GlobalISel][IRTranslator] Change the ownership of the MIRBuilder field.Quentin Colombet2016-02-111-10/+8
| | | | llvm-svn: 260551
* [GlobalISel][IRTranslator] Fix a typo in assert.Quentin Colombet2016-02-111-1/+1
| | | | llvm-svn: 260550
* [GlobalISel][IRTranslator] Teach the pass how to translate Add instructions.Quentin Colombet2016-02-111-1/+44
| | | | llvm-svn: 260549
* [GlobalISel] Add a MachineIRBuilder class.Quentin Colombet2016-02-112-0/+62
| | | | | | | Helper class to build machine instrs. This is a higher abstraction than MachineInstrBuilder. llvm-svn: 260547
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