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* On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics,Duncan Sands2010-11-201-9/+46
| | | | | | | | | | | so don't claim they are. They are allocated using DAG.getNode, so attempts to access MemSDNode fields results in reading off the end of the allocated memory. This fixes crashes with "llc -debug" due to debug code trying to print MemSDNode fields for these barrier nodes (since the crashes are not deterministic, use valgrind to see this). Add some nasty checking to try to catch this kind of thing in the future. llvm-svn: 119901
* Removing the useless test that I added recently. It was meant as an example, ↵Andrew Trick2010-11-201-3/+6
| | | | | | but not complicated enough to merit another test. llvm-svn: 119898
* RABasic fix. Regalloc is responsible for updating block live ins.Andrew Trick2010-11-201-0/+30
| | | | llvm-svn: 119896
* Whitespace.Andrew Trick2010-11-201-20/+20
| | | | llvm-svn: 119895
* Check for _setjmp too, because it's also used.Bill Wendling2010-11-201-0/+1
| | | | llvm-svn: 119875
* Make isScalarToVector to return false if the node is a scalar. This will preventMon P Wang2010-11-191-0/+2
| | | | | | | DAGCombine from making an illegal transformation of bitcast of a scalar to a vector into a scalar_to_vector. llvm-svn: 119819
* Don't attempt trivial coalescing for sub-register copies.Jakob Stoklund Olesen2010-11-191-0/+4
| | | | | | Patch by Krister Wombell! llvm-svn: 119791
* Change some methods in MCDwarf.cpp to be able to handle an arbitraryRafael Espindola2010-11-191-5/+23
| | | | | | | | | | | | MCStreamer instead of just MCObjectStreamer. Address changes cannot be as efficient as we have to use DW_LNE_set_addres, but at least most of the logic is shared. This will be used so that, with CodeGen still using EmitDwarfLocDirective, llvm-gcc is able to produce debug_line sections without needing an assembler that supports .loc. llvm-svn: 119777
* Move getInitialFrameState() to TargetFrameInfoAnton Korobeynikov2010-11-182-2/+4
| | | | llvm-svn: 119754
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-4/+5
| | | | llvm-svn: 119740
* Fix thinko: we must turn select(anyext, sext) into sext(select)Duncan Sands2010-11-181-1/+2
| | | | | | not anyext(select). Spotted by Frits van Bommel. llvm-svn: 119739
* The DAGCombiner was threading select over pairs of extending loads evenDuncan Sands2010-11-181-0/+5
| | | | | | | | | | if the extension types were not the same. The result was that if you fed a select with sext and zext loads, as in the testcase, then it would get turned into a zext (or sext) of the select, which is wrong in the cases when it should have been an sext (resp. zext). Reported and diagnosed by Sebastien Deldon. llvm-svn: 119728
* Oops, missed this file when remaing ExpandPseudos to ExpandISelPseudos.Dan Gohman2010-11-181-2/+2
| | | | llvm-svn: 119717
* Rename ExpandPseudos to ExpandISelPseudos to help clarify its role.Dan Gohman2010-11-182-11/+11
| | | | llvm-svn: 119716
* Fix typos.Dan Gohman2010-11-181-1/+1
| | | | llvm-svn: 119712
* ExpandPseudos doesn't have any dependencies, so it can use theDan Gohman2010-11-181-3/+1
| | | | | | simple form of INITIALIZE_PASS. llvm-svn: 119707
* Change CodeGen to use .loc directives. This produces a lot more readable outputRafael Espindola2010-11-182-324/+23
| | | | | | | | and testing is easier. A good example is the unknown-location.ll test that now can just look for ".loc 1 0 0". We also don't use a DW_LNE_set_address for every address change anymore. llvm-svn: 119613
* Do not throw away alignment when generating the DAG forDale Johannesen2010-11-181-1/+1
| | | | | | | | memset; we may need it to decide between MOVAPS and MOVUPS later. Adjust a test that was looking for wrong code. PR 3866 / 8675131. llvm-svn: 119605
* Bug 8621 fix - pointer cast stripped from inline asm constraint argument.John Thompson2010-11-171-3/+0
| | | | llvm-svn: 119590
* Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,Evan Cheng2010-11-172-1/+65
| | | | | | | | | | | | | | | | | | | | | and xor. The 32-bit move immediates can be hoisted out of loops by machine LICM but the isel hacks were preventing them. Instead, let peephole optimization pass recognize registers that are defined by immediates and the ARM target hook will fold the immediates in. Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ instructions if there are multiple uses. This happens when the 'and' is live out, machine sink would have sinked the computation and that ends up pessimizing code. The peephole pass would recognize situations where the 'and' can be toggled to define CPSR and eliminate the comparison anyway. 2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking important optimizations. rdar://8663787, rdar://8241368 llvm-svn: 119548
* With the newly simplified SourceMgr interfaces and the generalizedChris Lattner2010-11-171-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SrcMgrDiagHandler, we can improve clang diagnostics for inline asm: instead of reporting them on a source line of the original line, we can report it on the correct line wherever the string literal came from. For something like this: void foo() { asm("push %rax\n" ".code32\n"); } we used to get this: (note that the line in t.c isn't helpful) t.c:4:7: error: warning: ignoring directive for now asm("push %rax\n" ^ <inline asm>:2:1: note: instantiated into assembly here .code32 ^ now we get: t.c:5:8: error: warning: ignoring directive for now ".code32\n" ^ <inline asm>:2:1: note: instantiated into assembly here .code32 ^ Note that we're pointing to line 5 properly now. llvm-svn: 119488
* now that AsmPrinter::EmitInlineAsm is factored right, we can eliminate theChris Lattner2010-11-171-9/+5
| | | | | | | | cookie argument to the SourceMgr diagnostic stuff. This cleanly separates LLVMContext's inlineasm handler from the sourcemgr error handling definition, increasing type safety and cleaning things up. llvm-svn: 119486
* rearrange how the handler in SourceMgr is installed, eliminating the use of Chris Lattner2010-11-171-8/+35
| | | | | | the cookie argument to setDiagHandler llvm-svn: 119483
* refactor the interface to EmitInlineAsm a bit, no functionality change.Chris Lattner2010-11-172-11/+18
| | | | llvm-svn: 119482
* Only avoid the check if we're the last operand before the variableEric Christopher2010-11-171-3/+3
| | | | | | operands in a variadic instruction. llvm-svn: 119446
* Fix grammaro.Dan Gohman2010-11-161-1/+1
| | | | llvm-svn: 119386
* Add ExpandPseudos.cpp.Evan Cheng2010-11-161-0/+1
| | | | llvm-svn: 119385
* Split pseudo-instruction expansion into a separate pass, to make itDan Gohman2010-11-163-13/+87
| | | | | | | easier to debug, and to avoid complications when the CFG changes in the middle of the instruction selection process. llvm-svn: 119382
* Fix emergency spilling in LiveIntervals::spillPhysRegAroundRegDefsUses.Jakob Stoklund Olesen2010-11-161-22/+23
| | | | | | | | | | | | | | Always spill the full representative register at any point where any subregister is live. This fixes PR8620 which caused the old logic to get confused and not spill anything at all. The fundamental problem here is that the coalescer is too aggressive about physical register coalescing. It sometimes makes it impossible to allocate registers without these emergency spills. llvm-svn: 119375
* Print out the register class of the current interval.Jakob Stoklund Olesen2010-11-161-2/+3
| | | | llvm-svn: 119374
* Make the verifier a little quieter on instructions that it's probablyEric Christopher2010-11-161-1/+3
| | | | | | (and likely) wrong about anyhow. llvm-svn: 119320
* Remember to resize SpillSlotToUsesMap when allocating an emergency spill slot.Jakob Stoklund Olesen2010-11-162-19/+19
| | | | | | | | | Use amazing new function call technology instead of writing identical code in multiple places. This fixes PR8604. llvm-svn: 119306
* Fix PR8612 in the standard spiller, take two.Jakob Stoklund Olesen2010-11-161-1/+8
| | | | | | | | | | The live range of a register defined by an early clobber starts at the use slot, not the def slot. Except when it is an early clobber tied to a use operand. Then it starts at the def slot like a standard def. llvm-svn: 119305
* Revert "Fix PR8612 in the standard spiller as well."Jakob Stoklund Olesen2010-11-151-5/+1
| | | | | | This reverts r119183 which borke the buildbots. llvm-svn: 119270
* Code clean up. The peephole pass should be the one updating the instructionEvan Cheng2010-11-151-17/+15
| | | | | | iterator, not TII->OptimizeCompareInstr. llvm-svn: 119186
* Fix PR8612 in the standard spiller as well.Jakob Stoklund Olesen2010-11-151-1/+5
| | | | | | | The live range of a register defined by an early clobber starts at the use slot, not the def slot. llvm-svn: 119183
* When spilling a register defined by an early clobber, make sure that the newJakob Stoklund Olesen2010-11-151-0/+6
| | | | | | | | | | | | | live ranges for the spill register are also defined at the use slot instead of the normal def slot. This fixes PR8612 for the inline spiller. A use was being allocated to the same register as a spilled early clobber def. This problem exists in all the spillers. A fix for the standard spiller is forthcoming. llvm-svn: 119182
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-151-4/+4
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* move the pic base symbol stuff up to MachineFunctionChris Lattner2010-11-141-0/+7
| | | | | | | since it is trivial and will be shared between ppc and x86. This substantially simplifies the X86 backend also. llvm-svn: 119089
* Remove DW_AT_start_scope support. It is incomplete and superseeded by ↵Devang Patel2010-11-122-40/+9
| | | | | | location entries support. llvm-svn: 118940
* typo (4th checkin for one fix)Andrew Trick2010-11-121-1/+1
| | | | llvm-svn: 118913
* Fixes PR8287: SD scheduling time. The fix is a failsafe that preventsAndrew Trick2010-11-121-13/+53
| | | | | | | | | catastrophic compilation time in the event of unreasonable LLVM IR. Code quality is a separate issue--someone upstream needs to do a better job of reducing to llvm.memcpy. If the situation can be reproduced with any supported frontend, then it will be a separate bug. llvm-svn: 118904
* tidy up.Chris Lattner2010-11-121-7/+5
| | | | llvm-svn: 118896
* Fix some style issues in PBQP. Patch by David Blaikie.Lang Hames2010-11-121-20/+25
| | | | llvm-svn: 118883
* Add a FIXME comment.Dan Gohman2010-11-111-0/+2
| | | | llvm-svn: 118803
* Check TRI->getReservedRegs because other allocators do it. Even thoughAndrew Trick2010-11-113-37/+57
| | | | | | | | it makes no sense for allocation_order iterators to visit reserved regs. The inline spiller depends on AliasAnalysis. Manage the Query state to avoid uninitialized or stale results. llvm-svn: 118800
* Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this.Dan Gohman2010-11-111-14/+0
| | | | llvm-svn: 118789
* Delete SplittingSpiller. It was not being used by anyone, and it is beingJakob Stoklund Olesen2010-11-111-286/+1
| | | | | | superceded by SplitKit. llvm-svn: 118754
* Insert two blank SlotIndexes between basic blocks instead of just one.Jakob Stoklund Olesen2010-11-111-2/+6
| | | | | | | | | | | | | | | | | This is the first small step towards using closed intervals for liveness instead of the half-open intervals we're using now. We want to be able to distinguish between a SlotIndex that represents a variable being live-out of a basic block, and an index representing a variable live-in to its successor. That requires two separate indexes between blocks. One for live-outs and one for live-ins. With this change, getMBBEndIdx(MBB).getPrevSlot() becomes stable so it stays greater than any instructions inserted at the end of MBB. llvm-svn: 118747
* No need to add liveness that's already there.Jakob Stoklund Olesen2010-11-101-4/+1
| | | | llvm-svn: 118742
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