| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 115802
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llvm-svn: 115792
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allow target to correctly compute latency for cases where static scheduling
itineraries isn't sufficient. e.g. variable_ops instructions such as
ARM::ldm.
This also allows target without scheduling itineraries to compute operand
latencies. e.g. X86 can return (approximated) latencies for high latency
instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
e.g. ldm and those used by store multiple instructions, e.g. stm.
llvm-svn: 115755
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llvm-svn: 115710
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reusable, but that is no longer relevant since a split will always replace the
original.
llvm-svn: 115709
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llvm-svn: 115708
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llvm-svn: 115696
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never kept after splitting.
Keeping the original interval made sense when the split region doesn't modify
the register, and the original is spilled. We can get the same effect by
detecting reloaded values when spilling around copies.
llvm-svn: 115695
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llvm-svn: 115694
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erasing it from the visited set. That ensures we create the right phi defs.
llvm-svn: 115666
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Insert copy after defining instruction.
Fix LiveIntervalMap::extendTo to properly handle live segments starting before
the current basic block.
Make sure the open live range is extended to the inserted copy's use slot.
llvm-svn: 115665
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llvm-svn: 115650
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llvm-svn: 115649
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of hardware signed integer conversion without
having to do a double cast (uint64_t --> double --> float). This is based on the algorithm from compiler_rt's __floatundisf
for X86-64.
llvm-svn: 115634
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// %a = ...
// %b = and i32 %a, 2
// %c = srl i32 %b, 1
// brcond i32 %c ...
//
// into
//
// %a = ...
// %b = and i32 %a, 2
// %c = setcc eq %b, 0
// brcond %c ...
Make sure it restores local variable N1, which corresponds to the condition operand if it fails to match.
This apparently breaks TCE but since that backend isn't in the tree I don't have a test for it.
llvm-svn: 115571
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PBQP allocator. Problem construction is now done exclusively with the new builders.
llvm-svn: 115502
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llvm-svn: 115408
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scheduling change in svn 115121. The CriticalAntiDepBreaker had bad
liveness information. It was calculating the KillIndices for one scheduling
region in a basic block, rescheduling that region so the KillIndices were
no longer valid, and then using those wrong KillIndices to make decisions
for the next scheduling region. I've not been able to reduce a small
testcase for this. Radar 8502534.
llvm-svn: 115400
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RemoveCopyByCommutingDef.
llvm-svn: 115386
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LiveInterval::MergeValueNumberInto instead of trying to extend LiveRanges and
getting it wrong.
This fixed PR8249 where a valno with a multi-segment live range was defined by
an identity copy created by RemoveCopyByCommutingDef. Some of the live
segments disappeared.
llvm-svn: 115385
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llvm-svn: 115384
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llvm-svn: 115378
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llvm-svn: 115377
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if-conversion heuristic APIs. For now,
stick with a constant estimate of 90% (branch predictors are good!), but we might find that we want to provide
more nuanced estimates in the future.
llvm-svn: 115364
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unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.
llvm-svn: 115323
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llvm-svn: 115310
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llvm-svn: 115300
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llvm-svn: 115294
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The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.
Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics.
MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces. Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.
The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.
llvm-svn: 115243
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edited during emission.
If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.
This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.
The fix is to uipdate stale MBB pointers whenever a block is split during
emission.
llvm-svn: 115191
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llvm-svn: 115102
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pipeline forwarding path.
llvm-svn: 115098
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llvm-svn: 115097
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llvm-svn: 115089
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the CFG, but HAD modified some PHI nodes. Fixes PR8174.
llvm-svn: 115083
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llvm-svn: 115067
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llvm-svn: 115002
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llvm-svn: 114999
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knows about them. This is not necessary on 10.6 and later.
llvm-svn: 114997
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plausible branch prediction
estimates.
llvm-svn: 114981
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if-conversion profitability.
Rather than having arbitrary cutoffs, actually try to cost model the conversion.
For now, the constants are tuned to more or less match our existing behavior, but these will be
changed to reflect realistic values as this work proceeds.
llvm-svn: 114973
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llvm-svn: 114969
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llvm-svn: 114920
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and asserts.
llvm-svn: 114843
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support aligned comm. Detect when compiling for 10.4 and don't
emit an alignment for comm. THis will hopefully fix PR8198.
llvm-svn: 114817
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overhead where possible. Thanks to Jakob for the suggestions.
llvm-svn: 114798
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llvm-svn: 114794
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whether LiveIntervals::getInstructionFromIndex(def) returns NULL.
llvm-svn: 114791
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llvm-svn: 114779
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and it will be removed shortly.
llvm-svn: 114778
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