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* Move private classes into anonymous namespacesBenjamin Kramer2015-03-233-0/+6
| | | | | | NFC. llvm-svn: 232944
* Fix sign extension for MIPS64 in makeLibCall functionPetar Jovanovic2015-03-231-3/+4
| | | | | | | | | | | | Fixing sign extension in makeLibCall for MIPS64. In MIPS64 architecture all 32 bit arguments (int, unsigned int, float 32 (soft float)) must be sign extended. This fixes test "MultiSource/Applications/oggenc/". Patch by Strahinja Petrovic. Differential Revision: http://reviews.llvm.org/D7791 llvm-svn: 232943
* [SDAG] Don't widen VSETCC during type legalization for split operandsHal Finkel2015-03-231-0/+10
| | | | | | | | | | | | Because the operands of a vector SETCC node can be of a different type from the result (and often are), it can happen that even if we'd prefer to widen the result type of the SETCC, the operands have been split instead. In this case, the SETCC result also must be split. This mirrors what is done in WidenVecRes_SELECT, and should be NFC elsewhere because if the operands are not widened the following calls to GetWidenedVector will assert (which is what was happening in the test case). llvm-svn: 232935
* Cache the Function dependent subtarget on the MachineFunction.Eric Christopher2015-03-211-1/+1
| | | | | | | | | | | As preparation for removing the getSubtargetImpl() call from TargetMachine go ahead and flip the switch on caching the function dependent subtarget and remove the bare getSubtargetImpl call from the X86 port. As part of this add a few tests that show we can generate code and assemble on X86 based on features/cpu on the Function. llvm-svn: 232879
* Change getISAEncoding to use the target triple to determineEric Christopher2015-03-211-2/+1
| | | | | | | | thumb-ness similar to the rest of the Module level asm printing infrastructure as debug info finalization happens after the function may be missing. llvm-svn: 232875
* [CodeGen][IfCvt] Don't re-ifcvt blocks with unanalyzable terminators.Ahmed Bougacha2015-03-211-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we couldn't analyze its terminator (i.e., it's an indirectbr, or some other weirdness), we can't safely re-if-convert a predicated block, because we can't tell whether the predicated terminator can fallthrough (it does). Currently, we would completely ignore the fallthrough successor. In the added testcase, this means we used to generate: ... @ %entry: cmp r5, #21 ittt ne @ %cc1f: cmpne r7, #42 @ %cc2t: strne.w r5, [r8] movne pc, r10 @ %cc1t: ... Whereas the successor of %cc1f was originally %bb1. With the fix, we get the correct: ... @ %entry: cmp r5, #21 itt eq @ %cc1t: streq.w r5, [r11] moveq pc, r0 @ %cc1f: cmp r7, #42 itt ne @ %cc2t: strne.w r5, [r8] movne pc, r10 @ %bb1: ... rdar://20192768 Differential Revision: http://reviews.llvm.org/D8509 llvm-svn: 232872
* Fixing a bug with WinEH PHI handlingAndrew Kaylor2015-03-201-1/+19
| | | | llvm-svn: 232851
* Remove dead calls and function arguments dealing with TRI in StackMaps.Eric Christopher2015-03-201-4/+2
| | | | llvm-svn: 232847
* Don't declare all text sections at the start of the .sRafael Espindola2015-03-201-2/+4
| | | | | | | | | | | | | | | | | The code this patch removes was there to make sure the text sections went before the dwarf sections. That is necessary because MachO uses offsets relative to the start of the file, so adding a section can change relaxations. The dwarf sections were being printed at the start just to produce symbols pointing at the start of those sections. The underlying issue was fixed in r231898. The dwarf sections are now printed when they are about to be used, which is after we printed the text sections. To make sure we don't regress, the patch makes the MachO streamer assert if CodeGen puts anything unexpected after the DWARF sections. llvm-svn: 232842
* AsmPrinter: Check subprogram before using itDuncan P. N. Exon Smith2015-03-201-2/+5
| | | | | | | Check return of `getDISubprogram()` before using it. A WIP patch makes `DIDescriptor` accessors more strict (and would crash on this). llvm-svn: 232838
* DwarfDebug: Check for null DebugLocsDuncan P. N. Exon Smith2015-03-201-13/+15
| | | | | | | | | | `DL` might be null, so check for that before using accessors. A WIP patch to make `DIDescriptors` more strict fails otherwise. As a bonus, I think the logic is easier to follow now (despite the extra nesting depth). llvm-svn: 232836
* SelectionDAGBuilder: Rangeify a loop. NFC.Hans Wennborg2015-03-201-8/+6
| | | | llvm-svn: 232831
* SelectionDAGBuilder::handleJTSwitchCase, simplify loop; NFCHans Wennborg2015-03-201-9/+4
| | | | llvm-svn: 232830
* [ARM] Fix handling of thumb1 out-of-range frame offsetsJohn Brawn2015-03-201-5/+7
| | | | | | | | | | | | | | | | LocalStackSlotPass assumes that isFrameOffsetLegal doesn't change its answer when the base register changes. Unfortunately this isn't true in thumb1, where SP-based loads allow a larger offset than non-SP-based loads, and this causes the base register reuse code to generate instructions that are unencodable, causing an assertion failure. Solve this by adding a BaseReg parameter to isFrameOffsetLegal, which ARMBaseRegisterInfo can then make use of to give the correct answer. Differential Revision: http://reviews.llvm.org/D8419 llvm-svn: 232825
* Rewrite StackMap location handling to pre-compute the dwarf registerEric Christopher2015-03-201-83/+95
| | | | | | | | | | | | numbers before emission. This removes a dependency on being able to access TRI at the module level and is similar to the DwarfExpression handling. I've modified the debug support into print/dump routines that'll do the same dumping but is now callable anywhere and if TRI isn't available will go ahead and just print out raw register numbers. llvm-svn: 232821
* At the beginning of doFinalization set the MachineFunction toEric Christopher2015-03-201-0/+5
| | | | | | | | nullptr so that users get an earlier dereferencing error and so that we can use it to conditionalize access to MachineFunction specific data. llvm-svn: 232820
* [MBP] Don't outline short optional branchesDaniel Jasper2015-03-201-2/+25
| | | | | | | | | | | | | | | | | | With the option -outline-optional-branches, LLVM will place optional branches out of line (more details on r231230). With this patch, this is not done for short optional branches. A short optional branch is a branch containing a single block with an instruction count below a certain threshold (defaulting to 3). Still everything is guarded under -outline-optional-branches). Outlining a short branch can't significantly improve code locality. It can however decrease performance because of the additional jmp and in cases where the optional branch is hot. This fixes a compile time regression I have observed in a benchmark. Review: http://reviews.llvm.org/D8108 llvm-svn: 232802
* Rewrite SelectionDAGBuilder::Clusterify to run in linear time. NFC.Hans Wennborg2015-03-202-46/+37
| | | | | | | It was previously repeatedly erasing elements from the middle of a vector, causing O(n^2) worst-case run-time. llvm-svn: 232789
* Use the cached subtarget on the MachineFunction when the AsmPrinterEric Christopher2015-03-191-1/+1
| | | | | | | will have a MachineFunction, i.e. in places other than the module level doInitialize/doFinalize. llvm-svn: 232783
* Use the cached subtarget off of the machine function.Eric Christopher2015-03-191-8/+7
| | | | llvm-svn: 232782
* Fix a nasty bug in DAGCombine of STORE nodes.Owen Anderson2015-03-191-3/+8
| | | | | | | | | | | | | | | This is very related to the bug fixed in r174431. The problem is that SelectionDAG does not include alignment in the uniquing of loads and stores. When an otherwise no-op DAGCombine would increase the alignment of a load or store, the original node would be returned (with the alignment increased), which would cause the node not to be processed by any further DAGCombines. I don't have a direct testcase for this that manifests on an in-tree target, but I did see some noise in the tests for other targets and have updated them for it. llvm-svn: 232780
* Remove unused headers.Eric Christopher2015-03-191-4/+0
| | | | llvm-svn: 232777
* Add an MCSubtargetInfo variable to the TargetMachine.Eric Christopher2015-03-191-2/+8
| | | | | | | | | This enables us to remove calls to the subtarget from the TargetMachine and with a small hack for backends that require global subtarget information for module level code generation, e.g. mips abi flags, as mentioned in a fixme in the code. llvm-svn: 232776
* Add a TargetMachine local MCRegisterInfo and MCInstrInfo so thatEric Christopher2015-03-191-13/+14
| | | | | | | they can be used without a subtarget in constructing subtarget independent passes. llvm-svn: 232775
* WinEH: Make llvm.eh.actions emission match the EH docsReid Kleckner2015-03-191-8/+5
| | | | | | | | | This switches the sense of the i32 values and updates the test cases. We can also use CHECK-SAME to clean up some tests, and reduce the visual noise from bitcasts. llvm-svn: 232774
* Verifier: Remove the separate -verify-di passDuncan P. N. Exon Smith2015-03-191-9/+1
| | | | | | | | | | | | | | Remove `DebugInfoVerifierLegacyPass` and the `-verify-di` pass. Instead, call into the `DebugInfoVerifier` from inside `VerifierLegacyPass::finalizeModule()`. This better matches the logic in `verifyModule()` (used by the new PassManager), avoids requiring two separate passes to verify the IR, and makes the API for "add a pass to verify the IR" simple. Note: the `-verify-debug-info` flag still works (for now, at least; eventually it might make sense to just remove it). llvm-svn: 232772
* Switch lowering: extract NextBlock function. NFC.Hans Wennborg2015-03-192-54/+24
| | | | llvm-svn: 232759
* Switch lowering: remove unnecessary ConstantInt casts. NFC.Hans Wennborg2015-03-192-34/+29
| | | | llvm-svn: 232729
* Internalize PEI. NFC.Benjamin Kramer2015-03-192-79/+48
| | | | llvm-svn: 232722
* SelectionDAGBuilder: update comment in HandlePHINodesInSuccessorBlocks.Hans Wennborg2015-03-191-2/+2
| | | | | | | From what I can tell, the code is checking for PHIs that expect any value from this block, not just constants. llvm-svn: 232697
* Do not track subregister liveness when it brings no benefitsMatthias Braun2015-03-196-11/+12
| | | | | | | | | | | Some subregisters are only to indicate different access sizes, while not providing any way to actually divide the register up into multiple disjunct parts. Avoid tracking subregister liveness in these cases as it is not beneficial. Differential Revision: http://reviews.llvm.org/D8429 llvm-svn: 232695
* SelectionDAGIsel: Fix comment about terminators being "handled below".Hans Wennborg2015-03-191-3/+2
| | | | | | That changed in r102128. llvm-svn: 232692
* [CodeGenPrepare] Remove broken, dead, code.Quentin Colombet2015-03-181-26/+6
| | | | | | NFC. llvm-svn: 232690
* Revert "Add a TargetMachine local MCRegisterInfo and MCInstrInfo so that"Eric Christopher2015-03-181-11/+9
| | | | | | | | Committed too early. This reverts commit r232666. llvm-svn: 232667
* Add a TargetMachine local MCRegisterInfo and MCInstrInfo so thatEric Christopher2015-03-181-9/+11
| | | | | | | they can be used without a subtarget in constructing subtarget independent passes. llvm-svn: 232666
* Use WinEHPrepare to outline SEH finally blocksReid Kleckner2015-03-181-41/+109
| | | | | | | | | | | No outlining is necessary for SEH catch blocks. Use the blockaddr of the handler in place of the usual outlined function. Reviewers: majnemer, andrew.w.kaylor Differential Revision: http://reviews.llvm.org/D8370 llvm-svn: 232664
* [ARM] Align stack objects passed to memory intrinsicsJohn Brawn2015-03-181-0/+36
| | | | | | | | | | | | Memcpy, and other memory intrinsics, typically tries to use LDM/STM if the source and target addresses are 4-byte aligned. In CodeGenPrepare look for calls to memory intrinsics and, if the object is on the stack, 4-byte align it if it's large enough that we expect that memcpy would want to use LDM/STM to copy it. Differential Revision: http://reviews.llvm.org/D7908 llvm-svn: 232627
* DAGCombiner: fold (xor (shl 1, x), -1) -> (rotl ~1, x)David Majnemer2015-03-181-0/+26
| | | | | | | | | | Targets which provide a rotate make it possible to replace a sequence of (XOR (SHL 1, x), -1) with (ROTL ~1, x). This saves an instruction on architectures like X86 and POWER(64). Differential Revision: http://reviews.llvm.org/D8350 llvm-svn: 232572
* COFF: Let globals with private linkage reside in their own sectionDavid Majnemer2015-03-171-0/+16
| | | | | | | | | | COFF COMDATs (for selection kinds other than 'select any') require at least one non-section symbol in the symbol table. Satisfy this by morally enhancing the linkage from private to internal. Differential Revision: http://reviews.llvm.org/D8394 llvm-svn: 232570
* XformToShuffleWithZero - Added clearer early outs and general tidy up. NFCISimon Pilgrim2015-03-171-31/+38
| | | | llvm-svn: 232557
* Emit the offset directly instead of creating a dummy expression.Rafael Espindola2015-03-171-26/+1
| | | | | | | | We were creating an expression of the form (S+C)-S which is just C. Patch by Frédéric Riss. I just added the testcase. llvm-svn: 232549
* Revert "COFF: Let globals with private linkage reside in their own section"David Majnemer2015-03-171-24/+0
| | | | | | This reverts commit r232539. This was committed accidently. llvm-svn: 232543
* Revert "Address review comments"David Majnemer2015-03-171-2/+7
| | | | | | This reverts commit r232540. This was committed accidently. llvm-svn: 232541
* Address review commentsDavid Majnemer2015-03-171-7/+2
| | | | llvm-svn: 232540
* COFF: Let globals with private linkage reside in their own sectionDavid Majnemer2015-03-171-0/+24
| | | | | | | | | | | | | | | Summary: COFF COMDATs (for selection kinds other than 'select any') require at least one non-section symbol in the symbol table. Satisfy this by morally enhancing the linkage from private to internal. Reviewers: rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8374 llvm-svn: 232539
* Centralize the handling of unique ids for temporary labels.Rafael Espindola2015-03-176-31/+16
| | | | | | | | | | | | | | | | Before this patch code wanting to create temporary labels for a given entity (function, cu, exception range, etc) had to keep its own counter to have stable symbol names. createTempSymbol would still add a suffix to make sure a new symbol was always returned, but it kept a single counter. Because of that, if we were to use just createTempSymbol("cu_begin"), the label could change from cu_begin42 to cu_begin43 because some other code started using temporary labels. Simplify this by just keeping one counter per prefix and removing the various specialized counters. llvm-svn: 232535
* Remove the error prone GetTempSymbol API.Rafael Espindola2015-03-171-12/+0
| | | | llvm-svn: 232487
* Convert the last 4 users of GetTempSymbol to createTempSymbol.Rafael Espindola2015-03-171-2/+2
| | | | | | Despite using the same name these are unrelated. llvm-svn: 232485
* Make EmitFunctionHeader a private helper.Rafael Espindola2015-03-171-0/+2
| | | | llvm-svn: 232481
* Convert the easy cases of GetTempSymbol to createTempSymbol.Rafael Espindola2015-03-175-6/+6
| | | | | | | In these cases no code was depending on GetTempSymbol finding an existing symbol. llvm-svn: 232478
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