summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
* DebugInfo: Hash DW_FORM_GNU_str_index as a string.David Blaikie2013-10-211-1/+3
| | | | | | | | | | Found while adding type safety to the various DWARF enumerations (form, attribute, tag, etc) that caused Clang to warn on an incompletely covered switch. Converting the comment to a default/unreachable uncovered this case of an unsupported form encoding. Seems we were skipping fission strings entirely. llvm-svn: 193089
* Emit prefix data after debug and EH directives.Peter Collingbourne2013-10-201-4/+4
| | | | | | | | | This ensures that the prefix data is treated as part of the function for the purpose of debug info. This provides a better debugging experience, among other things by allowing a debug info client to correctly look up a function in debug info given a function pointer. llvm-svn: 193042
* Remove unused variable.Benjamin Kramer2013-10-191-2/+1
| | | | llvm-svn: 193038
* Reformat.Eric Christopher2013-10-191-80/+73
| | | | llvm-svn: 193024
* Fix up a few minor performance problems spotted in code review.Eric Christopher2013-10-191-7/+6
| | | | llvm-svn: 193023
* Debug Info: add a newly-created DIE to a parent in the same function.Manman Ren2013-10-182-24/+29
| | | | | | | | | | With this commit, all DIEs created in CompileUnit will be added to parents inside the same function. Also make getOrCreateTemplateType|Value functions private. No functionality change. llvm-svn: 193002
* Debug Info: simplify code a bit.Manman Ren2013-10-181-1/+1
| | | | llvm-svn: 193001
* Revert the rest of r192749 to bring back the buildbot. These twoEric Christopher2013-10-181-2/+4
| | | | | | error messages should not be able to occur at the same time. llvm-svn: 192985
* [PATCH] Fix PR17168 (DAG scheduler inserts DBG_VALUE before PHI with fast-isel)Bill Schmidt2013-10-181-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | PR17168 describes a test case that fails when compiling for debug with fast-isel. Investigation showed that the test was failing because a DBG_VALUE machine instruction was placed prior to a PHI. For this problem to occur requires the following: * Compile for debug * Compile with fast-isel * In a block B, fast-isel must partially succeed before punting to DAG-isel * B must start with a PHI * The first unhandled node in the DAG must not generate a machine instruction * A debug value with an order less than that of that first node exists When all of these circumstances apply, the existing test that an instruction was not inserted won't fire. Currently it tests whether the block is empty, or whether the last instruction generated is a phi. When fast-isel has partially succeeded, the last instruction generated will not be a phi. Instead, we need to check whether the current insert position is immediately following a phi. This patch adds that check, and adds the test case from the PR as a regression test. llvm-svn: 192976
* CodeGen: Emit a libcall if the target doesn't support 16-byte wide atomicsDavid Majnemer2013-10-183-0/+24
| | | | | | | | | | There are targets that support i128 sized scalars but cannot emit instructions that modify them directly. The proper thing to do is to emit a libcall. This fixes PR17481. llvm-svn: 192957
* Temporarily revert r192749 as it is causing problems for LTO andEric Christopher2013-10-181-2/+8
| | | | | | requires a more in depth change to the IR structure. llvm-svn: 192938
* DIEHash: Add more things (and remove one character) from the COLLECT_ATTR macroDavid Blaikie2013-10-171-149/+53
| | | | | | | Makes the uses more terse and requires that they use a semicolon at the end that helps editors indent proceeding lines correctly. llvm-svn: 192925
* DIEHash: Support for simple (non-recursive, non-reused) type referencesDavid Blaikie2013-10-172-6/+32
| | | | llvm-svn: 192924
* Replace sra with srl if a single sign bit is requiredRichard Sandiford2013-10-171-3/+14
| | | | | | E.g. (and (sra (i32 x) 31) 2) -> (and (srl (i32 x) 30) 2). llvm-svn: 192884
* Fix edge condition in DAGCombiner to improve codegen of shift sequences.Andrea Di Biagio2013-10-171-0/+1
| | | | | | | | | | | | When canonicalizing dags according to the rule (shl (zext (shr X, c1) ), c1) ==> (zext (shl (shr X, c1), c1)) remember to add the new shl dag to the DAGCombiner worklist of nodes. If we don't explicitly add it to the worklist of nodes to visit, we may not trigger later on the rule that folds the shift left + logical shift right into a AND instruction with bitmask. llvm-svn: 192883
* According to the dwarf standard pubnames and pubtypes for languagesEric Christopher2013-10-173-9/+58
| | | | | | | | | | | like C++ should be the fully qualified names for the type. Add a routine that does a language specific context walk to build up the qualified name and use it when we add types/names to the tables. Expand the gnu pubnames testcase as it's the most complex to make sure that qualified types are also being added. llvm-svn: 192865
* [projects/test-suite] White space and long line fixes.Jack Carter2013-10-171-15/+21
| | | | | | No functionality changes. llvm-svn: 192863
* Add the subprogram DIEs to the context they're created with onlyEric Christopher2013-10-171-3/+6
| | | | | | | if they're a declaration, otherwise they're owned by the compile unit. llvm-svn: 192861
* DIEHash: Include the type's context in the type hash.David Blaikie2013-10-171-0/+3
| | | | llvm-svn: 192856
* DIEHash: Use DW_FORM_sdata for integers, per spec.David Blaikie2013-10-162-5/+28
| | | | | | | This allows us to produce the same hash as GCC for at least some simple examples. llvm-svn: 192855
* Remove ambiguity introduced in r192836David Blaikie2013-10-161-1/+1
| | | | llvm-svn: 192840
* DIEHash: Include the trailing zero byte after the children of a DIEDavid Blaikie2013-10-161-0/+3
| | | | llvm-svn: 192836
* After PostRA scheduling, don't set kill flags on undef operands.Andrew Trick2013-10-161-2/+2
| | | | | | This should fix the ATOM buildbot failing on break-avx-dep.ll. llvm-svn: 192824
* DAGCombiner: Don't fold xor into not if getNOT would introduce an illegal ↵Benjamin Kramer2013-10-161-1/+1
| | | | | | | | | | | constant. This happens e.g. with <2 x i64> -1 on x86_32. It cannot be generated directly because i64 is illegal. It would be nice if getNOT would handle this transparently, but I don't see a way to generate a legal constant there right now. Fixes PR17487. llvm-svn: 192795
* Handle (shl (anyext (shr ...))) in SimpilfyDemandedBitsRichard Sandiford2013-10-161-0/+25
| | | | | | | | | | This is really an extension of the current (shl (shr ...)) -> shl optimization. The main difference is that certain upper bits must also not be demanded. The motivating examples are the first two in the testcase, which occur in llvmpipe output. llvm-svn: 192783
* Add support for metadata representing .ident directives.Rafael Espindola2013-10-161-0/+18
| | | | llvm-svn: 192764
* Fix a pair of bugs in the emission of pubname tables:Eric Christopher2013-10-162-6/+16
| | | | | | | | | | | | | | | | 1) Make sure we emit static member variables by checking at the end of createGlobalVariableDIE rather than piecemeal in the function. (As a note, createGlobalVariableDIE needs rewriting.) 2) Make sure we use the definition rather than declaration DIE for two things: a) determining linkage for gnu pubnames, and b) as the address of the DIE for global variables. (As a note, createGlobalVariableDIE really needs rewriting.) Adjust the testcase to make sure we're checking the correct DIEs. llvm-svn: 192761
* Simplify zero initialization of DIEAttrs variable.David Blaikie2013-10-161-2/+1
| | | | llvm-svn: 192755
* Make sure we're not attempting to construct a subprogram DIEEric Christopher2013-10-151-16/+18
| | | | | | | | twice and just look up the value. Fix the one case where we were trying to create a subprogram DIE and we should already have had one. Reflow formatting in collectDeadVariables while fixing. llvm-svn: 192749
* Remove some dead code. (DarwinGDBCompat was retired in r189903).Adrian Prantl2013-10-152-13/+2
| | | | llvm-svn: 192731
* Guard the debug temp variable with NDEBUG to avoid warning/error with NDEBUG ↵Pekka Jaaskelainen2013-10-151-0/+2
| | | | | | defined. llvm-svn: 192709
* Do not assert when trying to add a meta data operand withPekka Jaaskelainen2013-10-151-1/+2
| | | | | | MachineInstr::addOperand(). llvm-svn: 192707
* Improve on r192635, ExeDepsFix for avx, and add a test case.Andrew Trick2013-10-151-1/+3
| | | | | | | | | rdar:15221834 False AVX register dependencies cause 5x slowdown on flops-5/6 and significant slowdown on several others. This was blocking the switch to MI-Sched. llvm-svn: 192669
* Fix the ExecutionDepsFix pass to handle AVX instructions.Andrew Trick2013-10-141-22/+93
| | | | | | | | | | | | | | | | | | | | | | | | This pass is needed to break false dependencies. Without it, unlucky register assignment can result in wild (5x) swings in performance. This pass was trying to handle AVX but not getting it right. AVX doesn't have partial register defs, it has unused register reads in which the high bits of a source operand are copied into the unused bits of the dest. Fixing this requires conservative liveness analysis. This is awkard because the pass already has its own pseudo-liveness. However, proper liveness is expensive, and we would like to use a generic utility to compute it. The fix only invokes liveness on-demand. It is rare to detect a case that needs undef-read dependence breaking, but when it happens, it can be needed many times within a very large block. I think the existing heuristic which uses a register window of 16 is too conservative for loop-carried false dependencies. If the loop is a reduction. The out-of-order engine may be able to execute several loop iterations in parallel. However, I'll leave this tuning exercise for next time. llvm-svn: 192635
* LiveRegUnits: Use *MBB for consistency and convenience.Andrew Trick2013-10-142-9/+9
| | | | llvm-svn: 192634
* LiveRegUnits::removeRegsInMask safety.Andrew Trick2013-10-141-10/+19
| | | | | | | | | Clobbering is exclusive not inclusive on register units. For liveness, we need to consider all the preserved registers. e.g. A regmask that clobbers YMM0 may preserve XMM0. Units are only clobbered when all super-registers are clobbered. llvm-svn: 192623
* Use a SparseSet in LiveRegUnits.Andrew Trick2013-10-141-19/+18
| | | | | | | | | | Some clients may add block live ins and may track liveness over a large scope. This guarantees an efficient implementation in all cases with no memory allocation/deallocation, independent of the number of target registers. It could be slightly less convenient but is fine in the expected case. llvm-svn: 192622
* Move LiveRegUnits implementation into .cpp. Comment and format.Andrew Trick2013-10-142-0/+103
| | | | llvm-svn: 192621
* Convert LiveRegUnits methods to the current convention (it's new code).Andrew Trick2013-10-141-12/+12
| | | | llvm-svn: 192619
* Debug Info: static member DIE creation.Manman Ren2013-10-142-14/+24
| | | | | | | | | | | | | Clean up creation of static member DIEs. We can create static member DIEs from two places, so we call getOrCreateStaticMemberDIE from the two places. getOrCreateStaticMemberDIE will get or create the context DIE first, then it will check if the DIE already exists, if not, we create the static member DIE and add it to the context. Creation of static member DIEs are handled in a similar way as subprogram DIEs. llvm-svn: 192618
* Fix indenting.David Blaikie2013-10-141-7/+8
| | | | | | That wasn't confusing /at all/... llvm-svn: 192617
* MachineSink: Fix and tweak critical-edge breaking heuristic.Will Dietz2013-10-141-7/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Per original comment, the intention of this loop is to go ahead and break the critical edge (in order to sink this instruction) if there's reason to believe doing so might "unblock" the sinking of additional instructions that define registers used by this one. The idea is that if we have a few instructions to sink "together" breaking the edge might be worthwhile. This commit makes a few small changes to help better realize this goal: First, modify the loop to ignore registers defined by this instruction. We don't sink definitions of physical registers, and sinking an SSA definition isn't going to unblock an upstream instruction. Second, ignore uses of physical registers. Instructions that define physical registers are rejected for sinking, and so moving this one won't enable moving any defining instructions. As an added bonus, while virtual register use-def chains are generally small due to SSA goodness, iteration over the uses and definitions (used by hasOneNonDBGUse) for physical registers like EFLAGS can be rather expensive in practice. (This is the original reason for looking at this) Finally, to keep things simple continue to only consider this trick for registers that have a single use (via hasOneNonDBGUse), but to avoid spuriously breaking critical edges only do so if the definition resides in the same MBB and therefore this one directly blocks it from being sunk as well. If sinking them together is meant to be, let the iterative nature of this pass sink the definition into this block first. Update tests to accomodate this change, add new testcase where sinking avoids pipeline stalls. llvm-svn: 192608
* Remove the now unused strong phi elimination pass.Rafael Espindola2013-10-144-841/+3
| | | | llvm-svn: 192604
* Fixed a bug in dynamic allocation memory on stack.Elena Demikhovsky2013-10-141-3/+3
| | | | | | | | The alignment of allocated space was wrong, see Bugzila 17345. Done by Zvi Rackover <zvi.rackover@intel.com>. llvm-svn: 192573
* TargetLowering: Don't index into empty string.Will Dietz2013-10-131-1/+1
| | | | | | (This is triggered by current lit tests) llvm-svn: 192549
* Debug Info: remove form from function addDIEEntry.Manman Ren2013-10-113-26/+17
| | | | | | | | | The form must be a reference form in addDIEEntry. Which reference form to use will be decided by the callee. No functionality change. llvm-svn: 192517
* fConversion: Attempt #2 at fixing the MSVC build.Benjamin Kramer2013-10-111-2/+2
| | | | llvm-svn: 192492
* IfConversion: Try to unbreak the MSVC build.Benjamin Kramer2013-10-111-1/+1
| | | | llvm-svn: 192487
* Remove kill flags after if conversion if necessaryMatthias Braun2013-10-111-66/+89
| | | | | | | | | | | | | | | | | | | When if converting something like: true: ... = R0<kill> false: ... = R0<kill> then the instructions of the true block must not have a <kill> flag anymore, as the instruction of the false block follow and do still read the R0 value. Specifically this patch determines the set of register live-in in the false block (possibly after simulating the liveness changes of the duplicated instructions). Each of these live-in registers mustn't be killed. llvm-svn: 192482
* [DAGCombiner] Reapply load slicing (192471) with a test that explicitly set ↵Quentin Colombet2013-10-111-2/+574
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sse4.2 support. This should fix the buildbots. Original commit message: [DAGCombiner] Slice a big load in two loads when the element are next to each other in memory and the target has paired load and performs post-isel loads combining. E.g., this optimization will transform something like this: a = load i64* addr b = trunc i64 a to i32 c = lshr i64 a, 32 d = trunc i64 c to i32 into: b = load i32* addr1 d = load i32* addr2 Where addr1 = addr2 +/- sizeof(i32), if the target supports paired load and performs post-isel loads combining. One should overload TargetLowering::hasPairedLoad to provide this information. The default is false. <rdar://problem/14477220> llvm-svn: 192476
OpenPOWER on IntegriCloud