summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
* Remove unneeded zero arrays.Benjamin Kramer2010-12-042-4/+2
| | | | llvm-svn: 120910
* Rename virtRegMap to avoid confusion with the VirtRegMap that it isn't.Jakob Stoklund Olesen2010-12-031-5/+5
| | | | llvm-svn: 120846
* Coalesce debug locations when possible, causing less DBG_VALUE instructions toJakob Stoklund Olesen2010-12-031-2/+34
| | | | | | be emitted. llvm-svn: 120845
* Emit DBG_VALUE instructions from LiveDebugVariables.Jakob Stoklund Olesen2010-12-033-2/+192
| | | | llvm-svn: 120842
* Also update virtRegMap when renaming virtual registers.Jakob Stoklund Olesen2010-12-031-1/+11
| | | | llvm-svn: 120841
* Delete the StrongPHIElimination pass, leaving only a shell.Jakob Stoklund Olesen2010-12-031-1018/+22
| | | | | | | | | | The StrongPHIElimination pass did not work, and nobody has worked on it for two years. A rewrite is underway, so I am leaving this shell pass instead of deleting it completely. llvm-svn: 120830
* Update LiveDebugVariables during coalescing.Jakob Stoklund Olesen2010-12-023-0/+56
| | | | llvm-svn: 120720
* Implement the first half of LiveDebugVariables.Jakob Stoklund Olesen2010-12-024-5/+514
| | | | | | | | | | | | | | | | | | | Scan the MachineFunction for DBG_VALUE instructions, and replace them with a data structure similar to LiveIntervals. The live range of a DBG_VALUE is determined by propagating it down the dominator tree until a new DBG_VALUE is found. When a DBG_VALUE lives in a register, its live range is confined to the live range of the register's value. LiveDebugVariables runs before coalescing, so DBG_VALUEs are not artificially extended when registers are joined. The missing half will recreate DBG_VALUE instructions from the intervals when register allocation is complete. The pass is disabled by default. It can be enabled with the temporary command line option -live-debug-variables. llvm-svn: 120636
* PR5207: Rename overloaded APInt methods set(), clear(), flip() toJay Foad2010-12-013-7/+7
| | | | | | setAllBits(), setBit(unsigned), etc. llvm-svn: 120564
* Comment typo.Andrew Trick2010-11-301-1/+1
| | | | llvm-svn: 120504
* Enable sibling call optimization of libcalls which are expanded duringEvan Cheng2010-11-302-6/+35
| | | | | | | | | | | legalization time. Since at legalization time there is no mapping from SDNode back to the corresponding LLVM instruction and the return SDNode is target specific, this requires a target hook to check for eligibility. Only x86 and ARM support this form of sibcall optimization right now. rdar://8707777 llvm-svn: 120501
* Coding style. No significant functionality. Abandon linear scan styleAndrew Trick2010-11-304-524/+548
| | | | | | | | in favor of the widespread llvm style. Capitalize variables and add newlines for visual parsing. Rename variables for readability. And other cleanup. llvm-svn: 120490
* add TLI support indicating that jumps are more expensive than logical operationsChris Lattner2010-11-302-1/+4
| | | | | | and use this to disable a specific optimization. Patch by Micah Villmow! llvm-svn: 120435
* PR5207: Make APInt::set(), APInt::clear() and APInt::flip() return void.Jay Foad2010-11-301-2/+3
| | | | llvm-svn: 120413
* Stub out a new LiveDebugVariables pass.Jakob Stoklund Olesen2010-11-304-0/+109
| | | | | | | | | | | | | This analysis is going to run immediately after LiveIntervals. It will stay alive during register allocation and keep track of user variables mentioned in DBG_VALUE instructions. When the register allocator is moving values between registers and the stack, it is very hard to keep track of DBG_VALUE instructions. We usually get it wrong. This analysis maintains a data structure that makes it easy to update DBG_VALUE instructions. llvm-svn: 120385
* Merge System into Support.Michael J. Spencer2010-11-295-5/+5
| | | | llvm-svn: 120298
* Fix a comment typo.Bob Wilson2010-11-281-1/+1
| | | | llvm-svn: 120235
* Move more PEI-related hooks to TFIAnton Korobeynikov2010-11-271-2/+4
| | | | llvm-svn: 120229
* Move callee-saved regs spills / reloads to TFIAnton Korobeynikov2010-11-271-2/+3
| | | | llvm-svn: 120228
* Namespacify.Benjamin Kramer2010-11-251-2/+2
| | | | llvm-svn: 120146
* Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.Wesley Peck2010-11-2313-518/+516
| | | | llvm-svn: 119990
* Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization.Benjamin Kramer2010-11-221-1/+47
| | | | | | | This currently only catches the most basic case, a two-case switch, but can be extended later. llvm-svn: 119964
* Move some more hooks to TargetFrameInfoAnton Korobeynikov2010-11-202-5/+5
| | | | llvm-svn: 119904
* Silence Release build warnings about unused functions.Benjamin Kramer2010-11-201-0/+2
| | | | llvm-svn: 119903
* On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics,Duncan Sands2010-11-201-9/+46
| | | | | | | | | | | so don't claim they are. They are allocated using DAG.getNode, so attempts to access MemSDNode fields results in reading off the end of the allocated memory. This fixes crashes with "llc -debug" due to debug code trying to print MemSDNode fields for these barrier nodes (since the crashes are not deterministic, use valgrind to see this). Add some nasty checking to try to catch this kind of thing in the future. llvm-svn: 119901
* Removing the useless test that I added recently. It was meant as an example, ↵Andrew Trick2010-11-201-3/+6
| | | | | | but not complicated enough to merit another test. llvm-svn: 119898
* RABasic fix. Regalloc is responsible for updating block live ins.Andrew Trick2010-11-201-0/+30
| | | | llvm-svn: 119896
* Whitespace.Andrew Trick2010-11-201-20/+20
| | | | llvm-svn: 119895
* Check for _setjmp too, because it's also used.Bill Wendling2010-11-201-0/+1
| | | | llvm-svn: 119875
* Make isScalarToVector to return false if the node is a scalar. This will preventMon P Wang2010-11-191-0/+2
| | | | | | | DAGCombine from making an illegal transformation of bitcast of a scalar to a vector into a scalar_to_vector. llvm-svn: 119819
* Don't attempt trivial coalescing for sub-register copies.Jakob Stoklund Olesen2010-11-191-0/+4
| | | | | | Patch by Krister Wombell! llvm-svn: 119791
* Change some methods in MCDwarf.cpp to be able to handle an arbitraryRafael Espindola2010-11-191-5/+23
| | | | | | | | | | | | MCStreamer instead of just MCObjectStreamer. Address changes cannot be as efficient as we have to use DW_LNE_set_addres, but at least most of the logic is shared. This will be used so that, with CodeGen still using EmitDwarfLocDirective, llvm-gcc is able to produce debug_line sections without needing an assembler that supports .loc. llvm-svn: 119777
* Move getInitialFrameState() to TargetFrameInfoAnton Korobeynikov2010-11-182-2/+4
| | | | llvm-svn: 119754
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-4/+5
| | | | llvm-svn: 119740
* Fix thinko: we must turn select(anyext, sext) into sext(select)Duncan Sands2010-11-181-1/+2
| | | | | | not anyext(select). Spotted by Frits van Bommel. llvm-svn: 119739
* The DAGCombiner was threading select over pairs of extending loads evenDuncan Sands2010-11-181-0/+5
| | | | | | | | | | if the extension types were not the same. The result was that if you fed a select with sext and zext loads, as in the testcase, then it would get turned into a zext (or sext) of the select, which is wrong in the cases when it should have been an sext (resp. zext). Reported and diagnosed by Sebastien Deldon. llvm-svn: 119728
* Oops, missed this file when remaing ExpandPseudos to ExpandISelPseudos.Dan Gohman2010-11-181-2/+2
| | | | llvm-svn: 119717
* Rename ExpandPseudos to ExpandISelPseudos to help clarify its role.Dan Gohman2010-11-182-11/+11
| | | | llvm-svn: 119716
* Fix typos.Dan Gohman2010-11-181-1/+1
| | | | llvm-svn: 119712
* ExpandPseudos doesn't have any dependencies, so it can use theDan Gohman2010-11-181-3/+1
| | | | | | simple form of INITIALIZE_PASS. llvm-svn: 119707
* Change CodeGen to use .loc directives. This produces a lot more readable outputRafael Espindola2010-11-182-324/+23
| | | | | | | | and testing is easier. A good example is the unknown-location.ll test that now can just look for ".loc 1 0 0". We also don't use a DW_LNE_set_address for every address change anymore. llvm-svn: 119613
* Do not throw away alignment when generating the DAG forDale Johannesen2010-11-181-1/+1
| | | | | | | | memset; we may need it to decide between MOVAPS and MOVUPS later. Adjust a test that was looking for wrong code. PR 3866 / 8675131. llvm-svn: 119605
* Bug 8621 fix - pointer cast stripped from inline asm constraint argument.John Thompson2010-11-171-3/+0
| | | | llvm-svn: 119590
* Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,Evan Cheng2010-11-172-1/+65
| | | | | | | | | | | | | | | | | | | | | and xor. The 32-bit move immediates can be hoisted out of loops by machine LICM but the isel hacks were preventing them. Instead, let peephole optimization pass recognize registers that are defined by immediates and the ARM target hook will fold the immediates in. Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ instructions if there are multiple uses. This happens when the 'and' is live out, machine sink would have sinked the computation and that ends up pessimizing code. The peephole pass would recognize situations where the 'and' can be toggled to define CPSR and eliminate the comparison anyway. 2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking important optimizations. rdar://8663787, rdar://8241368 llvm-svn: 119548
* With the newly simplified SourceMgr interfaces and the generalizedChris Lattner2010-11-171-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SrcMgrDiagHandler, we can improve clang diagnostics for inline asm: instead of reporting them on a source line of the original line, we can report it on the correct line wherever the string literal came from. For something like this: void foo() { asm("push %rax\n" ".code32\n"); } we used to get this: (note that the line in t.c isn't helpful) t.c:4:7: error: warning: ignoring directive for now asm("push %rax\n" ^ <inline asm>:2:1: note: instantiated into assembly here .code32 ^ now we get: t.c:5:8: error: warning: ignoring directive for now ".code32\n" ^ <inline asm>:2:1: note: instantiated into assembly here .code32 ^ Note that we're pointing to line 5 properly now. llvm-svn: 119488
* now that AsmPrinter::EmitInlineAsm is factored right, we can eliminate theChris Lattner2010-11-171-9/+5
| | | | | | | | cookie argument to the SourceMgr diagnostic stuff. This cleanly separates LLVMContext's inlineasm handler from the sourcemgr error handling definition, increasing type safety and cleaning things up. llvm-svn: 119486
* rearrange how the handler in SourceMgr is installed, eliminating the use of Chris Lattner2010-11-171-8/+35
| | | | | | the cookie argument to setDiagHandler llvm-svn: 119483
* refactor the interface to EmitInlineAsm a bit, no functionality change.Chris Lattner2010-11-172-11/+18
| | | | llvm-svn: 119482
* Only avoid the check if we're the last operand before the variableEric Christopher2010-11-171-3/+3
| | | | | | operands in a variadic instruction. llvm-svn: 119446
* Fix grammaro.Dan Gohman2010-11-161-1/+1
| | | | llvm-svn: 119386
OpenPOWER on IntegriCloud