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* Fix r123346 to handle scalar types too.Dan Gohman2011-01-131-2/+1
| | | | llvm-svn: 123352
* Add missing space in debug outputJakob Stoklund Olesen2011-01-131-1/+1
| | | | llvm-svn: 123351
* Apply the patch from PR8958, which allows llc to get slightlyDan Gohman2011-01-121-1/+2
| | | | | | further on the associated testcase before aborting. llvm-svn: 123346
* Try again enabling LiveDebugVariables.Jakob Stoklund Olesen2011-01-121-1/+1
| | | | llvm-svn: 123342
* Don't emit a DBG_VALUE for a spill slot that the rewriter decided not to use ↵Jakob Stoklund Olesen2011-01-121-1/+2
| | | | | | after all. llvm-svn: 123339
* Fix braino in dominator tree walk.Jakob Stoklund Olesen2011-01-121-1/+1
| | | | llvm-svn: 123338
* Sometimes, old virtual registers can linger on DBG_VALUE instructions.Jakob Stoklund Olesen2011-01-121-1/+2
| | | | | | Make sure we don't crash in that case, but simply turn them into %noreg instead. llvm-svn: 123335
* Teach VirtRegRewriter to update slot indexes when erasing instructions.Jakob Stoklund Olesen2011-01-121-38/+26
| | | | | | It was leaving dangling pointers in the slot index maps. llvm-svn: 123334
* Annotate VirtRegRewriter debug output with slot indexes.Jakob Stoklund Olesen2011-01-121-2/+2
| | | | llvm-svn: 123333
* Verify slot index ordering.Jakob Stoklund Olesen2011-01-121-0/+25
| | | | | | The slot indexes must be monotonically increasing through the function. llvm-svn: 123324
* Verify that machine instruction parent pointers are consistent.Jakob Stoklund Olesen2011-01-121-0/+5
| | | | llvm-svn: 123322
* The world is not ready for LiveDebugVariables yet.Jakob Stoklund Olesen2011-01-111-1/+1
| | | | llvm-svn: 123290
* Enable LiveDebugVariables by default.Jakob Stoklund Olesen2011-01-111-1/+1
| | | | llvm-svn: 123282
* Don't insert DBG_VALUE instructions after the first terminator.Jakob Stoklund Olesen2011-01-111-0/+7
| | | | | | | | For one, MachineBasicBlock::getFirstTerminator() doesn't understand what is happening, and it also makes sense to have all control flow run through the DBG_VALUE. llvm-svn: 123277
* Appropriately truncate debug info range in dwarf output.Devang Patel2011-01-111-15/+5
| | | | | | This is not yet completely enabled. llvm-svn: 123274
* Move ExpandAtomic into the integer expansion routines - it's only used there.Eric Christopher2011-01-112-86/+87
| | | | llvm-svn: 123202
* Fix PR 8916 (qv for analysis), at least the immediate problem.Dale Johannesen2011-01-101-1/+2
| | | | | | | | | | | There's an inherent tension in DAGCombine between assuming that things will be put in canonical form, and the Depth mechanism that disables transformations when recursion gets too deep. It would not surprise me if there's a lot of little bugs like this one waiting to be discovered. The mechanism seems fragile and I'd suggest looking at it from a design viewpoint. llvm-svn: 123191
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-1012-41/+38
| | | | | | and fixes here and there. llvm-svn: 123170
* fit in 80 cols and use MBB::isSuccessor instead of a handChris Lattner2011-01-101-5/+4
| | | | | | rolled std::find. llvm-svn: 123164
* Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen2011-01-1015-32/+29
| | | | | | | | These functions not longer assert when passed 0, but simply return false instead. No functional change intended. llvm-svn: 123155
* Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong resultsJakob Stoklund Olesen2011-01-092-10/+9
| | | | | | | | | | | | | | | | | | when no virtual registers have been allocated. It was only used to resize IndexedMaps, so provide an IndexedMap::resize() method such that Map.grow(MRI.getLastVirtReg()); can be replaced with the simpler Map.resize(MRI.getNumVirtRegs()); This works correctly when no virtuals are allocated, and it bypasses the to/from index conversions. llvm-svn: 123130
* sort this.Chris Lattner2011-01-091-1/+1
| | | | llvm-svn: 123129
* Teach TargetRegisterInfo how to cram stack slot indexes in with the virtual andJakob Stoklund Olesen2011-01-095-13/+25
| | | | | | | | | | | | | physical register numbers. This makes the hack used in LiveInterval official, and lets LiveInterval be oblivious of stack slots. The isPhysicalRegister() and isVirtualRegister() predicates don't know about this, so when a variable may contain a stack slot, isStackSlot() should always be tested first. llvm-svn: 123128
* Add a forgotten VireReg2IndexFunctor.Jakob Stoklund Olesen2011-01-091-1/+1
| | | | llvm-svn: 123123
* Eliminate some extra hash table lookups.Cameron Zwarich2011-01-091-7/+10
| | | | llvm-svn: 123115
* Add an informative comment.Cameron Zwarich2011-01-091-1/+9
| | | | llvm-svn: 123114
* Simplify LiveDebugVariables by storing MachineOperand copies locations insteadJakob Stoklund Olesen2011-01-091-169/+48
| | | | | | | | | | | | | | of using a Location class with the same information. When making a copy of a MachineOperand that was already stored in a MachineInstr, it is necessary to clear the parent pointer on the copy. Otherwise the register use-def lists become inconsistent. Add MachineOperand::clearParent() to do that. An alternative would be a custom MachineOperand copy constructor that cleared ParentMI. I didn't want to do that because of the performance impact. llvm-svn: 123109
* Shrink a BitVector that didn't mean to store bits for all physical registers.Jakob Stoklund Olesen2011-01-091-6/+4
| | | | llvm-svn: 123108
* Replace TargetRegisterInfo::printReg with a PrintReg class that also works ↵Jakob Stoklund Olesen2011-01-0913-102/+39
| | | | | | | | | | without a TRI instance. Print virtual registers numbered from 0 instead of the arbitrary FirstVirtualRegister. The first virtual register is printed as %vreg0. TRI::NoRegister is printed as %noreg. llvm-svn: 123107
* Use IndexedMap for MachineRegisterInfo as well. No functional change.Jakob Stoklund Olesen2011-01-091-19/+22
| | | | llvm-svn: 123106
* Fix VirtRegMap to use TRI::index2VirtReg and TRI::virtReg2Index instead ofJakob Stoklund Olesen2011-01-082-19/+27
| | | | | | | | depending on TRI::FirstVirtualRegister. Also use TRI::printReg instead of printing virtual registers directly. llvm-svn: 123101
* Fix a MachineVerifier loop that probably didn't mean to skip the last twoJakob Stoklund Olesen2011-01-081-2/+2
| | | | | | virtual registers. llvm-svn: 123100
* Use an IndexedMap for LiveVariables::VirtRegInfo.Jakob Stoklund Olesen2011-01-081-25/+10
| | | | | | | | Provide MRI::getNumVirtRegs() and TRI::index2VirtReg() functions to allow iteration over virtual registers without depending on the representation of virtual register numbers. llvm-svn: 123098
* Use an IndexedMap for LiveOutRegInfo to hide its dependence on ↵Jakob Stoklund Olesen2011-01-082-9/+4
| | | | | | TargetRegisterInfo::FirstVirtualRegister. llvm-svn: 123096
* Fix coding style.Cameron Zwarich2011-01-081-64/+64
| | | | llvm-svn: 123093
* Make more passes preserve dominators (or state that they preserve dominators ifCameron Zwarich2011-01-083-2/+31
| | | | | | | | | | they all ready do). This removes two dominator recomputations prior to isel, which is a 1% improvement in total llc time for 403.gcc. The only potentially suspect thing is making GCStrategy recompute dominators if it used a custom lowering strategy. llvm-svn: 123064
* Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call.Evan Cheng2011-01-081-0/+24
| | | | llvm-svn: 123048
* Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng2011-01-0713-30/+94
| | | | | | | | | | Instead encode llvm IR level property "HasSideEffects" in an operand (shared with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check the operand when the instruction is an INLINEASM. This allows memory instructions to be moved around INLINEASM instructions. llvm-svn: 123044
* Speculatively revert r123032.Devang Patel2011-01-072-5/+21
| | | | llvm-svn: 123039
* Appropriately truncate debug info range in dwarf output.Devang Patel2011-01-072-21/+5
| | | | | | Enable live debug variables pass. llvm-svn: 123032
* DBG_VALUE does not have any side effects; it also makes no sense to mark it ↵Evan Cheng2011-01-073-3/+8
| | | | | | cheap as a copy. llvm-svn: 123031
* Add ARM patterns to match EXTRACT_SUBVECTOR nodes.Bob Wilson2011-01-071-1/+1
| | | | | | | | | | | | | | | Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle vectors from being translated to EXTRACT_SUBVECTOR. Patch by Tim Northover. The test changes are needed to keep those spill-q tests from testing aligned spills and restores. If the only aligned stack objects are spill slots, we no longer realign the stack frame. Prior to this patch, an EXTRACT_SUBVECTOR was legalized by loading from the stack, which created an aligned frame index. Now, however, there is nothing except the spill slot in the stack frame, so I added an aligned alloca. llvm-svn: 122995
* Fix a comment typo.Bob Wilson2011-01-071-1/+1
| | | | llvm-svn: 122994
* Change EXTRACT_SUBVECTOR to require a constant index.Bob Wilson2011-01-071-32/+16
| | | | | | | | We were never generating any of these nodes with variable indices, and there was one legalizer function asserting on a non-constant index. If we ever have a need to support variable indices, we can add this back again. llvm-svn: 122993
* Early exit if we don't have invokes. The 'Unwinds' vector isn't modified unlessBill Wendling2011-01-071-219/+219
| | | | | | we have invokes, so there is no functionality change here. llvm-svn: 122990
* Fix the other problem reported in PR8582. Testcase and patch byDuncan Sands2011-01-061-0/+5
| | | | | | Nadav Rotem. llvm-svn: 122983
* Add some fairly duplicated code to let type legalization split illegalEric Christopher2011-01-063-0/+141
| | | | | | typed atomics. This will lower exclusively to libcalls at the moment. llvm-svn: 122979
* Emit 128 bit constant.Devang Patel2011-01-062-10/+38
| | | | | | This fixes PR 8913 crash. llvm-svn: 122971
* Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpyEvan Cheng2011-01-062-15/+14
| | | | | | | etc. takes an option OptSize. If OptSize is true, it would return the inline limit for functions with attribute OptSize. llvm-svn: 122952
* Revert r122936. I'll re-implement the change.Evan Cheng2011-01-061-9/+2
| | | | llvm-svn: 122949
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