| Commit message (Collapse) | Author | Age | Files | Lines |
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have same non-zero number as lower bound as well as upper bound.
llvm-svn: 129170
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If lower bound is more then upper bound then consider it is an unbounded array.
An array is unbounded if non-zero lower bound is same as upper bound.
If lower bound and upper bound are zero than array has one element.
llvm-svn: 129156
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is lowered into a call to the specified trap function at sdisel time.
llvm-svn: 129152
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of { i32, void ()* }. Teach the verifier to verify that, deleting copies of
checks strewn about.
llvm-svn: 129128
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induction variable. The preRA scheduler is unaware of induction vars,
so we look for potential "virtual register cycles" instead.
Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing
llvm-svn: 129100
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PHI values may be deleted, causing the flags to be wrong. This fixes PR9616.
llvm-svn: 129092
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llvm-svn: 129081
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llvm-svn: 129080
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llvm-svn: 129079
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llvm-svn: 129044
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blocks with interference.
llvm-svn: 129030
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Without any positive bias, there is nothing for the spill placer to to. It will
spill everywhere.
llvm-svn: 129029
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If there are no positive nodes, the algorithm can be aborted early.
llvm-svn: 129021
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addConstraints, and finish.
This will allow us to abort the algorithm early if it is determined to be futile.
llvm-svn: 129020
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llvm-svn: 128986
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About 90% of the relevant blocks are live-through without uses, and the only
information required about them is their number. This saves memory and enables
later optimizations that need to look at only the use-blocks.
llvm-svn: 128985
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llvm-svn: 128963
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llvm-svn: 128962
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Treat the landing pad as a normal successor when that happens.
llvm-svn: 128961
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llvm-svn: 128947
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llvm-svn: 128935
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llvm-svn: 128929
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of a basic block.
llvm-svn: 128925
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def into the remaining use.
Rematerialization can leave single-use loads behind that we might as well fold whenever possible.
llvm-svn: 128918
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llvm-svn: 128914
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addRegisterDead().
There can be multiple defs for a single virtual register when they are defining
sub-registers.
The missing <dead> flag was stopping the inline spiller from eliminating dead
code after rematerialization.
llvm-svn: 128888
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llvm-svn: 128887
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UseSlots.
This allows us to always keep the smaller slot for an instruction which is what
we want when a register has early clobber defines.
Drop the UsingInstrs set and the UsingBlocks map. They are no longer needed.
llvm-svn: 128886
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llvm-svn: 128875
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inlined path for the common case.
Most basic blocks don't contain a call that may throw, so the last split point
os simply the first terminator.
llvm-svn: 128874
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It needed to be moved closer to the setjmp statement, because the code directly
after the setjmp needs to know about values that are on the stack. Also, the
'bitcast' of the function context was causing a dead load. This wouldn't be too
horrible, except that at -O0 it wasn't optimized out, and because it wasn't
using the correct base pointer (if there is a VLA), it would try to access a
value from a garbage address.
<rdar://problem/9130540>
llvm-svn: 128873
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llvm-svn: 128868
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When a virtual register has a single value that is defined as a copy of a
reserved register, permit that copy to be joined. These virtual register are
usually copies of the stack pointer:
%vreg75<def> = COPY %ESP; GR32:%vreg75
MOV32mr %vreg75, 1, %noreg, 0, %noreg, %vreg74<kill>
MOV32mi %vreg75, 1, %noreg, 8, %noreg, 0
MOV32mi %vreg75<kill>, 1, %noreg, 4, %noreg, 0
CALLpcrel32 ...
Coalescing these virtual registers early decreases register pressure.
Previously, they were coalesced by RALinScan::attemptTrivialCoalescing after
register allocation was completed.
The lower register pressure causes the mcinst-lowering-cmp0.ll test case to fail
because it depends on linear scan spilling a particular register.
I am deleting 2008-08-05-SpillerBug.ll because it is counting the number of
instructions emitted, and its revision history shows the 'correct' count being
edited many times.
llvm-svn: 128845
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llvm-svn: 128844
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llvm-svn: 128821
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llvm-svn: 128820
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llvm-svn: 128765
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When the greedy register allocator is splitting multiple global live ranges, it
tends to look at the same interference data many times. The InterferenceCache
class caches queries for unaltered LiveIntervalUnions.
llvm-svn: 128764
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This is more compact and faster than using DenseMap.
llvm-svn: 128763
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transformations in target-specific DAG combines without causing DAGCombiner to
delete the same node twice. If you know of a better way to avoid this (see my
next patch for an example), please let me know.
llvm-svn: 128758
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llvm-svn: 128730
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should improve src line debug info when sdisel is used. rdar://9199118
llvm-svn: 128728
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rdar://8911343
llvm-svn: 128696
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It is using a trivial rewriter that doesn't know how to insert spill code
requested by the standard spiller.
llvm-svn: 128688
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liveness.
Turn them into noop KILL instructions instead. This lets the scavenger know when
super-registers are killed and defined.
llvm-svn: 128645
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llvm-svn: 128643
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This way, shrinkToUses() will ignore the instruction that is about to be
deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like.
Fix a misunderstanding in MachineVerifier about <def,undef> operands. The
<undef> flag is valid on def operands where it has the same meaning as <undef>
on a use operand. It only applies to sub-register defines which also read the
full register.
llvm-svn: 128642
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llvm-svn: 128639
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llvm-svn: 128634
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std::pow(float,float) here.
We don't expect the real "powf()" on some hosts (and powf() would be available on other hosts).
For consistency, std::pow(double,double) may be called instead.
Or, precision issue might attack us, to see unstable regalloc and stack coloring.
llvm-svn: 128629
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