| Commit message (Collapse) | Author | Age | Files | Lines |
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call L_strcmp$stub
testl %eax, %eax
- jne LBB26_208 #cond_true6020
- jmp LBB26_227 #bb7119
+ je LBB26_227 #bb7119
LBB26_208: #cond_true6020
movl $l31_str14, 4(%esp)
testl %eax, %eax
- jne LBB26_704 #cond_true13042
- jmp LBB26_713 #bb13151
+ je LBB26_713 #bb13151
LBB26_704: #cond_true13042
movl $_str52, 4(%esp)
cmpl 76(%ecx), %eax
- jge LBB26_1628 #cond_false63.i.i
- jmp LBB26_1769 #_Z8makeGridP13mrSurfaceListidiidd.exit.i
+ jl LBB26_1769 #_Z8makeGridP13mrSurfaceListidiidd.exit.i
LBB26_1628: #cond_false63.i.i
movl $0, 48964(%esp)
llvm-svn: 31100
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jle FOO
jmp BAR
BAR:
into:
jle FOO
BAR:
... whoa!
llvm-svn: 31098
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1. Remove a bunch of ifdef'd code.
2. When a block just contains an uncond branch, change all blocks branching
to it to jump to the destination instead.
3. If branch analysis tells us some edges in the machinecfg are not actually
possible, remove them.
#2 triggers a suprisingly large number of times.
llvm-svn: 31094
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This is currently disabled by default and limited in several ways, but does
have a positive effect.
llvm-svn: 31090
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llvm-svn: 31088
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output.
llvm-svn: 31067
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This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of just using ConstantInt.
llvm-svn: 31063
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blocks into the basic block list when lowering the switch inst. into a
binary tree of if-then statements. This allows the "visitSwitchCase" func
to allow for fall-through behavior.
llvm-svn: 31057
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llvm-svn: 31040
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llvm-svn: 31035
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# notes in it.
llvm-svn: 31026
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llvm-svn: 31025
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one separately.
llvm-svn: 31022
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llvm-svn: 31020
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llvm-svn: 31019
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llvm-svn: 31017
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llvm-svn: 31016
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optimization.
llvm-svn: 31009
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branch folding can now compile stuff like this:
void foo(int W, int X, int Y, int Z) {
if (W & 1) {
for (; X;--X) bar();
} else if (W & 2) {
for (; Y;--Y) bar();
} else if (W & 4) {
for (; Z;--Z) bar();
} else if (W & 8) {
for (; W;--W) bar();
}
if (W) {
bar();
}
}
contrived testcase where loops exits all end up merging together. To have
the loop merges be:
...
cmplw cr0, r30, r27
bne cr0, LBB1_14 ;bb38
LBB1_16: ;cond_next48.loopexit
mr r27, r29
LBB1_20: ;cond_next48
cmplwi cr0, r27, 0
beq cr0, LBB1_22 ;UnifiedReturnBlock
...
instead of:
...
cmplw cr0, r30, r27
bne cr0, LBB1_14 ;bb38
LBB1_16: ;cond_next48.loopexit
mr r27, r29
b LBB1_20 ;cond_next48
LBB1_17: ;cond_next48.loopexit1
b LBB1_20 ;cond_next48
LBB1_18: ;cond_next48.loopexit2
b LBB1_20 ;cond_next48
LBB1_19: ;cond_next48.loopexit3
LBB1_20: ;cond_next48
cmplwi cr0, r27, 0
beq cr0, LBB1_22 ;UnifiedReturnBlock
...
This is CodeGen/PowerPC/branch-opt.ll
llvm-svn: 31006
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llvm-svn: 31001
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It now correctly deletes unreachable blocks and blocks that are empty.
llvm-svn: 31000
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llvm-svn: 30999
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llvm-svn: 30997
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(vector_shuffle
(vbitconvert (vbuildvector (copyfromreg v4f32), 1, v4f32), 4, f32),
(undef, undef, undef, undef), (0, 0, 0, 0), 4, f32)
to the
vbitconvert
is a very bad idea.
llvm-svn: 30989
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llvm-svn: 30984
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llvm-svn: 30982
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llvm-svn: 30961
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llvm-svn: 30959
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so that it can be deleted if unused.
llvm-svn: 30955
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llvm-svn: 30953
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SelectionDAG and it has since bitrotted. Remove the copy from SelectionDAG.
Next, remove the constant folding piece of DAGCombiner::SimplifySetCC into
a new FoldSetCC method which can be used by getNode() and SimplifySetCC.
This fixes obscure bugs.
llvm-svn: 30952
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llvm-svn: 30951
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llvm-svn: 30950
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llvm-svn: 30948
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which is undefined. "0" isn't a power of 2.
llvm-svn: 30947
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llvm-svn: 30945
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it just deletes empty MBB's. Soon it will do more :)
llvm-svn: 30941
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llvm-svn: 30939
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llvm-svn: 30927
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llvm-svn: 30926
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apply to rems as well as divs. This fixes PR945 and speeds up ReedSolomon
from 14.57s to 10.90s (which is now faster than gcc).
It compiles CodeGen/X86/rem.ll into:
_test1:
subl $4, %esp
movl %esi, (%esp)
movl $2155905153, %ecx
movl 8(%esp), %esi
movl %esi, %eax
imull %ecx
addl %esi, %edx
movl %edx, %eax
shrl $31, %eax
sarl $7, %edx
addl %eax, %edx
imull $255, %edx, %eax
subl %eax, %esi
movl %esi, %eax
movl (%esp), %esi
addl $4, %esp
ret
_test2:
movl 4(%esp), %eax
movl %eax, %ecx
sarl $31, %ecx
shrl $24, %ecx
addl %eax, %ecx
andl $4294967040, %ecx
subl %ecx, %eax
ret
_test3:
subl $4, %esp
movl %esi, (%esp)
movl $2155905153, %ecx
movl 8(%esp), %esi
movl %esi, %eax
mull %ecx
shrl $7, %edx
imull $255, %edx, %eax
subl %eax, %esi
movl %esi, %eax
movl (%esp), %esi
addl $4, %esp
ret
instead of div/idiv instructions.
llvm-svn: 30920
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llvm-svn: 30916
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llvm-svn: 30915
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http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20061009/038518.html
llvm-svn: 30906
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llvm-svn: 30903
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It's turning:
movl -24(%ebp), %esp
subl $16, %esp
movl -24(%ebp), %ecx
into
movl -24(%ebp), %esp
subl $16, %esp
movl %esp, (%esp)
llvm-svn: 30902
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the stack slot. This fixes PR943.
llvm-svn: 30898
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llvm-svn: 30889
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llvm-svn: 30884
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llvm-svn: 30883
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