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* Revert r274829, it caused PR28472.Nico Weber2016-07-081-1/+1
| | | | llvm-svn: 274916
* AsmPrinter: Avoid implicit iterator conversions in ↵Duncan P. N. Exon Smith2016-07-081-2/+2
| | | | | | DbgValueHistoryCalculator, NFC llvm-svn: 274911
* SelectionDAG: Avoid implicit iterator conversions in SelectionDAGBuilder, NFCDuncan P. N. Exon Smith2016-07-081-1/+2
| | | | llvm-svn: 274907
* SelectionDAG: Avoid implicit iterator conversions in SelectionDAGISel, NFCDuncan P. N. Exon Smith2016-07-081-8/+8
| | | | llvm-svn: 274904
* SelectionDAG: Avoid implicit iterator conversions in ScheduleDAGSDNodes, NFCDuncan P. N. Exon Smith2016-07-081-1/+1
| | | | llvm-svn: 274903
* SelectionDAG: Avoid implicit iterator conversions in FastISel, NFCDuncan P. N. Exon Smith2016-07-081-3/+4
| | | | llvm-svn: 274899
* CodeGen: Avoid iterator conversions in TwoAddressInstructionPass, NFCDuncan P. N. Exon Smith2016-07-081-55/+51
| | | | | | | | | | | | Mostly through preferring MachineInstr&, avoid implicit conversions from iterator to pointer. Although this may bitrot (since there are other uses blocking me from removing the implicit operator), this removes the last of the implicit conversions from MachineInstrBundleIterator to MachineInstr* in the LLVMCodeGen build target. llvm-svn: 274893
* CodeGen: Use MachineInstr& in StackSlotColoring, NFCDuncan P. N. Exon Smith2016-07-081-14/+11
| | | | | | Avoid implicit iterator to pointer conversions. llvm-svn: 274892
* CodeGen: Use MachineInstr& in RegisterScavenging, NFCDuncan P. N. Exon Smith2016-07-081-16/+15
| | | | | | | Prefer MachineInstr& in order to avoid implicit conversions from MachineInstrBundleIterator to MachineInstr*. llvm-svn: 274888
* [CodeGen, TargetPassConfig] Remove a race from createRegAllocPassDavid Majnemer2016-07-081-6/+14
| | | | | | | | The createRegAllocPass reads and writes to a global variable 'Registry' via calls to getDefault and setDefault. Run this under a call_once to avoid races. llvm-svn: 274875
* PeepholeOptimizer: Make pass name match DEBUG_TYPEMatt Arsenault2016-07-081-2/+2
| | | | llvm-svn: 274874
* Do not expand SDIV when compiling for minimum code sizeSjoerd Meijer2016-07-081-0/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D22139 llvm-svn: 274855
* Addressing post-commit comments regarding not expanding UDIV;Sjoerd Meijer2016-07-081-2/+2
| | | | | | we don't expand only when compiling for minimum code size. llvm-svn: 274847
* Code size optimisation: don't expand a div to a mul and and a shift sequence.Sjoerd Meijer2016-07-081-0/+5
| | | | | | | | | As a result, the urem instruction will not be expanded to a sequence of umull, lsrs, muls and sub instructions, but just a call to __aeabi_uidivmod. Differential Revision: http://reviews.llvm.org/D22131 llvm-svn: 274843
* Bug 28444: Fix assertion when extract_vector_elt has mismatched typeMatt Arsenault2016-07-081-1/+1
| | | | | | | For some reason extract_vector_elt is sometimes allowed to have a different result type than the vector element type. llvm-svn: 274829
* [PM] Port UnreachableBlockElim to the new Pass ManagerWei Mi2016-07-082-25/+39
| | | | | | Differential Revision: http://reviews.llvm.org/D22124 llvm-svn: 274824
* Include SelectionDAGISel in the opt-bisect processAndrew Kaylor2016-07-071-1/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D21143 llvm-svn: 274786
* [CodeView] Implement support for thread-local variablesDavid Majnemer2016-07-071-4/+15
| | | | llvm-svn: 274734
* AArch64: Replace a RegScavenger instance with LivePhysRegsMatthias Braun2016-07-061-0/+14
| | | | | | | | | | | | | | findScratchNonCalleeSaveRegister() just needs a simple liveness analysis, use LivePhysRegs for that as it is simpler and does not depend on the kill flags. This commit adds a convenience function available() to LivePhysRegs: This function returns true if the given register is not reserved and neither the register nor any of its aliases are alive. Differential Revision: http://reviews.llvm.org/D21865 llvm-svn: 274685
* [CodeView] Emit an appropriate symbol kind for globalsDavid Majnemer2016-07-061-2/+12
| | | | | | | We emitted debug info for globals/functions as if they all had external linkage. Instead, emit local symbol records when appropriate. llvm-svn: 274676
* [CodeView] Unions are always sealedDavid Majnemer2016-07-061-1/+1
| | | | | | | It is impossible to inherit from a union. We are missing a way to represent this in IR for classes/structs... llvm-svn: 274675
* Retry: "Emit CodeView type records for nested classes."Adrian McCarthy2016-07-062-7/+29
| | | | | | | | | | Now with a corrected test to account for a recently supported properties bit in the debug info of a struct. Original review: http://reviews.llvm.org/D21939 This reverts commit 970c3fd497a28d25dd69526eb52594a696c37968. llvm-svn: 274661
* TailDuplicator: Remove live-in updating logicMatthias Braun2016-07-061-18/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This logic was introduced in r157663 and does not make any sense to me. The motivating example in rdar://11538365 looks like this: This is the tail: BB#16: derived from LLVM BB %if.end68 Live Ins: %R0 %R4 %R5 Predecessors according to CFG: BB#15 BB#5 tBLXi pred:14, pred:%noreg, <ga:@CFRelease>, %R0<kill>, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %SP<imp-def> t2B <BB#20>, pred:14, pred:%noreg Successors according to CFG: BB#20 This is the predBB: BB#5: Live Ins: %R5 Predecessors according to CFG: BB#4 %R4<def> = t2MOVi 0, pred:14, pred:%noreg, opt:%noreg t2B <BB#16>, pred:14, pred:%noreg Successors according to CFG: BB#16 However this is invalid machine code to begin with, if %R0 is live-in to BB#16 then it must be live-in to BB#5 as well if BB#5 does not define it. We should not need logic to retroactively fix broken machine code and in fact the example from r157663 passes cleanly with the code removed and I do not see any (newly) failing tests with the machine verifier enabled. Differential Revision: http://reviews.llvm.org/D22031 llvm-svn: 274655
* [DAGCombiner] Fix visitSTORE to continue processing current SDNode, if ↵Tim Shen2016-07-061-6/+12
| | | | | | | | | | | | | | | | | findBetterNeighborChains doesn't actually CombineTo it. Summary: findBetterNeighborChains may or may not find a better chain for each node it finds, which include the node ("St") that visitSTORE is currently processing. If no better chain is found for St, visitSTORE should continue instead of return SDValue(St, 0), as if it's CombinedTo'ed. This fixes bug 28130. There might be other ways to make the test pass (see D21409). I think both of the patches are fixing actual bugs revealed by the same testcase. Reviewers: echristo, wschmidt, hfinkel, kbarton, amehsan, arsenm, nemanjai, bogner Subscribers: mehdi_amini, nemanjai, llvm-commits Differential Revision: http://reviews.llvm.org/D21692 llvm-svn: 274644
* Revert "Emit CodeView type records for nested classes."Adrian McCarthy2016-07-062-29/+7
| | | | | | This reverts commit 256b29322c827a2d94da56468c936596f5509032. llvm-svn: 274632
* Emit CodeView type records for nested classes.Adrian McCarthy2016-07-062-7/+29
| | | | | | Differential Revision: http://reviews.llvm.org/D21939 llvm-svn: 274629
* [CFLAA] Split into Anders+Steens analysis.George Burgess IV2016-07-061-6/+30
| | | | | | | | | | | | | | | | | | | | | StratifiedSets (as implemented) is very fast, but its accuracy is also limited. If we take a more aggressive andersens-like approach, we can be way more accurate, but we'll also end up being slower. So, we've decided to split CFLAA into CFLSteensAA and CFLAndersAA. Long-term, we want to end up in a place where CFLSteens is queried first; if it can provide an answer, great (since queries are basically map lookups). Otherwise, we'll fall back to CFLAnders, BasicAA, etc. This patch splits everything out so we can try to do something like that when we get a reasonable CFLAnders implementation. Patch by Jia Chen. Differential Revision: http://reviews.llvm.org/D21910 llvm-svn: 274589
* Revert r259387: "AArch64: Implement missed conditional compare sequences."Balaram Makam2016-07-051-2/+2
| | | | | | | This reverts commit r259387 because it inserts illegal code after legalization in some backends where i64 OR type is illegal for example. llvm-svn: 274573
* DAGCombiner: Fold away vector extract of insert with the same indexMatt Arsenault2016-07-051-0/+8
| | | | | | | This only really matters when the index is non-constant since the constant case already gets taken care of by other combines. llvm-svn: 274569
* Fixed warning caused by r274402.Eric Liu2016-07-041-5/+5
| | | | llvm-svn: 274497
* [CodeGen] Make the code that detects a if a shuffle is really a ↵Craig Topper2016-07-041-33/+41
| | | | | | | | | | concatenation of the inputs more general purpose. We can now handle concatenation of each source multiple times. The previous code just checked for each source to appear once in either order. This also now handles an entire source vector sized piece having undef indices correctly. We now concat with UNDEF instead of using one of the sources. This is responsible for the test case change. llvm-svn: 274483
* [CodeGen] Teach OR combine of shuffles involving zero vectors to better ↵Craig Topper2016-07-031-5/+10
| | | | | | | | handle undef indices. Undef indices can now be treated as zeros. Or if its undef ORed with zero, we will keep the undef. llvm-svn: 274472
* [MBB] add a missing corner case in UpdateTerminator()Haicheng Wu2016-07-031-10/+20
| | | | | | | | | | After the block placement, if a block ends with a conditional branch, but the next block is not its successor. The conditional branch should be changed to unconditional branch. This patch fixes PR28307, PR28297, PR28402. Differential Revision: http://reviews.llvm.org/D21811 llvm-svn: 274470
* [codeview] Set the Nested and Scoped ClassOptions based on the scope chainReid Kleckner2016-07-021-12/+31
| | | | | | These are set on both the declaration record and the definition record. llvm-svn: 274410
* TII: Fix inlineasm size counting comments as instsMatt Arsenault2016-07-011-7/+11
| | | | | | | The main problem was counting comments on their own line as instructions. llvm-svn: 274405
* PeepholeOptimizer: Relax assertMatt Arsenault2016-07-011-2/+4
| | | | | | Allow implicit defs llvm-svn: 274402
* [CodeView] Include the offset of nested membersDavid Majnemer2016-07-011-4/+5
| | | | | | | | | | | | | Given something like: struct S { int a; struct { int b; }; }; We would fail to give 'b' offset 4. Instead, we would give it the offset it has inside of it's struct. llvm-svn: 274400
* [CodeView] Pretty print anonymous scopesDavid Majnemer2016-07-011-14/+31
| | | | | | | | A namespace without a name should be written out as `anonymous namespace' while a tag type without a name should be written out as <unnamed-tag>. llvm-svn: 274399
* [codeview] Don't record UDTs for anonymous structsReid Kleckner2016-07-011-0/+4
| | | | | | | | MSVC makes up names for these anonymous structs, but we don't (yet). Eventually Clang should use getTypedefNameForAnonDecl() to put some name in the debug info, and we can update the test case when that happens. llvm-svn: 274391
* [codeview] Assert that our CV type records are validReid Kleckner2016-07-011-3/+27
| | | | | | | | | | | We were asserting that our type records were valid when emitting assembly, but not when emitting an object file. I've been seeing lots of LNK1285 errors (corrupt PDB) during incremental debug self-host builds with the MSVC linker, and hopefully this will catch some of them earlier. llvm-svn: 274373
* CodeGen: Use MachineInstr& in RegisterCoalescer, NFCDuncan P. N. Exon Smith2016-07-011-38/+37
| | | | | | | Remove a few more implicit iterator to pointer conversions by preferring MachineInstr&. llvm-svn: 274363
* CodeGen: Avoid implicit conversions in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-07-011-2/+2
| | | | | | | Avoid implicit conversions from MachineBasicBlock::iterator to MachineInstr* in TargetInstrInfo. llvm-svn: 274361
* CodeGen: Use MachineInstr& in ScheduleDAGIntrs, NFCDuncan P. N. Exon Smith2016-07-011-43/+43
| | | | | | | | | | | | | Use MachineInstr& to avoid implicit conversions from MachineBasicBlock::iterator to MachineInstr*. In one case, this could use a range-based for loop, but the other loops iterated in reverse order. One of the reverse-loops checked the MachineInstr* for nullptr, a condition that is provably unreachable. (And even if my proof has a flaw, UBSan would catch the bug.) llvm-svn: 274360
* CodeGen: Avoid iterator conversion in UnreachableBlockElim, NFCDuncan P. N. Exon Smith2016-07-011-3/+1
| | | | | | | Avoid an unnecessary (and implicit) iterator to pointer conversion in UnreachableBlockElim by using the post-increment operator. llvm-svn: 274355
* CodeGen: Use MachineInstr& in SlotIndexes.cpp, NFCDuncan P. N. Exon Smith2016-07-011-18/+13
| | | | | | | Avoid implicit conversions from iterator to pointer by preferring MachineInstr& and using range-based for loops. llvm-svn: 274354
* CodeGen: Use MachineInstr& in RegAllocFast, NFCDuncan P. N. Exon Smith2016-07-011-31/+33
| | | | | | | | | Use MachineInstr& instead of MachineInstr* in RegAllocFast to avoid implicit conversions from MachineInstrBundleIterator. RAFast::spillAll and RAFast::spillVirtReg still take iterators, since their argument may be an end iterator from MachineBasicBlock::getFirstTerminator. llvm-svn: 274353
* [CodeGen] Cleanup getVectorShuffle a bit to take advantage of its new ↵Craig Topper2016-07-011-16/+16
| | | | | | ArrayRef argument and its begin/end iterators. Also use 'int' type for number of elements and loop iterators to remove several typecasts. No functional change intended. llvm-svn: 274338
* [CodeGen,Target] Remove the version of DAG.getVectorShuffle that takes a ↵Craig Topper2016-07-016-30/+27
| | | | | | | | pointer to a mask array. Convert all callers to use the ArrayRef version. No functional change intended. For the most part this simplifies all callers. There were two places in X86 that needed an explicit makeArrayRef to shorten a statically sized array. llvm-svn: 274337
* Add support for allowing us to create uniquely identified "COMDAT" or "ELFEric Christopher2016-07-011-4/+2
| | | | | | | | | | | | | Group" sections while lowering. In particular, for ELF sections this is useful for creating function-specific groups that get merged into the same named section. Also use const Twine& instead of StringRef for the getELF functions while we're here. Differential Revision: http://reviews.llvm.org/D21743 llvm-svn: 274336
* 80-column and comment fixups.Eric Christopher2016-07-011-5/+8
| | | | llvm-svn: 274335
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