Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Implement support for vector operands to inline asm, implementing | Chris Lattner | 2007-03-25 | 1 | -4/+16 |
| | | | | | | CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll llvm-svn: 35332 | ||||
* | implement initial support for the silly X constraint. Testcase here: ↵ | Chris Lattner | 2007-03-25 | 1 | -0/+2 |
| | | | | | | CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll llvm-svn: 35327 | ||||
* | Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll | Chris Lattner | 2007-03-25 | 1 | -1/+4 |
| | | | | llvm-svn: 35324 | ||||
* | switch TargetLowering::getConstraintType to take the entire constraint, | Chris Lattner | 2007-03-25 | 2 | -24/+28 |
| | | | | | | not just the first letter. No functionality change. llvm-svn: 35322 | ||||
* | don't rely on ADL | Chris Lattner | 2007-03-24 | 1 | -1/+1 |
| | | | | llvm-svn: 35299 | ||||
* | Adjust offset to compensate for big endian machines. | Evan Cheng | 2007-03-24 | 1 | -7/+5 |
| | | | | llvm-svn: 35293 | ||||
* | Make sure SEXTLOAD of the specific type is supported on the target. | Evan Cheng | 2007-03-23 | 1 | -0/+4 |
| | | | | llvm-svn: 35289 | ||||
* | Also replace uses of SRL if that's also folded during ReduceLoadWidth(). | Evan Cheng | 2007-03-23 | 1 | -1/+8 |
| | | | | llvm-svn: 35286 | ||||
* | A couple of bug fixes for reducing load width xform: | Evan Cheng | 2007-03-23 | 1 | -7/+16 |
| | | | | | | | 1. Address offset is in bytes. 2. Make sure truncate node uses are replaced with new load. llvm-svn: 35274 | ||||
* | Change uses of Function::front to Function::getEntryBlock for readability. | Dan Gohman | 2007-03-22 | 1 | -1/+1 |
| | | | | llvm-svn: 35265 | ||||
* | More opportunities to reduce load size. | Evan Cheng | 2007-03-22 | 1 | -45/+101 |
| | | | | llvm-svn: 35254 | ||||
* | Fix for PR1257. Bug in live range shortening as a result of copy coalescing | Evan Cheng | 2007-03-22 | 1 | -11/+9 |
| | | | | | | where the destination is dead. llvm-svn: 35252 | ||||
* | repair x86 performance, dejagnu problems from previous change | Dale Johannesen | 2007-03-21 | 1 | -2/+2 |
| | | | | llvm-svn: 35245 | ||||
* | fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits)) | Evan Cheng | 2007-03-21 | 1 | -6/+24 |
| | | | | llvm-svn: 35239 | ||||
* | Potential spiller improvement. | Evan Cheng | 2007-03-20 | 1 | -0/+27 |
| | | | | llvm-svn: 35228 | ||||
* | do not share old induction variables when this would result in invalid | Dale Johannesen | 2007-03-20 | 1 | -0/+16 |
| | | | | | | instructions (that would have to be split later) llvm-svn: 35227 | ||||
* | maintain LiveIn when splitting blocks (register scavenging needs it) | Dale Johannesen | 2007-03-20 | 2 | -1/+29 |
| | | | | llvm-svn: 35226 | ||||
* | Fix some VC++ warnings. | Jeff Cohen | 2007-03-20 | 1 | -0/+1 |
| | | | | llvm-svn: 35224 | ||||
* | Code clean up. | Lauro Ramos Venancio | 2007-03-20 | 1 | -23/+20 |
| | | | | llvm-svn: 35220 | ||||
* | Minor bug. | Evan Cheng | 2007-03-20 | 1 | -1/+2 |
| | | | | llvm-svn: 35219 | ||||
* | CopyToReg source operand can be a physical register. | Lauro Ramos Venancio | 2007-03-20 | 1 | -3/+19 |
| | | | | llvm-svn: 35213 | ||||
* | First cut trivial re-materialization support. | Evan Cheng | 2007-03-20 | 4 | -26/+151 |
| | | | | llvm-svn: 35208 | ||||
* | Remove -reduce-joining-phys-regs options. Make it on by default. | Evan Cheng | 2007-03-19 | 1 | -3/+1 |
| | | | | llvm-svn: 35165 | ||||
* | Minor bug fix. | Evan Cheng | 2007-03-19 | 1 | -1/+1 |
| | | | | llvm-svn: 35153 | ||||
* | - Merge UsedBlocks info after two virtual registers are coalesced. | Evan Cheng | 2007-03-18 | 1 | -23/+30 |
| | | | | | | - Use distance to closest use to determine whether to abort coalescing. llvm-svn: 35141 | ||||
* | Keep UsedBlocks info accurate. | Evan Cheng | 2007-03-18 | 2 | -0/+6 |
| | | | | llvm-svn: 35140 | ||||
* | Track the BB's where each virtual register is used. | Evan Cheng | 2007-03-17 | 1 | -15/+22 |
| | | | | llvm-svn: 35135 | ||||
* | Joining a live interval of a physical register with a virtual one can turn out | Evan Cheng | 2007-03-17 | 1 | -0/+54 |
| | | | | | | | | | | | | to be really bad. Once they are joined they are not broken apart. Also, physical intervals cannot be spilled! Added a heuristic as a workaround for this. Be careful coalescing with a physical register if the virtual register uses are "far". Check if there are uses in the same loop as the source (copy instruction). Check if it is in the loop preheader, etc. llvm-svn: 35134 | ||||
* | Use SmallSet instead of std::set. | Evan Cheng | 2007-03-17 | 1 | -1/+1 |
| | | | | llvm-svn: 35133 | ||||
* | If sdisel has decided to sink GEP index expression into any BB. Replace all uses | Evan Cheng | 2007-03-17 | 1 | -22/+37 |
| | | | | | | in that BB. llvm-svn: 35132 | ||||
* | Turn on GEP index sinking by default. | Evan Cheng | 2007-03-16 | 1 | -7/+0 |
| | | | | llvm-svn: 35127 | ||||
* | Stupid bug. | Evan Cheng | 2007-03-16 | 1 | -1/+1 |
| | | | | llvm-svn: 35126 | ||||
* | Sink a binary expression into its use blocks if it is a loop invariant | Evan Cheng | 2007-03-16 | 1 | -0/+92 |
| | | | | | | | computation used as GEP indexes and if the expression can be folded into target addressing mode of GEP load / store use types. llvm-svn: 35123 | ||||
* | Added isLegalAddressExpression hook to test if the given expression can be | Evan Cheng | 2007-03-16 | 1 | -0/+8 |
| | | | | | | folded into target addressing mode for the given type. llvm-svn: 35121 | ||||
* | Debugging output stuff. | Evan Cheng | 2007-03-15 | 1 | -4/+4 |
| | | | | llvm-svn: 35117 | ||||
* | Estimate a cost using the possible number of scratch registers required and use | Evan Cheng | 2007-03-14 | 1 | -9/+47 |
| | | | | | | | | | | it as a late BURR scheduling tie-breaker. Intuitively, it's good to push down instructions whose results are liveout so their long live ranges won't conflict with other values which are needed inside the BB. Further prioritize liveout instructions by the number of operands which are calculated within the BB. llvm-svn: 35109 | ||||
* | Try schedule def + use closer whne Sethi-Ullman numbers are the same. | Evan Cheng | 2007-03-13 | 1 | -6/+38 |
| | | | | | | | | | | | | | | | | | | | | | e.g. t1 = op t2, c1 t3 = op t4, c2 and the following instructions are both ready. t2 = op c3 t4 = op c4 Then schedule t2 = op first. i.e. t4 = op c4 t2 = op c3 t1 = op t2, c1 t3 = op t4, c2 This creates more short live intervals which work better with the register allocator. llvm-svn: 35089 | ||||
* | More flexible TargetLowering LSR hooks for testing whether an immediate is a ↵ | Evan Cheng | 2007-03-12 | 1 | -3/+13 |
| | | | | | | legal target address immediate or scale. llvm-svn: 35076 | ||||
* | If a virtual register is already marked alive in this block, that means it is | Evan Cheng | 2007-03-09 | 1 | -1/+6 |
| | | | | | | alive in one of the successor block. Do not add it to the kill list. llvm-svn: 35041 | ||||
* | Print preds / succs BB numbers. | Evan Cheng | 2007-03-09 | 1 | -2/+2 |
| | | | | llvm-svn: 35040 | ||||
* | Avoid variable shadowing. | Evan Cheng | 2007-03-09 | 1 | -2/+2 |
| | | | | llvm-svn: 35039 | ||||
* | implement support for floating point constants used as inline asm memory ↵ | Chris Lattner | 2007-03-08 | 1 | -2/+7 |
| | | | | | | operands. llvm-svn: 35033 | ||||
* | make this fail even in non-assert builds. | Chris Lattner | 2007-03-08 | 1 | -2/+4 |
| | | | | llvm-svn: 35025 | ||||
* | Refactoring of formal parameter flags. Enable properly use of | Anton Korobeynikov | 2007-03-07 | 2 | -31/+31 |
| | | | | | | zext/sext/aext stuff. llvm-svn: 35008 | ||||
* | Cleanup: make SetCounter an instance variable | Anton Korobeynikov | 2007-03-07 | 1 | -28/+26 |
| | | | | llvm-svn: 35007 | ||||
* | Avoid combining indexed load further. | Evan Cheng | 2007-03-07 | 1 | -8/+14 |
| | | | | llvm-svn: 35005 | ||||
* | Fix DWARF debugging information on x86/Linux and (hopefully) | Anton Korobeynikov | 2007-03-07 | 1 | -17/+61 |
| | | | | | | Mingw32/Cygwin targets. This fixes PR978 llvm-svn: 35000 | ||||
* | Minor bug fix. | Evan Cheng | 2007-03-06 | 1 | -0/+2 |
| | | | | llvm-svn: 34985 | ||||
* | Now LoopStrengthReduce is a LoopPass. | Devang Patel | 2007-03-06 | 1 | -0/+1 |
| | | | | llvm-svn: 34984 | ||||
* | big endian 32-bit systems (e.g. ppc32) want to return the high reg first, not | Chris Lattner | 2007-03-06 | 1 | -0/+5 |
| | | | | | | | the lo-reg first. This is fallout from my ppc calling conv change yesterday, it fixes test/ExecutionEngine/2003-05-06-LivenessClobber.llx llvm-svn: 34983 |