|  | Commit message (Collapse) | Author | Age | Files | Lines | 
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| | list
This simplifies reasoning about the code and enables simple navigation
from a skeleton to its full unit. (currently there are no type unit
skeletons, so the skeleton list doesn't have the same ID == index
property)
Eventually we should get rid of this ID and just store the labels we
need as the IDs are allowing this code to create difficult to
manage/understand associations (loops over non-skeletal units are
implicitly referencing their skeletal units during pub* emission, for
example). It may be necessary to have some kind of skeleton->full unit
association and a more direct pointer or similar device would be
preferable than an index.
llvm-svn: 196600 | 
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| | llvm-svn: 196585 | 
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| | Not only does it trigger -Wparentheses, I think the assert actually
relies on incorrect operator precedence.
Also, the grammar as questionable, but I might not know enough about the
problem at hand.
llvm-svn: 196567 | 
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| | llvm-svn: 196536 | 
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| | The typedef is used inside the DEBUG(), and apparently can't be moved
inside of it.
llvm-svn: 196528 | 
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| | Unused typedefs and unused variables.
llvm-svn: 196526 | 
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| | llvm-svn: 196519 | 
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| | This allows a target to use MI-Sched as an in-order scheduler that
will model strict resource conflicts without defining a processor
itinerary. Instead, the target can now use the new per-operand machine
model and define in-order resources with BufferSize=0. For example,
this would allow restricting the type of operations that can be formed
into a dispatch group. (Normally NumMicroOps is sufficient to enforce
dispatch groups).
If the intent is to model latency in in-order pipeline, as opposed to
resource conflicts, then a resource with BufferSize=1 should be
defined instead.
This feature is only casually tested as there are no in-tree targets
using it yet. However, Hal will be experimenting with POWER7.
llvm-svn: 196517 | 
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| | The per-operand machine model allows the target to define "unbuffered"
processor resources. This change is a quick, cheap way to model stalls
caused by the latency of operations that use such resources. This only
applies when the processor's micro-op buffer size is non-zero
(Out-of-Order). We can't precisely model in-order stalls during
out-of-order execution, but this is an easy and effective
heuristic. It benefits cortex-a9 scheduling when using the new
machine model, which is not yet on by default.
MI-Sched for armv7 was evaluated on Swift (and only not enabled because
of a performance bug related to predication). However, we never
evaluated Cortex-A9 performance on MI-Sched in its current form. This
change adds MI-Sched functionality to reach performance goals on
A9. The only remaining change is to allow MI-Sched to run as a PostRA
pass.
I evaluated performance using a set of options to estimate the performance impact once MI sched is default on armv7:
-mcpu=cortex-a9 -disable-post-ra -misched-bench -scheditins=false
For a simple saxpy loop I see a 1.7x speedup. Here are the llvm-testsuite results:
(min run time over 2 runs, filtering tiny changes)
Speedups:
| Benchmarks/BenchmarkGame/recursive         |  52.39% |
| Benchmarks/VersaBench/beamformer           |  20.80% |
| Benchmarks/Misc/pi                         |  19.97% |
| Benchmarks/Misc/mandel-2                   |  19.95% |
| SPEC/CFP2000/188.ammp                      |  18.72% |
| Benchmarks/McCat/08-main/main              |  18.58% |
| Benchmarks/Misc-C++/Large/sphereflake      |  18.46% |
| Benchmarks/Olden/power                     |  17.11% |
| Benchmarks/Misc-C++/mandel-text            |  16.47% |
| Benchmarks/Misc/oourafft                   |  15.94% |
| Benchmarks/Misc/flops-7                    |  14.99% |
| Benchmarks/FreeBench/distray               |  14.26% |
| SPEC/CFP2006/470.lbm                       |  14.00% |
| mediabench/mpeg2/mpeg2dec/mpeg2decode      |  12.28% |
| Benchmarks/SmallPT/smallpt                 |  10.36% |
| Benchmarks/Misc-C++/Large/ray              |   8.97% |
| Benchmarks/Misc/fp-convert                 |   8.75% |
| Benchmarks/Olden/perimeter                 |   7.10% |
| Benchmarks/Bullet/bullet                   |   7.03% |
| Benchmarks/Misc/mandel                     |   6.75% |
| Benchmarks/Olden/voronoi                   |   6.26% |
| Benchmarks/Misc/flops-8                    |   5.77% |
| Benchmarks/Misc/matmul_f64_4x4             |   5.19% |
| Benchmarks/MiBench/security-rijndael       |   5.15% |
| Benchmarks/Misc/flops-6                    |   5.10% |
| Benchmarks/Olden/tsp                       |   4.46% |
| Benchmarks/MiBench/consumer-lame           |   4.28% |
| Benchmarks/Misc/flops-5                    |   4.27% |
| Benchmarks/mafft/pairlocalalign            |   4.19% |
| Benchmarks/Misc/himenobmtxpa               |   4.07% |
| Benchmarks/Misc/lowercase                  |   4.06% |
| SPEC/CFP2006/433.milc                      |   3.99% |
| Benchmarks/tramp3d-v4                      |   3.79% |
| Benchmarks/FreeBench/pifft                 |   3.66% |
| Benchmarks/Ptrdist/ks                      |   3.21% |
| Benchmarks/Adobe-C++/loop_unroll           |   3.12% |
| SPEC/CINT2000/175.vpr                      |   3.12% |
| Benchmarks/nbench                          |   2.98% |
| SPEC/CFP2000/183.equake                    |   2.91% |
| Benchmarks/Misc/perlin                     |   2.85% |
| Benchmarks/Misc/flops-1                    |   2.82% |
| Benchmarks/Misc-C++-EH/spirit              |   2.80% |
| Benchmarks/Misc/flops-2                    |   2.77% |
| Benchmarks/NPB-serial/is                   |   2.42% |
| Benchmarks/ASC_Sequoia/CrystalMk           |   2.33% |
| Benchmarks/BenchmarkGame/n-body            |   2.28% |
| Benchmarks/SciMark2-C/scimark2             |   2.27% |
| Benchmarks/Olden/bh                        |   2.03% |
| skidmarks10/skidmarks                      |   1.81% |
| Benchmarks/Misc/flops                      |   1.72% |
Slowdowns:
| Benchmarks/llubenchmark/llu                | -14.14% |
| Benchmarks/Polybench/stencils/seidel-2d    |  -5.67% |
| Benchmarks/Adobe-C++/functionobjects       |  -5.25% |
| Benchmarks/Misc-C++/oopack_v1p8            |  -5.00% |
| Benchmarks/Shootout/hash                   |  -2.35% |
| Benchmarks/Prolangs-C++/ocean              |  -2.01% |
| Benchmarks/Polybench/medley/floyd-warshall |  -1.98% |
| Polybench/linear-algebra/kernels/3mm       |  -1.95% |
| Benchmarks/McCat/09-vor/vor                |  -1.68% |
llvm-svn: 196516 | 
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| | llvm-svn: 196513 | 
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| | reduce duplication
llvm-svn: 196479 | 
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| | This patch tries to avoid unrelated changes other than fixing a few
hyphen-related ambiguities and contractions in nearby lines.
llvm-svn: 196471 | 
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| | This just extends the existing hack. It should be enough to get a reproducible bootstrap
on 32 bits.
I will open a bug to track getting a real fix for this.
llvm-svn: 196462 | 
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| | DIEs already contain references directly to their DIEAbbrev, use that
instead of looking it up based on index.
llvm-svn: 196446 | 
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| | llvm-svn: 196445 | 
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| | llvm-svn: 196442 | 
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| | values with the correct behavior.
llvm-svn: 196441 | 
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| | llvm-svn: 196437 | 
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| | compilation units.
Code review feedback on r196394 by Paul Robinson.
llvm-svn: 196433 | 
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| | llvm-svn: 196431 | 
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| | llvm-svn: 196430 | 
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| | llvm-svn: 196427 | 
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| | llvm-svn: 196426 | 
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| | llvm-svn: 196422 | 
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| | llvm-svn: 196421 | 
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| | rather than magically making the names match.
llvm-svn: 196419 | 
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| | While we still have a few (~4) non-trivial comments with string
concatenation, etc that should remain conditionalized, these trivial
literal comments can be simplified.
llvm-svn: 196416 | 
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| | llvm-svn: 196414 | 
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| | checks. No functional change.
llvm-svn: 196412 | 
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| | a few things more const as well because we're now using const
references to refer to iterators.
llvm-svn: 196398 | 
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| | Since we always emit only one abbrevation section (shared by all the
compilation units in this module) there's no need for a separate label
at the start of each one (and we weren't using the CU ID anyway, so
there really was only one label). Use the section label instead and drop
the wholely unused debug_abbrev_end label.
llvm-svn: 196394 | 
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| | Instead, reuse the same MCSymbol - this should make the code easier to
follow by avoiding hard to trace dependencies between different bits of
code.
llvm-svn: 196392 | 
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| | llvm-svn: 196323 | 
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| | llvm-svn: 196310 | 
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| | llvm-svn: 196304 | 
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| | Addressing the existense AMDGPUAsmPrinter and other subclasses of AsmPrinter
llvm-svn: 196288 | 
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| | It broke CodeGen/R600 tests with +Asserts.
llvm-svn: 196272 | 
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| | llvm-svn: 196270 | 
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| | propagation graph via graphviz.
This is useful for debugging issues in the BlockFrequency implementation
since one can easily visualize where probability mass and other errors
occur in the propagation.
This is the MI version of r194654.
llvm-svn: 196183 | 
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| | into a single function. No functional change.
llvm-svn: 196181 | 
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| | llvm-svn: 196180 | 
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| | llvm-svn: 196179 | 
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| | and emitted per function and CU. Begins coalescing ranges as a first
class entity through debug info. No functional change.
llvm-svn: 196178 | 
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| | llvm-svn: 196168 | 
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| | Review feedback from Eric Christopher on r196140
llvm-svn: 196160 | 
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| | that they might be type units instead of compile units.
CR feedback from Eric Christopher on r196139.
llvm-svn: 196159 | 
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| | llvm-svn: 196140 | 
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| | CompileUnit/TypeUnit derived classes.
Header/cpp file rename to follow immediately - just splitting out the
commits for ease of review/reading to demonstrate that the renaming
changes are entirely mechanical.
llvm-svn: 196139 | 
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| | llvm-svn: 196130 | 
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| | This allows it to be used in TargetLoweringObjectFileImpl.cpp.
llvm-svn: 196117 |