summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
* Remove the only use of SlotIndex::isPHI. This bit is not being set consistentlyJakob Stoklund Olesen2010-09-251-1/+1
| | | | | | and it will be removed shortly. llvm-svn: 114778
* Terminator gaps were unused. Might as well delete them.Jakob Stoklund Olesen2010-09-241-16/+1
| | | | llvm-svn: 114776
* Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash.John Thompson2010-09-241-0/+20
| | | | llvm-svn: 114767
* Get rid of pop_macro warnings on MSVC.Michael J. Spencer2010-09-242-6/+10
| | | | llvm-svn: 114750
* Attach a DebugLoc to a GC point in order to get precise information in the ↵Nicolas Geoffray2010-09-241-6/+8
| | | | | | JIT of a GC point. llvm-svn: 114736
* Revert 114634 for now since buildbot claim it broke Clang self-hosting. I ↵Evan Cheng2010-09-231-4/+6
| | | | | | doubt it but it's possible it's exposing another bug somewhere. llvm-svn: 114681
* Fix VS 2010 build.Oscar Fuentes2010-09-231-4/+4
| | | | | | Patch by Nathan Jeffords! llvm-svn: 114661
* Follow up to r114630. Do not optimize away unconditional branch following a ↵Evan Cheng2010-09-231-6/+4
| | | | | | conditional one. llvm-svn: 114634
* Don't sink insert_subreg, subreg_to_reg, reg_sequence. They are meant to beEvan Cheng2010-09-231-1/+10
| | | | | | close to their sources to facilitate coalescing. llvm-svn: 114631
* SDISel should not optimize a unconditional branch following a conditional branchEvan Cheng2010-09-231-4/+5
| | | | | | | | | | | | when the unconditional branch destination is the fallthrough block. The canonicalization makes it easier to allow optimizations on DAGs to invert conditional branches. The branch folding pass (and AnalyzeBranch) will clean up the unnecessary unconditional branches later. This is one of the patches leading up to disabling codegen prepare critical edge splitting. llvm-svn: 114630
* Moved the PBQP allocator class out of the header and back in to the cpp file ↵Lang Hames2010-09-231-60/+190
| | | | | | | | | | | | | | to hide the gory details. Allocator instances can now be created by calling createPBQPRegisterAllocator. Tidied up use of CoalescerPair as per Jakob's suggestions. Made the new PBQPBuilder based construction process the default. The internal construction process remains in-place and available via -pbqp-builder=false for now. It will be removed shortly if the new process doesn't cause any regressions. llvm-svn: 114626
* A select between a constant and zero, when fed by a bit test, can be efficientlyOwen Anderson2010-09-221-0/+29
| | | | | | | lowered using a series of shifts. Fixes <rdar://problem/8285015>. llvm-svn: 114599
* Use DW_OP_fbreg when offset is based on frame register.Devang Patel2010-09-221-0/+10
| | | | llvm-svn: 114585
* Build the complement interval dupli after the split intervals instead ofJakob Stoklund Olesen2010-09-212-35/+145
| | | | | | | | | | | | | creating it before and subtracting split ranges. This way, the SSA update code in LiveIntervalMap can properly create and use new phi values in dupli. Now it is possible to create split regions where a value escapes along two different CFG edges, creating phi values outside the split region. This is a work in progress and probably quite broken. llvm-svn: 114492
* Fixed pr20314-2.c failure, added E, F, p constraint letters.John Thompson2010-09-211-6/+17
| | | | llvm-svn: 114490
* Rework passing parent pointers into complexpatterns, I forgotChris Lattner2010-09-211-27/+35
| | | | | | | | that complex patterns are matched after the entire pattern has a structural match, therefore the NodeStack isn't in a useful state when the actual call to the matcher happens. llvm-svn: 114489
* If only user of a vreg is an copy instruction to export copy of vreg out of ↵Devang Patel2010-09-211-0/+23
| | | | | | | | | current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg. Testcase is in r114476. This fixes radar 8412415. llvm-svn: 114478
* correct this logic.Chris Lattner2010-09-211-2/+2
| | | | llvm-svn: 114474
* Reimplement r114460 in target-independent DAGCombine rather than ↵Owen Anderson2010-09-211-0/+14
| | | | | | | | | target-dependent, by using the predicate to discover the number of sign bits. Enhance X86's target lowering to provide a useful response to this query. llvm-svn: 114473
* just like they can opt into getting the root of the pattern beingChris Lattner2010-09-211-1/+5
| | | | | | | matched, allow ComplexPatterns to opt into getting the parent node of the operand being matched. llvm-svn: 114472
* Refix MSVC9 and upper_bound. It actually needs a fully symmetric comparator.Jakob Stoklund Olesen2010-09-211-7/+5
| | | | llvm-svn: 114469
* finish pushing MachinePointerInfo through selectiondags. At this point,Chris Lattner2010-09-212-16/+7
| | | | | | | I think I've audited all uses, so it should be dependable for address spaces, and the pointer+offset info should also be accurate when there. llvm-svn: 114464
* convert a couple more places to use the new getStore()Chris Lattner2010-09-211-0/+4
| | | | llvm-svn: 114463
* update a bunch of code to use the MachinePointerInfo version of getStore.Chris Lattner2010-09-215-34/+25
| | | | llvm-svn: 114461
* Don't pollute the global namespace.Jakob Stoklund Olesen2010-09-211-0/+2
| | | | llvm-svn: 114459
* MSVC9 does not support upper_bound with an asymmetric comparator.Jakob Stoklund Olesen2010-09-211-6/+10
| | | | llvm-svn: 114455
* Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON loadBob Wilson2010-09-211-1/+2
| | | | | | and store intrinsics are represented with MemIntrinsicSDNodes. llvm-svn: 114454
* eliminate an old SelectionDAG::getTruncStore method, propagatingChris Lattner2010-09-215-83/+63
| | | | | | MachinePointerInfo around more. llvm-svn: 114452
* eliminate last SelectionDAG::getLoad old entrypoint, on to stores.Chris Lattner2010-09-213-22/+7
| | | | llvm-svn: 114450
* fix the code that infers SV info to be correct when dealingChris Lattner2010-09-211-28/+53
| | | | | | with an indexed load/store that has an offset in the index. llvm-svn: 114449
* Add LiveInterval::find and use it for most LiveRange searching operationsJakob Stoklund Olesen2010-09-211-68/+8
| | | | | | | | | | | | instead of calling lower_bound or upper_bound directly. This cleans up the search logic a bit because {lower,upper}_bound compare LR->start by default, and it is usually simpler to search LR->end. Funnelling all searches through one function also makes it possible to replace the search algorithm with something faster than binary search. llvm-svn: 114448
* Remove dead method.Jakob Stoklund Olesen2010-09-211-21/+0
| | | | llvm-svn: 114447
* propagate MachinePointerInfo through various uses of the oldChris Lattner2010-09-216-261/+245
| | | | | | SelectionDAG::getExtLoad overload, and eliminate it. llvm-svn: 114446
* continue MachinePointerInfo'izing, eliminating use of one of the oldChris Lattner2010-09-218-192/+192
| | | | | | getLoad overloads. llvm-svn: 114443
* convert dagcombine off the old form of getLoad. This fixes several bugs Chris Lattner2010-09-211-16/+18
| | | | | | with SVOffset computation. llvm-svn: 114442
* simplify DAGCombiner::SimplifySelectOps step #2/2.Chris Lattner2010-09-211-55/+53
| | | | llvm-svn: 114437
* substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.Chris Lattner2010-09-211-85/+76
| | | | | | no functionality change (step #1) llvm-svn: 114436
* Fixed ambiguous call.Lang Hames2010-09-211-1/+2
| | | | llvm-svn: 114431
* Added an additional PBQP problem builder which adds coalescing costs (both ↵Lang Hames2010-09-211-14/+127
| | | | | | between pairs of virtuals, and between virtuals and physicals). llvm-svn: 114429
* Move the search for the appropriate AND instructionGabor Greif2010-09-211-3/+3
| | | | | | | | | | into OptimizeCompareInstr. This necessitates the passing of CmpValue around, so widen the virtual functions to accomodate. No functionality changes. llvm-svn: 114428
* a few more trivial updates. This fixes PerformInsertVectorEltInMemory to notChris Lattner2010-09-212-15/+13
| | | | | | | pass a completely incorrect SrcValue, which would result in a miscompile with combiner-aa. llvm-svn: 114411
* add some accessorsChris Lattner2010-09-211-0/+7
| | | | llvm-svn: 114409
* it's more elegant to put the "getConstantPool" andChris Lattner2010-09-211-0/+12
| | | | | | | | "getFixedStack" on the MachinePointerInfo class. While this isn't the problem I'm setting out to solve, it is the right way to eliminate PseudoSourceValue, so lets go with it. llvm-svn: 114406
* reimplement memcpy/memmove/memset lowering to use MachinePointerInfoChris Lattner2010-09-212-29/+54
| | | | | | | instead of srcvalue/offset pairs. This corrects SV info for mem operations whose size is > 32-bits. llvm-svn: 114401
* add some helpful accessors.Chris Lattner2010-09-211-0/+8
| | | | llvm-svn: 114400
* add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take aChris Lattner2010-09-211-18/+47
| | | | | | | MachinePointerInfo. Among other virtues, this doesn't silently truncate the svoffset to 32-bits. llvm-svn: 114399
* simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a ↵Chris Lattner2010-09-212-6/+6
| | | | | | MachinePointerInfo llvm-svn: 114397
* chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,Chris Lattner2010-09-212-12/+4
| | | | | | eliminating some weird "infer a frame address" logic which was dead. llvm-svn: 114396
* don't implicitly drop the offset of a machinememoperand when legalizing atomics.Chris Lattner2010-09-211-2/+2
| | | | llvm-svn: 114395
* force clients of MachineFunction::getMachineMemOperand to provide aChris Lattner2010-09-213-24/+15
| | | | | | | MachinePointerInfo, propagating the type out a level of API. Remove the old MachineFunction::getMachineMemOperand impl. llvm-svn: 114393
OpenPOWER on IntegriCloud