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* Move the PostRA scheduler's fixupKills function for reuse.Andrew Trick2013-12-282-163/+150
| | | | llvm-svn: 198121
* Stub out a PostMachineScheduler pass.Andrew Trick2013-12-283-1/+82
| | | | | | Placeholder and boilerplate for a PostRA MachineScheduler pass. llvm-svn: 198120
* Factor MI-Sched in preparation for post-ra scheduling support.Andrew Trick2013-12-281-186/+308
| | | | | | | | Factor the MachineFunctionPass into MachineSchedulerBase. Split the DAG class into ScheduleDAGMI and SchedulerDAGMILive. llvm-svn: 198119
* Remove AsmPrinter::needsRelocationsForDwarfStringPool() since it'sEric Christopher2013-12-282-6/+3
| | | | | | | just calling into MAI and is only abstracting for a single interface that we actually need to check in multiple places. llvm-svn: 198092
* Teach DAGCombiner how to fold a SIGN_EXTEND_INREG of a BUILD_VECTOR ofAndrea Di Biagio2013-12-272-0/+39
| | | | | | | | | | | | | | | | | | | | ConstantSDNodes (or UNDEFs) into a simple BUILD_VECTOR. For example, given the following sequence of dag nodes: i32 C = Constant<1> v4i32 V = BUILD_VECTOR C, C, C, C v4i32 Result = SIGN_EXTEND_INREG V, ValueType:v4i1 The SIGN_EXTEND_INREG node can be folded into a build_vector since the vector in input is a BUILD_VECTOR of constants. The optimized sequence is: i32 C = Constant<-1> v4i32 Result = BUILD_VECTOR C, C, C, C llvm-svn: 198084
* Debug info: Add enumerators to the __apple_names accelerator table.Adrian Prantl2013-12-231-0/+3
| | | | | | rdar://problem/11516681. llvm-svn: 197927
* Ranges in the .debug_range section need to have begin and end labels,Eric Christopher2013-12-201-13/+8
| | | | | | assert that this is so. llvm-svn: 197780
* Add support for a CU to output a set of ranges for the CU. This is usefulEric Christopher2013-12-202-20/+74
| | | | | | | | when you want to have the full list of addresses for a particular CU or when you have multiple modules linked together and can't depend upon the ordering of a single CU for begin/end ranges. llvm-svn: 197776
* [stackprotector] Use analysis from the StackProtector pass for stack layout ↵Josh Magee2013-12-198-35/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | in PEI a nd LocalStackSlot passes. This changes the MachineFrameInfo API to use the new SSPLayoutKind information produced by the StackProtector pass (instead of a boolean flag) and updates a few pass dependencies (to preserve the SSP analysis). The stack layout follows the same approach used prior to this change - i.e., only LargeArray stack objects will be placed near the canary and everything else will be laid out normally. After this change, structures containing large arrays will also be placed near the canary - a case previously missed by the old implementation. Out of tree targets will need to update their usage of MachineFrameInfo::CreateStackObject to remove the MayNeedSP argument. The next patch will implement the rules for sspstrong and sspreq. The end goal is to support ssp-strong stack layout rules. WIP. Differential Revision: http://llvm-reviews.chandlerc.com/D2158 llvm-svn: 197653
* Debug info: Implement (rvalue) reference qualifiers for C++11 non-staticAdrian Prantl2013-12-181-0/+12
| | | | | | | | member functions. Paired commit with CFE. rdar://problem/15356637 llvm-svn: 197613
* DebugInfo: Introduce new DIValue, DIETypeSignature to encode references to ↵David Blaikie2013-12-176-36/+61
| | | | | | | | | type units via their signatures This simplifies type unit and type unit reference creation as well as setting the stage for inter-type hashing across type unit boundaries. llvm-svn: 197539
* Disabled subregister copy coalescing during MachineCSE.Andrew Trick2013-12-171-5/+15
| | | | | | | | | This effectively backs out r197465 but leaves some of the general fixes in place. Not all targets are ready to handle this feature. To enable it, some infrastructure work is needed to better handle register class constraints. llvm-svn: 197514
* Add warning capabilities in LLVM.Quentin Colombet2013-12-171-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reapplies r197438 and fixes the link-time circular dependency between IR and Support. The fix consists in moving the diagnostic support into IR. The patch adds a new LLVMContext::diagnose that can be used to communicate to the front-end, if any, that something of interest happened. The diagnostics are supported by a new abstraction, the DiagnosticInfo class. The base class contains the following information: - The kind of the report: What this is about. - The severity of the report: How bad this is. This patch also adds 2 classes: - DiagnosticInfoInlineAsm: For inline asm reporting. Basically, this diagnostic will be used to switch to the new diagnostic API for LLVMContext::emitError. - DiagnosticStackSize: For stack size reporting. Comes as a replacement of the hard coded warning in PEI. This patch also features dynamic diagnostic identifiers. In other words plugins can use this infrastructure for their own diagnostics (for more details, see getNextAvailablePluginDiagnosticKind). This patch introduces a new DiagnosticHandlerTy and a new DiagnosticContext in the LLVMContext that should be set by the front-end to be able to map these diagnostics in its own system. http://llvm-reviews.chandlerc.com/D2376 <rdar://problem/15515174> llvm-svn: 197508
* Allow MachineCSE to coalesce trivial subregister copies the same way that it ↵Andrew Trick2013-12-172-10/+40
| | | | | | | | | | | | | | | | | | | | coalesces normal copies. Without this, MachineCSE is powerless to handle redundant operations with truncated source operands. This required fixing the 2-addr pass to handle tied subregisters. It isn't clear what combinations of subregisters can legally be tied, but the simple case of truncated source operands is now safely handled: %vreg11<def> = COPY %vreg1:sub_32bit; GR32:%vreg11 GR64:%vreg1 %vreg12<def> = COPY %vreg2:sub_32bit; GR32:%vreg12 GR64:%vreg2 %vreg13<def,tied1> = ADD32rr %vreg11<tied0>, %vreg12<kill>, %EFLAGS<imp-def> Test case: cse-add-with-overflow.ll. This exposed an existing bug in PPCInstrInfo::commuteInstruction. Thanks to Rafael for the test case: PowerPC/crash.ll. llvm-svn: 197465
* Make comment more explicit.Jim Grosbach2013-12-171-3/+3
| | | | | | | Re-reading the comment I updated in previous commit, it's better to make it more explicit and avoid ambiguity more effectively. llvm-svn: 197458
* Typo. s/reserved/preserved/Jim Grosbach2013-12-171-1/+1
| | | | llvm-svn: 197457
* Add a machine code print in DEBUG() following instruction selection.Jim Grosbach2013-12-171-0/+3
| | | | | | | Make debugging ISel a bit easier by printing out a dump of the generated code at the end. llvm-svn: 197456
* Revert r197438 and r197447 until we figure out how to avoid circular ↵Quentin Colombet2013-12-171-7/+4
| | | | | | dependency at link time llvm-svn: 197451
* Add warning capabilities in LLVM.Quentin Colombet2013-12-161-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds a new LLVMContext::diagnose that can be used to communicate to the front-end, if any, that something of interest happened. The diagnostics are supported by a new abstraction, the DiagnosticInfo class. The base class contains the following information: - The kind of the report: What this is about. - The severity of the report: How bad this is. This patch also adds 2 classes: - DiagnosticInfoInlineAsm: For inline asm reporting. Basically, this diagnostic will be used to switch to the new diagnostic API for LLVMContext::emitError. - DiagnosticStackSize: For stack size reporting. Comes as a replacement of the hard coded warning in PEI. This patch also features dynamic diagnostic identifiers. In other words plugins can use this infrastructure for their own diagnostics (for more details, see getNextAvailablePluginDiagnosticKind). This patch introduces a new DiagnosticHandlerTy and a new DiagnosticContext in the LLVMContext that should be set by the front-end to be able to map these diagnostics in its own system. http://llvm-reviews.chandlerc.com/D2376 <rdar://problem/15515174> llvm-svn: 197438
* Revert "Allow MachineCSE to coalesce trivial subregister copies the same way ↵Rafael Espindola2013-12-162-35/+9
| | | | | | | | | | that it coalesces normal copies." This reverts commit r197414. It broke the ppc64 bootstrap. I will post a testcase in a sec. llvm-svn: 197424
* Allow MachineCSE to coalesce trivial subregister copies the same wayAndrew Trick2013-12-162-9/+35
| | | | | | | | | | | | | | | | | that it coalesces normal copies. Without this, MachineCSE is powerless to handle redundant operations with truncated source operands. This required fixing the 2-addr pass to handle tied subregisters. It isn't clear what combinations of subregisters can legally be tied, but the simple case of truncated source operands is now safely handled: %vreg11<def> = COPY %vreg1:sub_32bit; GR32:%vreg11 GR64:%vreg1 %vreg12<def> = COPY %vreg2:sub_32bit; GR32:%vreg12 GR64:%vreg2 %vreg13<def,tied1> = ADD32rr %vreg11<tied0>, %vreg12<kill>, %EFLAGS<imp-def> llvm-svn: 197414
* whitespaceAndrew Trick2013-12-161-1/+1
| | | | llvm-svn: 197413
* [Stackmap] Refactor operand parsing.Juergen Ributzka2013-12-141-91/+74
| | | | llvm-svn: 197329
* Remove weak vtables. No functional change.Juergen Ributzka2013-12-144-1/+9
| | | | llvm-svn: 197323
* [Stackmap] Liveness Analysis PassJuergen Ributzka2013-12-147-14/+255
| | | | | | | | | | | | | | | | | | | | This optional register liveness analysis pass can be enabled with either -enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass traverses each basic block in a machine function. For each basic block the instructions are processed in reversed order and if a patchpoint or stackmap instruction is encountered the current live-out register set is encoded as a register mask and attached to the instruction. Later on during stackmap generation the live-out register mask is processed and also emitted as part of the stackmap. This information is optional and intended for optimization purposes only. This will enable a client of the stackmap to reason about the registers it can use and which registers need to be preserved. Reviewed by Andy llvm-svn: 197317
* Convert register liveness tracking to work on a sub-register level instead ↵Juergen Ributzka2013-12-145-146/+145
| | | | | | | | of just register units. Reviewed by Andy llvm-svn: 197315
* [block-freq] Rename getEntryFrequency() -> getEntryFreq() to match ↵Michael Gottesman2013-12-144-5/+5
| | | | | | getBlockFreq() in all *BlockFrequencyInfo*. llvm-svn: 197304
* [block-freq] Refactor LiveInterals::getSpillWeight to use the new ↵Michael Gottesman2013-12-144-8/+10
| | | | | | | | | | | | | | | | | | | | | | | MachineBlockFrequencyInfo methods. This is slightly more interesting than the previous batch of changes. Specifically: 1. We refactor getSpillWeight to take a MachineBlockFrequencyInfo (MBFI) object. This enables us to completely encapsulate the actual manner we use the MachineBlockFrequencyInfo to get our spill weights. This yields cleaner code since one does not need to fetch the actual block frequency before getting the spill weight if all one wants it the spill weight. It also gives us access to entry frequency which we need for our computation. 2. Instead of having getSpillWeight take a MachineBasicBlock (as one might think) to look up the block frequency via the MBFI object, we instead take in a MachineInstr object. The reason for this is that the method is supposed to return the spill weight for an instruction according to the comments around the function. llvm-svn: 197296
* [block-freq] Store MBFI as a field on SpillPlacement so we can access it to ↵Michael Gottesman2013-12-142-3/+5
| | | | | | get the entry frequency while processing data. llvm-svn: 197291
* [block-freq] Update MachineBlockPlacement and RegAllocGreedy to use the new ↵Michael Gottesman2013-12-142-9/+13
| | | | | | MachineBlockFrequencyInfo methods. llvm-svn: 197290
* [block-freq] Update BlockFrequencyInfo/MachineBlockFrequencyInfo to use the ↵Michael Gottesman2013-12-141-1/+1
| | | | | | new print methods. llvm-svn: 197289
* Print the address space of a MachineMemOperandMatt Arsenault2013-12-141-0/+4
| | | | llvm-svn: 197288
* [block-freq] Add the equivalent methods to MachineBlockFrequencyInfo and ↵Michael Gottesman2013-12-141-0/+16
| | | | | | BlockFrequencyInfo that were added to BlockFrequencyImpl in r197285 and r197284. llvm-svn: 197287
* comment typo.Andrew Trick2013-12-131-1/+1
| | | | llvm-svn: 197278
* DebugInfo: Move type units into the debug_types section with appropriate ↵David Blaikie2013-12-133-9/+45
| | | | | | | | | | | | | | | | | | | | | | | | comdat grouping and type unit headers This commit does not complete the type units feature - there are issues around fission support (skeletal type units, pubtypes/pubnames) and hashing of some types including those containing references to types in other type units. Originally committed as r197073 and reverted in r197079. Recommitted as r197197 to reproduce the failure and reverted as r197199 Turns out there was unstable ordering in the type unit dumping code. Fixed by using MapVector in DWARFContext to store the debug_types comdat sections. Recommitted as r197210 with a fix to dumping and reverted as r197211 because I was a bit gun shy and thought I saw a failure that turned out to be unrelated. So here we go - once more with feeling! \o/ llvm-svn: 197275
* Revert "Convert liveness tracking to work on a sub-register level instead of ↵Andrew Trick2013-12-135-122/+146
| | | | | | | | | | just register units." This reverts commit r197253. This was a great change, but Juergen should be the commit author. llvm-svn: 197262
* Revert "Liveness Analysis Pass"Andrew Trick2013-12-137-253/+14
| | | | | | | | | | | | | | This reverts commit r197254. This was an accidental merge of Juergen's patch. It will be checked in shortly, but wasn't meant to go in quite yet. Conflicts: include/llvm/CodeGen/StackMaps.h lib/CodeGen/StackMaps.cpp test/CodeGen/X86/stackmap-liveness.ll llvm-svn: 197260
* Grow the stackmap/patchpoint format to hold 64-bit IDs.Andrew Trick2013-12-132-9/+8
| | | | llvm-svn: 197255
* Liveness Analysis PassAndrew Trick2013-12-137-13/+252
| | | | llvm-svn: 197254
* Convert liveness tracking to work on a sub-register level instead of just ↵Andrew Trick2013-12-135-146/+122
| | | | | | register units. llvm-svn: 197253
* Revert "DebugInfo: Move type units into the debug_types section with ↵David Blaikie2013-12-133-45/+9
| | | | | | | | appropriate comdat grouping and type unit headers" This reverts commit r197210. llvm-svn: 197211
* DebugInfo: Move type units into the debug_types section with appropriate ↵David Blaikie2013-12-133-9/+45
| | | | | | | | | | | | | | | | | | comdat grouping and type unit headers This commit does not complete the type units feature - there are issues around fission support (skeletal type units, pubtypes/pubnames) and hashing of some types including those containing references to types in other type units. Originally committed as r197073 and reverted in r197079. Recommitted as r197197 to reproduce the failure and reverted as r197199 Turns out there was unstable ordering in the type unit dumping code. Fixed by using MapVector in DWARFContext to store the debug_types comdat sections. llvm-svn: 197210
* Revert "DebugInfo: Move type units into the debug_types section with ↵David Blaikie2013-12-133-45/+9
| | | | | | | | appropriate comdat grouping and type unit headers" This reverts commit r197197. llvm-svn: 197199
* DebugInfo: Move type units into the debug_types section with appropriate ↵David Blaikie2013-12-133-9/+45
| | | | | | | | | | | | | | | | | | | comdat grouping and type unit headers This commit does not complete the type units feature - there are issues around fission support (skeletal type units, pubtypes/pubnames) and hashing of some types including those containing references to types in other type units. Originally committed as r197073 and reverted in r197079. This commit originally got jumbled up with another build-breaking commit and I can't find the failures I thought this caused anymore. Recommitting to hopefully get some clean buildbot results to work from. I have a sneaking suspicion there's unstable output in the comdat group output of MCStreamer... llvm-svn: 197197
* Fix an over-constrained assertion in MachineFunction::addLiveIn.Quentin Colombet2013-12-121-1/+10
| | | | | | | | | | | | | | | | The assertion was checking that the virtual register VReg used to represent the physical register PReg uses the same register class as the one passed to MachineFunction::addLiveIn. This is over-constraining because it is sufficient to check that the register class of VReg (VRegRC) is a subclass of the register class of PReg (PRegRC) and that VRegRC contains PReg. Indeed, if VReg gets constrained because of some operation constraints between two calls of MachineFunction::addLiveIn, the original assertion cannot match. This fixes <rdar://problem/15633429>. llvm-svn: 197097
* Add two additional hazard recognizer functionsHal Finkel2013-12-111-7/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds two additional functions to the hazard recognizer interface. These are optional (in the sense that the default implementations preserve the current behavior), and used by the post-RA scheduler. Upcoming commits will use this functionality in order to improve dispatch-group formation on the POWER7 and related cores. Dispatch groups are an odd construct: sometimes we need to insert nops to force a new one to start (for performance reasons), and some instructions need to appear in certain positions within a group, but the groups are not fundamentally cycle based (they can contain instructions with data dependencies with non-trivial latencies). Motivation: unsigned PreEmitNoops(SUnit *) - Used to force the post-RA scheduler to insert nops to force a new dispatch group to begin. We already have a NoopHazard, and this is also still needed. However, NoopHazard only causes a nop to be inserted if there are no other available instructions, and so is not always sufficient. The number of nops to insert depends on state that only the hazard recognizer has, so a general callback is necessary. bool ShouldPreferAnother(SUnit *) - Used to avoid scheduling instructions that would start a new dispatch group when others are available that could be part of the current dispatch group. In this case, we don't want to issue nops, because the non-preferred instruction will implicitly start a new dispatch group regardless. Although the motivation for these functions is driven by the PowerPC backend, they are completely general. llvm-svn: 197084
* On ELF and COFF treat linker_private like private.Rafael Espindola2013-12-111-1/+1
| | | | | | | | The linkers on these systems don't have anything special to do with these symbols. Since the intent is for them to be absent from the final object, just treat them as private. llvm-svn: 197080
* Revert "DebugInfo: Move type units into the debug_types section with ↵David Blaikie2013-12-113-45/+9
| | | | | | | | | | | | appropriate comdat grouping and type unit headers" This reverts commit r197073. The test seems to be failing on some buildbots for unknown reasons. Reverting until I can figure that out. If anyone's got a reproduction (.s and .o together would be great) - I'd really appreciate it. llvm-svn: 197079
* DebugInfo: Move type units into the debug_types section with appropriate ↵David Blaikie2013-12-113-9/+45
| | | | | | | | | | | comdat grouping and type unit headers This commit does not complete the type units feature - there are issues around fission support (skeletal type units, pubtypes/pubnames) and hashing of some types including those containing references to types in other type units. llvm-svn: 197073
* DwarfUnit: LLVM_OVERRIDE and constify some functionsDavid Blaikie2013-12-112-4/+4
| | | | llvm-svn: 197072
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