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* Fix a logic bug in inline expansion of memcpy / memset with an overlappingEvan Cheng2012-12-121-4/+5
| | | | | | | load / store pair. It's not legal to use a wider load than the size of the remaining bytes if it's the first pair of load / store. llvm-svn: 170018
* Sorry about the churn. One more change to getOptimalMemOpType() hook. Did IEvan Cheng2012-12-121-6/+7
| | | | | | | | | | | | mention the inline memcpy / memset expansion code is a mess? This patch split the ZeroOrLdSrc argument into two: IsMemset and ZeroMemset. The first indicates whether it is expanding a memset or a memcpy / memmove. The later is whether the memset is a memset of zero. It's totally possible (likely even) that targets may want to do different things for memcpy and memset of zero. llvm-svn: 169959
* - Rename isLegalMemOpType to isSafeMemOpType. "Legal" is a very overloade term.Evan Cheng2012-12-121-5/+5
| | | | | | | | | Also added more comments to explain why it is generally ok to return true. - Rename getOptimalMemOpType argument IsZeroVal to ZeroOrLdSrc. It's meant to be true for loaded source (memcpy) or zero constants (memset). The poor name choice is probably some kind of legacy issue. llvm-svn: 169954
* DAGCombine: clamp hi bit in APInt::getBitsSet to avoid assertionManman Ren2012-12-121-1/+2
| | | | | | rdar://12838504 llvm-svn: 169951
* Avoid using lossy load / stores for memcpy / memset expansion. e.g.Evan Cheng2012-12-121-15/+21
| | | | | | f64 load / store on non-SSE2 x86 targets. llvm-svn: 169944
* Replace TargetLowering::isIntImmLegal() withEvan Cheng2012-12-111-1/+5
| | | | | | | | | ScalarTargetTransformInfo::getIntImmCost() instead. "Legal" is a poorly defined term for something like integer immediate materialization. It is always possible to materialize an integer immediate. Whether to use it for memcpy expansion is more a "cost" conceern. llvm-svn: 169929
* Update some comments.Eric Christopher2012-12-112-6/+6
| | | | llvm-svn: 169907
* Add comment for load foldingJoel Jones2012-12-111-0/+5
| | | | llvm-svn: 169880
* Revert EVT->MVT changes, r169836-169851, due to buildbot failures.Patrik Hagglund2012-12-1116-126/+116
| | | | llvm-svn: 169854
* Change RegVT in BitTestBlock and RegsForValue, to contain MVTs,Patrik Hagglund2012-12-112-13/+12
| | | | | | instead of EVTs. llvm-svn: 169851
* Change TargetLowering::getTypeForExtArgOrReturn to take and returnPatrik Hagglund2012-12-111-1/+2
| | | | | | | | MVTs, instead of EVTs. Accordingly, add bitsLT (and similar) to MVT. llvm-svn: 169850
* Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,Patrik Hagglund2012-12-112-14/+19
| | | | | | from EVT. llvm-svn: 169849
* Change TargetLowering::RegisterTypeForVT to contain MVTs, instead ofPatrik Hagglund2012-12-115-18/+18
| | | | | | EVTs. llvm-svn: 169848
* Change TargetLowering::TransformToType to contain MVTs, instead ofPatrik Hagglund2012-12-111-4/+4
| | | | | | EVTs. llvm-svn: 169847
* Change TargetLowering::findRepresentativeClass to take an MVT, insteadPatrik Hagglund2012-12-111-2/+2
| | | | | | of EVT. llvm-svn: 169845
* Change TargetLowering::getTypeToPromoteTo to take and return MVTs,Patrik Hagglund2012-12-112-8/+8
| | | | | | instead of EVTs. llvm-svn: 169844
* Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.Patrik Hagglund2012-12-112-12/+15
| | | | llvm-svn: 169843
* Change TargetLowering::getCondCodeAction to take an MVT, instead ofPatrik Hagglund2012-12-112-4/+4
| | | | | | EVT. llvm-svn: 169842
* Change TargetLowering::getTruncStoreAction to take MVTs, instead of EVTs.Patrik Hagglund2012-12-112-3/+4
| | | | llvm-svn: 169841
* Change TargetLowering::getLoadExtAction to take an MVT, instead of EVT.Patrik Hagglund2012-12-111-1/+1
| | | | llvm-svn: 169840
* Change TargetLowering::setTypeAction to take an MVT, instead fo EVT.Patrik Hagglund2012-12-111-1/+1
| | | | llvm-svn: 169839
* Change TargetLowering::getRepRegClassFor to take an MVT, instead ofPatrik Hagglund2012-12-114-12/+12
| | | | | | | | EVT. Accordingly, change RegDefIter to contain MVTs instead of EVTs. llvm-svn: 169838
* Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.Patrik Hagglund2012-12-116-27/+28
| | | | | | | | | Accordingly, add helper funtions getSimpleValueType (in parallel to getValueType) in SDValue, SDNode, and TargetLowering. This is the first, in a series of patches. llvm-svn: 169837
* Fix a miscompile in the DAG combiner. Previously, we would incorrectlyChandler Carruth2012-12-111-2/+6
| | | | | | | | | | | | | | | | | | | | | | | try to reduce the width of this load, and would end up transforming: (truncate (lshr (sextload i48 <ptr> as i64), 32) to i32) to (truncate (zextload i32 <ptr+4> as i64) to i32) We lost the sext attached to the load while building the narrower i32 load, and replaced it with a zext because lshr always zext's the results. Instead, bail out of this combine when there is a conflict between a sextload and a zext narrowing. The rest of the DAG combiner still optimize the code down to the proper single instruction: movswl 6(...),%eax Which is exactly what we wanted. Previously we read past the end *and* missed the sign extension: movl 6(...), %eax llvm-svn: 169802
* Fall back to the selection dag isel to select tail calls.Chad Rosier2012-12-112-10/+7
| | | | | | | | | | | | | | | | | | | This shouldn't affect codegen for -O0 compiles as tail call markers are not emitted in unoptimized compiles. Testing with the external/internal nightly test suite reveals no change in compile time performance. Testing with -O1, -O2 and -O3 with fast-isel enabled did not cause any compile-time or execution-time failures. All tests were performed on my x86 machine. I'll monitor our arm testers to ensure no regressions occur there. In an upcoming clang patch I will be marking the objc_autoreleaseReturnValue and objc_retainAutoreleaseReturnValue as tail calls unconditionally. While it's theoretically true that this is just an optimization, it's an optimization that we very much want to happen even at -O0, or else ARC applications become substantially harder to debug. Part of rdar://12553082 llvm-svn: 169796
* Refactor out the abbreviation handling into a separate class thatEric Christopher2012-12-102-24/+57
| | | | | | | | | | | | controls each of the abbreviation sets (only a single one at the moment) and computes offsets separately as well for each set of DIEs. No real function change, ordering of abbreviations for the skeleton CU changed but only because we're computing in a separate order. Fix the testcase not to care. llvm-svn: 169793
* Some enhancements for memcpy / memset inline expansion.Evan Cheng2012-12-101-18/+64
| | | | | | | | | | | | | | | | | | | | | 1. Teach it to use overlapping unaligned load / store to copy / set the trailing bytes. e.g. On 86, use two pairs of movups / movaps for 17 - 31 byte copies. 2. Use f64 for memcpy / memset on targets where i64 is not legal but f64 is. e.g. x86 and ARM. 3. When memcpy from a constant string, do *not* replace the load with a constant if it's not possible to materialize an integer immediate with a single instruction (required a new target hook: TLI.isIntImmLegal()). 4. Use unaligned load / stores more aggressively if target hooks indicates they are "fast". 5. Update ARM target hooks to use unaligned load / stores. e.g. vld1.8 / vst1.8. Also increase the threshold to something reasonable (8 for memset, 4 pairs for memcpy). This significantly improves Dhrystone, up to 50% on ARM iOS devices. rdar://12760078 llvm-svn: 169791
* Defer call to InitSections until after MCContext has been initialized. IfLang Hames2012-12-102-1/+3
| | | | | | | | InitSections is called before the MCContext is initialized it could cause duplicate temporary symbols to be emitted later (after context initialization resets the temporary label counter). llvm-svn: 169785
* Rearrange vars and make comments more obvious.Eric Christopher2012-12-101-3/+5
| | | | llvm-svn: 169780
* Remove blank line at top of file.Eric Christopher2012-12-101-1/+0
| | | | llvm-svn: 169779
* Fix a coding style nit.Eric Christopher2012-12-101-2/+2
| | | | llvm-svn: 169776
* LegalizeDAG: Allow type promotion of scalar loadsTom Stellard2012-12-101-3/+2
| | | | llvm-svn: 169773
* LegalizeDAG: Allow type promotion for scalar storesTom Stellard2012-12-101-3/+4
| | | | llvm-svn: 169772
* Use the somewhat semantic term "split dwarf" it more matches what'sEric Christopher2012-12-102-30/+32
| | | | | | going on and makes a lot of the terminology in comments make more sense. llvm-svn: 169758
* Delete the FissionCU.Eric Christopher2012-12-101-0/+3
| | | | llvm-svn: 169757
* Reorder fission variables.Eric Christopher2012-12-102-5/+11
| | | | llvm-svn: 169756
* Use GetUnderlyingObjects in mischedHal Finkel2012-12-101-92/+143
| | | | | | | | | | | | | | | | misched used GetUnderlyingObject in order to break false load/store dependencies, and the -enable-aa-sched-mi feature similarly relied on GetUnderlyingObject in order to ensure it is safe to use the aliasing analysis. Unfortunately, GetUnderlyingObject does not recurse through phi nodes, and so (especially due to LSR) all of these mechanisms failed for induction-variable-dependent loads and stores inside loops. This change replaces uses of GetUnderlyingObject with GetUnderlyingObjects (which will recurse through phi and select instructions) in misched. Andy reviewed, tested and simplified this patch; Thanks! llvm-svn: 169744
* Teach DAG combine to handle vector add/sub with vectors of all 0s.Craig Topper2012-12-101-0/+10
| | | | llvm-svn: 169727
* Remove extra blank line.Craig Topper2012-12-091-1/+0
| | | | llvm-svn: 169692
* Teach DAG combine to handle vector logical operations with vectors of all 1s ↵Craig Topper2012-12-081-0/+30
| | | | | | or all 0s. These cases can show up when vectors are split for legalizing. Fix some tests that were dependent on these cases not being combined. llvm-svn: 169684
* Add higher-level API for dealing with bundled MachineInstrs.Jakob Stoklund Olesen2012-12-071-0/+32
| | | | | | | | | | | | | | | | | | | | | This is still a work in progress. The purpose is to make bundling and unbundling operations explicit, and to catch errors where bundles are broken or created inadvertently. The old IsInsideBundle flag is replaced by two MI flags: BundledPred which has the same meaning as IsInsideBundle, and BundledSucc which is set on instructions that are bundled with a successor. Having two flags provdes redundancy to detect when a bundle is inadvertently torn by a splice() or insert(), and it makes it possible to write bundle iterators that don't need to peek at adjacent instructions. The new flags can't be manipulated directly (once setIsInsideBundle is gone). Instead there are MI functions to make and break bundle bonds. The setIsInsideBundle function will be removed in a future commit. It should be replaced by bundleWithPred(). llvm-svn: 169583
* fixed valgrind issues of prior commit, this change applies r169456 changes ↵Pedro Artigas2012-12-061-1/+6
| | | | | | | | | | | | back to the tree with fixes. on darwin no valgrind issues exist in the tests that used to fail. original change description: change MCContext to work on the doInitialization/doFinalization model reviewed by Evan Cheng <evan.cheng@apple.com> llvm-svn: 169553
* Replace r169459 with something safer. Rather than having computeMaskedBits toEvan Cheng2012-12-063-28/+10
| | | | | | | | | | understand target implementation of any_extend / extload, just generate zero_extend in place of any_extend for liveouts when the target knows the zero_extend will be implicit (e.g. ARM ldrb / ldrh) or folded (e.g. x86 movz). rdar://12771555 llvm-svn: 169536
* Fix a bug in the code that merges consecutive stores. Previously we did notNadav Rotem2012-12-061-10/+14
| | | | | | | check if loads that happen in between stores alias with the first store in the chain, only with the second store onwards. llvm-svn: 169516
* s/getLowerBoundDefault/getDefaultLowerBound/ for consistency. Also put the ↵Bill Wendling2012-12-062-5/+7
| | | | | | more natural check first in the if-then statement. llvm-svn: 169486
* Handle non-default array bounds.Bill Wendling2012-12-062-14/+59
| | | | | | | | | Some languages, e.g. Ada and Pascal, allow you to specify that the array bounds are different from the default (1 in these cases). If we have a lower bound that's non-default, then we emit the lower bound. We also calculate the correct upper bound in those cases. llvm-svn: 169484
* Revert r169456, "change MCContext to work on the ↵NAKAMURA Takumi2012-12-061-5/+0
| | | | | | | | doInitialization/doFinalization model" It broke many builders. llvm-svn: 169462
* Let targets provide hooks that compute known zero and ones for any_extendEvan Cheng2012-12-062-7/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and extload's. If they are implemented as zero-extend, or implicitly zero-extend, then this can enable more demanded bits optimizations. e.g. define void @foo(i16* %ptr, i32 %a) nounwind { entry: %tmp1 = icmp ult i32 %a, 100 br i1 %tmp1, label %bb1, label %bb2 bb1: %tmp2 = load i16* %ptr, align 2 br label %bb2 bb2: %tmp3 = phi i16 [ 0, %entry ], [ %tmp2, %bb1 ] %cmp = icmp ult i16 %tmp3, 24 br i1 %cmp, label %bb3, label %exit bb3: call void @bar() nounwind br label %exit exit: ret void } This compiles to the followings before: push {lr} mov r2, #0 cmp r1, #99 bhi LBB0_2 @ BB#1: @ %bb1 ldrh r2, [r0] LBB0_2: @ %bb2 uxth r0, r2 cmp r0, #23 bhi LBB0_4 @ BB#3: @ %bb3 bl _bar LBB0_4: @ %exit pop {lr} bx lr The uxth is not needed since ldrh implicitly zero-extend the high bits. With this change it's eliminated. rdar://12771555 llvm-svn: 169459
* change MCContext to work on the doInitialization/doFinalization modelPedro Artigas2012-12-061-0/+5
| | | | | | reviewed by Evan Cheng <evan.cheng@apple.com> llvm-svn: 169456
* RegPressureTracker::dump(): Remove unnecessary argument.Andrew Trick2012-12-051-1/+1
| | | | llvm-svn: 169443
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