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* The "excess register pressure" returned by HighRegPressure() is not accurate ↵Evan Cheng2010-07-261-41/+20
| | | | | | enough to factor into scheduling priority. Eliminate it and add early exits to speed up scheduling. llvm-svn: 109449
* Handle Values with no value in getCopyFromRegs.Dan Gohman2010-07-261-0/+4
| | | | llvm-svn: 109415
* A block dominates itself, by definition.Dan Gohman2010-07-261-1/+1
| | | | llvm-svn: 109402
* Pacify gcc-4.5 which wrongly thinks that RExcess (passed as the Excess ↵Duncan Sands2010-07-261-1/+2
| | | | | | | | parameter) may be used uninitialized in the callers of HighRegPressure. llvm-svn: 109393
* Factored out a bit of common code to mark VNInfos for deletion.Lang Hames2010-07-261-40/+22
| | | | llvm-svn: 109388
* Add comments.Evan Cheng2010-07-251-4/+16
| | | | llvm-svn: 109383
* Fix crashes when scheduling a CopyToReg node -- getMachineOpcode asserts onBob Wilson2010-07-251-2/+2
| | | | | | those. Radar 8231572. llvm-svn: 109367
* Add hook to insert late LLVM=>LLVM passes just before iselAnton Korobeynikov2010-07-241-0/+2
| | | | llvm-svn: 109354
* Change ScheduleDAGInstrs::Defs and ::Uses to be variable-size vectorsBob Wilson2010-07-242-3/+4
| | | | | | | instead of fixed size arrays, so that increasing FirstVirtualRegister to 16K won't cause a compile time performance regression. llvm-svn: 109330
* Use current working directory when Dirname is empty. This only happens when ↵Devang Patel2010-07-241-0/+5
| | | | | | absolute source file path is used on compiler command line. llvm-svn: 109302
* Add an ILP scheduler. This is a register pressure aware scheduler that'sEvan Cheng2010-07-242-12/+76
| | | | | | | | | | | | appropriate for targets without detailed instruction iterineries. The scheduler schedules for increased instruction level parallelism in low register pressure situation; it schedules to reduce register pressure when the register pressure becomes high. On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2 by 16%. llvm-svn: 109300
* Remove too-strict assertion. We may want the vreg copy of the physical registerJim Grosbach2010-07-231-1/+0
| | | | | | | to be of a different register class. For example, in Thumb1 if the live-in is a high register, we want the vreg to be a low register. rdar://8224931 llvm-svn: 109291
* Revert r109262.Devang Patel2010-07-231-5/+0
| | | | llvm-svn: 109285
* - Allow target to specify when is register pressure "too high". In most cases,Evan Cheng2010-07-231-56/+124
| | | | | | | | | | | | | it's too late to start backing off aggressive latency scheduling when most of the registers are in use so the threshold should be a bit tighter. - Correctly handle live out's and extract_subreg etc. - Enable register pressure aware scheduling by default for hybrid scheduler. For ARM, this is almost always a win on # of instructions. It's runtime neutral for most of the tests. But for some kernels with high register pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by 54 and sped up by 20%. llvm-svn: 109279
* Use the proper type for shift counts. This fixes a bootstrap error.Dan Gohman2010-07-231-1/+4
| | | | llvm-svn: 109265
* IF directory name is empty then try to extract one using absolute file name.Devang Patel2010-07-231-0/+5
| | | | llvm-svn: 109262
* DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bitsDan Gohman2010-07-231-1/+21
| | | | | | are not demanded. This often allows the anyext to be folded away. llvm-svn: 109242
* Make SDNode::dump() print a newline at the end.Dan Gohman2010-07-231-0/+1
| | | | llvm-svn: 109234
* 80-col.Eric Christopher2010-07-231-8/+12
| | | | llvm-svn: 109205
* remove the JIT "NeedsExactSize" feature and supporting logic.Chris Lattner2010-07-221-13/+0
| | | | llvm-svn: 109167
* keep in 80 colsGabor Greif2010-07-221-2/+4
| | | | llvm-svn: 109122
* mass elimination of reliance on automatic iterator dereferencingGabor Greif2010-07-223-7/+7
| | | | llvm-svn: 109103
* undo 80 column trespassing I causedGabor Greif2010-07-222-3/+5
| | | | llvm-svn: 109092
* Re-apply r109079 with fix.Evan Cheng2010-07-221-28/+26
| | | | llvm-svn: 109083
* Revert r109079, which broke a lot of CodeGen tests.Owen Anderson2010-07-221-25/+27
| | | | llvm-svn: 109082
* Initial modifications to MCAssembler and TargetMachine for the MCJIT.Reid Kleckner2010-07-221-0/+18
| | | | | | Patch by Olivier Meurant! llvm-svn: 109080
* Initialize RegLimit only when register pressure is being tracked.Evan Cheng2010-07-221-27/+25
| | | | llvm-svn: 109079
* More register pressure aware scheduling work.Evan Cheng2010-07-211-81/+84
| | | | llvm-svn: 109064
* For ARM/Darwin, add a dwarf entry indicating whether a function is arm or thumbJim Grosbach2010-07-211-0/+4
| | | | | | rdar://8202967 llvm-svn: 109057
* Fix batch of converting RegisterPass<> to INTIALIZE_PASS().Owen Anderson2010-07-2123-43/+45
| | | | llvm-svn: 109045
* 80 column and trailing whitespace cleanupJim Grosbach2010-07-211-171/+173
| | | | llvm-svn: 109037
* Disallow null as a named metadata operand.Dan Gohman2010-07-211-2/+2
| | | | | | | | | | | Make MDNode::destroy private. Fix the one thing that used MDNode::destroy, outside of MDNode itself. One should never delete or destroy an MDNode explicitly. MDNodes implicitly go away when there are no references to them (implementation details aside). llvm-svn: 109028
* Changed OStream templates to functions on raw_ostream, removed the unused ↵Lang Hames2010-07-212-51/+25
| | | | | | "renderWarnings" function. llvm-svn: 109003
* Teach bottom up pre-ra scheduler to track register pressure. Work in progress.Evan Cheng2010-07-212-22/+242
| | | | llvm-svn: 108991
* Change the createSpiller interface to take a MachineFunctionPass argument.Jakob Stoklund Olesen2010-07-206-60/+64
| | | | | | | | The spillers can pluck the analyses they need from the pass reference. Switch some never-null pointers to references. llvm-svn: 108969
* Implement loop splitting analysis.Jakob Stoklund Olesen2010-07-202-19/+183
| | | | | | | Determine which loop exit blocks need a 'pre-exit' block inserted. Recognize when this would be impossible. llvm-svn: 108941
* Fix test for switch statements and increaseDale Johannesen2010-07-201-2/+3
| | | | | | threshold a bit per experimentation. llvm-svn: 108935
* Appease the colonials.Jakob Stoklund Olesen2010-07-202-4/+4
| | | | llvm-svn: 108845
* Beginning SplitKit - utility classes for live range splitting.Jakob Stoklund Olesen2010-07-204-1/+261
| | | | | | | | | This is a work in progress. So far we have some basic loop analysis to help determine where it is useful to split a live range around a loop. The actual loop splitting code from Splitter.cpp is also going to move in here. llvm-svn: 108842
* Updated css classes for the pressure table legend.Lang Hames2010-07-201-3/+3
| | | | llvm-svn: 108839
* Oops - I tables render poorly in Chrome without this explicit height ↵Lang Hames2010-07-201-1/+1
| | | | | | specification. llvm-svn: 108824
* Use run-length encoding to represent identical adjacent cells in the pressureLang Hames2010-07-202-34/+104
| | | | | | | | and interval table. Reduces output HTML file sizes by ~80% in my test cases. Also fix access of private member type by << operator. llvm-svn: 108823
* Added support for turning HTML indentation on and off (indentation off by ↵Lang Hames2010-07-202-86/+123
| | | | | | | | default). Reduces output file size ~20% on my test cases. llvm-svn: 108822
* Switched to rendering after allocation (but before rewriting) in PBQP.Lang Hames2010-07-203-38/+77
| | | | | | | Updated renderer to use allocation information from VirtRegMap (if available) to render spilled intervals differently. llvm-svn: 108815
* Don't hoist things out of a large switch inside aDale Johannesen2010-07-201-2/+6
| | | | | | | | | | loop, for the reasons in the comments. This is a major win on 253.perlbmk on ARM Darwin. I expect it to be a good heuristic in general, but it's possible some things will regress; I'll be watching. 7940152. llvm-svn: 108792
* Correct line info for declarations/definitions. Radar 8063111.Stuart Hastings2010-07-191-11/+4
| | | | llvm-svn: 108784
* Fix memory leak reported by valgrind. Devang Patel2010-07-191-23/+31
| | | | | | Do not visit operands of old instruction. Visit all operands of new instruction. llvm-svn: 108767
* After a custom inserter, in a block which has constant instructions,Dan Gohman2010-07-191-0/+1
| | | | | | | update the current basic block in addition to the current insert position, so that they remain consistent. This fixes rdar://8204072. llvm-svn: 108765
* ARM has to provide its own TargetLowering::findRepresentativeClass because ↵Evan Cheng2010-07-191-6/+7
| | | | | | its scalar floating point registers alias its vector registers. llvm-svn: 108761
* Teach computeRegisterProperties() to compute "representative" register class ↵Evan Cheng2010-07-191-0/+52
| | | | | | | | for legal value types. A "representative" register class is the largest legal super-reg register class for a value type. e.g. On i386, GR32 is the rep register class for i8 / i16 / i32; on x86_64 it would be GR64. This property will be used by the register pressure tracking instruction scheduler. llvm-svn: 108735
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