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* Yet another nasty spiller bug.Evan Cheng2008-05-071-14/+19
| | | | | | | | | | %ecx = op store %cl<kill>, (addr) (addr) = op %al It's not safe to unfold the last operand and eliminate store even though %cl is marked kill. It's a sub-register use which means one of its super-register(s) may be used below. llvm-svn: 50794
* Fix a bug in the ComputeMaskedBits logic for multiply.Dan Gohman2008-05-071-2/+2
| | | | llvm-svn: 50793
* Make StripPointerCast a common function (should we mak it method of Value ↵Anton Korobeynikov2008-05-063-8/+6
| | | | | | instead?) llvm-svn: 50775
* Make several variable declarations static.Dan Gohman2008-05-064-9/+10
| | | | llvm-svn: 50696
* Remove uses of llvm/System/IncludeFile.h that are no longer needed.Dan Gohman2008-05-061-3/+0
| | | | llvm-svn: 50695
* Instead of enumerating each opcode that isn't handled thatDan Gohman2008-05-061-11/+1
| | | | | | | ComputeMaskedBits handles, just use a 'default:'. This avoids TargetLowering's list getting out of date with SelectionDAG's. llvm-svn: 50693
* Correct the value of LowBits in srem and urem handling inDan Gohman2008-05-061-3/+3
| | | | | | ComputeMaskedBits. llvm-svn: 50692
* Fix a broken doxygen comment, and reword it for clarity.Dan Gohman2008-05-061-2/+3
| | | | llvm-svn: 50687
* Added addition atomic instrinsics and, or, xor, min, and max.Mon P Wang2008-05-055-37/+113
| | | | llvm-svn: 50663
* Fix a bug in the ELF writer that caused it to produce malformedDan Gohman2008-05-051-1/+1
| | | | | | ELF headers. The ELF writer still isn't generally usable though. llvm-svn: 50652
* Add AsmPrinter support for emitting a directive to declare thatDan Gohman2008-05-051-0/+7
| | | | | | | | | the code being generated does not require an executable stack. Also, add target-specific code to make use of this on Linux on x86. llvm-svn: 50634
* Fix a mistake in the computation of leading zeros for udiv.Dan Gohman2008-05-021-3/+5
| | | | llvm-svn: 50591
* Fix a typo in a comment.Dan Gohman2008-05-021-1/+1
| | | | llvm-svn: 50562
* Use push_back(...) instead of resize(1, ...), per review feedback.Dan Gohman2008-05-021-2/+2
| | | | llvm-svn: 50561
* Fix uninitialized uses of the FPC variable.Dan Gohman2008-05-011-2/+2
| | | | llvm-svn: 50558
* don't randomly miscompile seto/setuo just because we are in Chris Lattner2008-05-011-4/+4
| | | | | | | | | ffastmath mode. This fixes rdar://5902801, a miscompilation of gcc.dg/builtins-8.c. Bill, please pull this into Tak. llvm-svn: 50523
* Tail call optimization improvements:Arnold Schwaighofer2008-04-301-6/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. llvm-svn: 50477
* Add comments for previous patch as requested.Dale Johannesen2008-04-301-0/+6
| | | | llvm-svn: 50463
* Fix custom target lowering for zero/any/sign_extend: make sure thatScott Michel2008-04-301-5/+3
| | | | | | | DAG.UpdateNodeOperands() is called before (not after) the call to TLI.LowerOperation(). llvm-svn: 50461
* Make eh_frame objects by 8-byte aligned on 64-bitDale Johannesen2008-04-291-2/+4
| | | | | | targets. llvm-svn: 50451
* Use std::set instead of std::priority_queue for the RegReductionPriorityQueue. Roman Levenstein2008-04-291-44/+29
| | | | | | | | | | | | | | This removes the existing bottleneck related to the removal of elements from the middle of the queue. Also fixes a subtle bug in ScheduleDAGRRList::CapturePred: It was updating the state of the SUnit before removing it. As a result, the comparison operators were working incorrectly and this SUnit could not be removed from the queue properly. Reviewed by Evan and Dan. Approved by Dan. llvm-svn: 50412
* make the vector conversion magic handle multiple results.Chris Lattner2008-04-291-7/+16
| | | | | | | | | | | | | | | | | | | | | We now compile test2/test3 to: _test2: ## InlineAsm Start set %xmm0, %xmm1 ## InlineAsm End addps %xmm1, %xmm0 ret _test3: ## InlineAsm Start set %xmm0, %xmm1 ## InlineAsm End paddd %xmm1, %xmm0 ret as expected. llvm-svn: 50389
* add support for multiple return values in inline asm. This is a step Chris Lattner2008-04-291-12/+19
| | | | | | | | | | | | | | | | | | towards PR2094. It now compiles the attached .ll file to: _sad16_sse2: movslq %ecx, %rax ## InlineAsm Start %ecx %rdx %rax %rax %r8d %rdx %rsi ## InlineAsm End ## InlineAsm Start set %eax ## InlineAsm End ret which is pretty decent for a 3 output, 4 input asm. llvm-svn: 50386
* Another extract_subreg coalescing bug.Evan Cheng2008-04-291-1/+3
| | | | | | | | e.g. vr1024<2> extract_subreg vr1025, 2 If vr1024 do not have the same register class as vr1025, it's not safe to coalesce this away. For example, vr1024 might be a GPR32 while vr1025 might be a GPR64. llvm-svn: 50385
* Fix a bug in RegsForValue::getCopyToRegs() that causes cyclical scheduling ↵Evan Cheng2008-04-281-2/+12
| | | | | | | | | | | | | | units. If it's creating multiple CopyToReg nodes that are "flagged" together, it should not create a TokenFactor for it's chain outputs: c1, f1 = CopyToReg c2, f2 = CopyToReg c3 = TokenFactor c1, c2 ... = user c3, ..., f2 Now that the two CopyToReg's and the user are "flagged" together. They effectively forms a single scheduling unit. The TokenFactor is now both an operand and a successor of the Flagged nodes. llvm-svn: 50376
* Evan pointed out that folding sext to zext may not be correctDan Gohman2008-04-281-1/+2
| | | | | | if the zext is not legal. llvm-svn: 50368
* Delete an unused constructor.Dan Gohman2008-04-281-3/+0
| | | | llvm-svn: 50367
* Add a comment to CreateRegForValue that clarifies the handling ofDan Gohman2008-04-281-0/+4
| | | | | | aggregate types. llvm-svn: 50366
* Rewrite the comments for RegsForValue and its members, andDan Gohman2008-04-281-20/+30
| | | | | | reorder some of the members for clarity. llvm-svn: 50365
* Don't call size() on each iteration of the loop.Dan Gohman2008-04-281-2/+2
| | | | llvm-svn: 50361
* Fix the SVOffset values for loads and stores produced byDan Gohman2008-04-281-18/+20
| | | | | | | memcpy/memset expansion. It was a bug for the SVOffset value to be used in the actual address calculations. llvm-svn: 50359
* Teach InstCombine's ComputeMaskedBits what SelectionDAG'sDan Gohman2008-04-281-33/+124
| | | | | | | | | | | ComputeMaskedBits knows about cttz, ctlz, and ctpop. Teach SelectionDAG's ComputeMaskedBits what InstCombine's knows about SRem. And teach them both some things about high bits in Mul, UDiv, URem, and Sub. This allows instcombine and dagcombine to eliminate sign-extension operations in several new cases. llvm-svn: 50358
* Teach DAGCombine to convert (sext x) to (zext x) when theDan Gohman2008-04-281-0/+4
| | | | | | sign-bit of x is known to be zero. llvm-svn: 50357
* Another collection of random cleanups. No functionality change.Chris Lattner2008-04-281-64/+61
| | | | llvm-svn: 50341
* Remove the SmallVector ctor that converts from a SmallVectorImpl. ThisChris Lattner2008-04-281-48/+53
| | | | | | | | | | conversion open the door for many nasty implicit conversion issues, and can be easily solved by initializing with (V.begin(), V.end()) when needed. This patch includes many small cleanups for sdisel also. llvm-svn: 50340
* switch RegsForValue::Regs to be a SmallVector to avoidChris Lattner2008-04-281-4/+4
| | | | | | heap thrash on tiny (usually single-element) vectors. llvm-svn: 50335
* move static function out of anon namespace, no functionality change.Chris Lattner2008-04-271-25/+23
| | | | llvm-svn: 50330
* Another step to getting multiple result inline asm to work.Chris Lattner2008-04-271-6/+14
| | | | llvm-svn: 50329
* typoChris Lattner2008-04-271-1/+1
| | | | llvm-svn: 50316
* Implement a signficant optimization for inline asm:Chris Lattner2008-04-272-4/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | When choosing between constraints with multiple options, like "ir", test to see if we can use the 'i' constraint and go with that if possible. This produces more optimal ASM in all cases (sparing a register and an instruction to load it), and fixes inline asm like this: void test () { asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14)); } Previously we would dump "42" into a memory location (which is ok for the 'm' constraint) which would cause a problem because the 'c' modifier is not valid on memory operands. Isn't it great how inline asm turns 'missed optimization' into 'compile failed'?? Incidentally, this was the todo in PowerPC/2007-04-24-InlineAsm-I-Modifier.ll Please do NOT pull this into Tak. llvm-svn: 50315
* isa+cast -> dyn_castChris Lattner2008-04-271-4/+2
| | | | llvm-svn: 50314
* Move a bunch of inline asm code out of line.Chris Lattner2008-04-272-1/+98
| | | | llvm-svn: 50313
* A few inline asm cleanups:Chris Lattner2008-04-261-8/+6
| | | | | | | | | - Make targetlowering.h fit in 80 cols. - Make LowerAsmOperandForConstraint const. - Make lowerXConstraint -> LowerXConstraint - Make LowerXConstraint return a const char* instead of taking a string byref. llvm-svn: 50312
* Remove the code from CodeGenPrepare that moved getresult instructionsDan Gohman2008-04-251-83/+156
| | | | | | | | | | | to the block that defines their operands. This doesn't work in the case that the operand is an invoke, because invoke is a terminator and must be the last instruction in a block. Replace it with support in SelectionDAGISel for copying struct values into sequences of virtual registers. llvm-svn: 50279
* Pull the code to perform an INSERT_VECTOR_ELT in memory out into its own Nate Begeman2008-04-251-43/+68
| | | | | | | function, and then use it to fix a bug in SplitVectorOp that expected inserts to always have constant insertion indices. llvm-svn: 50273
* - Check if a register is livein before removing it. It may have already been ↵Evan Cheng2008-04-242-30/+35
| | | | | | | | removed. - Do not iterate over SmallPtrSet, the order of iteration is not deterministic. llvm-svn: 50209
* Use isa instead of dyn_cast.Dan Gohman2008-04-231-1/+1
| | | | llvm-svn: 50181
* Add support to codegen for getresult instructions with undef operands.Dan Gohman2008-04-231-2/+7
| | | | llvm-svn: 50180
* Unbreak JITAnton Korobeynikov2008-04-231-0/+4
| | | | llvm-svn: 50173
* Add facility for pre-RA passesAnton Korobeynikov2008-04-231-0/+4
| | | | llvm-svn: 50165
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