| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 108784
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Do not visit operands of old instruction. Visit all operands of new instruction.
llvm-svn: 108767
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update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.
llvm-svn: 108765
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its scalar floating point registers alias its vector registers.
llvm-svn: 108761
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for legal value types. A "representative" register class is the largest legal super-reg register class for a value type. e.g. On i386, GR32 is the rep register class for i8 / i16 / i32; on x86_64 it would be GR64.
This property will be used by the register pressure tracking instruction scheduler.
llvm-svn: 108735
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non-const.
llvm-svn: 108734
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Do not try to insert local variable info to a DIE used for function declaration.
llvm-svn: 108731
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llvm-svn: 108700
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pressure estimates and liveness alongside.
Still experimental.
llvm-svn: 108698
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llvm-svn: 108688
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- Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this.
llvm-svn: 108664
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llvm-svn: 108645
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llvm-svn: 108642
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conversions around sqrt instructions.
I am assured by people more knowledgeable than me that there are no rounding issues in eliminating this.
This fixed <rdar://problem/8197504>.
llvm-svn: 108639
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require
LoopSplitter be run prior to register allocation.
Entirely for testing purposes at the moment.
llvm-svn: 108634
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llvm-svn: 108628
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llvm-svn: 108620
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llvm-svn: 108618
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Still very much under development. Comments and fixes will be forthcoming.
(This commit includes some small tweaks to LiveIntervals & LoopInfo to support the splitter)
llvm-svn: 108615
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any command line paramater changed the register allocation produced by
PBQP.
Turns out variety is not the spice of life.
Fixed some comparators, added others. All good now.
llvm-svn: 108613
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information.
No functional change yet.
llvm-svn: 108583
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void foo() { __builtin_unreachable(); }
It will output the following on Darwin X86:
_func1:
Leh_func_begin0:
pushq %rbp
Ltmp0:
movq %rsp, %rbp
Ltmp1:
Leh_func_end0:
This prolog adds a new Call Frame Information (CFI) row to the FDE with an
address that is not within the address range of the code it describes -- part is
equal to the end of the function -- and therefore results in an invalid EH
frame. If we emit a nop in this situation, then the CFI row is now within the
address range.
llvm-svn: 108568
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thus is a much more meaningful name.
llvm-svn: 108563
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llvm-svn: 108556
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since it doesn't work for front-ends which don't emit column information
(which includes llvm-gcc in its present configuration), and doesn't
work for clang for K&R style variables where the variables are declared
in a different order from the parameter list.
Instead, make a separate pass through the instructions to collect the
llvm.dbg.declare instructions in order. This ensures that the debug
information for variables is emitted in this order.
llvm-svn: 108538
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llvm-svn: 108520
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TII::isMoveInstr is going tobe completely removed.
llvm-svn: 108507
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because it's more likely to keep debug line information in its original
order.
llvm-svn: 108496
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occasions, caused code to be generated in a different order.
All cases I've seen involved float softening in the type
legalizer, and this could be perhaps be fixed there, but
it's better not to generate things differently in the first
place. 7797940 (6/29/2010..7/15/2010).
llvm-svn: 108484
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llvm-svn: 108478
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the function. We'll just turn it into a "trap" instruction instead.
The problem with not handling this is that it might generate a prologue without
the equivalent epilogue to go with it:
$ cat t.ll
define void @foo() {
entry:
unreachable
}
$ llc -o - t.ll -relocation-model=pic -disable-fp-elim -unwind-tables
.section __TEXT,__text,regular,pure_instructions
.globl _foo
.align 4, 0x90
_foo: ## @foo
Leh_func_begin0:
## BB#0: ## %entry
pushq %rbp
Ltmp0:
movq %rsp, %rbp
Ltmp1:
Leh_func_end0:
...
The unwind tables then have bad data in them causing all sorts of problems.
Fixes <rdar://problem/8096481>.
llvm-svn: 108473
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-enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN.
llvm-svn: 108465
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to keep "Text" in sync with the "pure instructions" section attribute.
Lack of this attribute was preventing the assembler from emitting
multibyte noops instructions for templates (and inlines, and other
coalesced stuff) and was causing the assembler to mismatch .o files.
This fixes rdar://8018335
llvm-svn: 108461
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llvm-svn: 108452
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llvm-svn: 108450
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make sure to allocate enough space in the std::vector.
llvm-svn: 108449
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llvm-svn: 108448
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llvm-svn: 108441
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llvm-svn: 108440
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llvm-svn: 108438
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llvm-svn: 108419
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llvm-svn: 108413
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get *very* large, but we only need it to be the size of the number of pregs.
llvm-svn: 108412
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get *very* large, but we only need it to be the size of thenumber of pregs.
llvm-svn: 108411
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follow on to r103765
llvm-svn: 108390
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llvm-svn: 108381
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independent of the order that isel happens to visit the dbg_declare
intrinsics. This fixes a bug in which the formal arguments were
being printed in reverse order, now that fast isel is going bottom up.
llvm-svn: 108369
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llvm-svn: 108364
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it can look past points where a debugger might modify user variables.
llvm-svn: 108336
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IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620.
llvm-svn: 108304
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