summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
* In CheckForLiveRegDef use TRI->getOverlaps.Andrew Trick2010-12-231-6/+9
| | | | llvm-svn: 122473
* Fixes PR8823: add-with-overflow-128.llAndrew Trick2010-12-231-12/+33
| | | | | | | | In the bottom-up selection DAG scheduling, handle two-address instructions that read/write unspillable registers. Treat the entire chain of two-address nodes as a single live range. llvm-svn: 122472
* Change all self assignments X=X to (void)X, so that we can turn on aJeffrey Yasskin2010-12-234-9/+9
| | | | | | | new gcc warning that complains on self-assignments and self-initializations. llvm-svn: 122458
* DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is ↵Benjamin Kramer2010-12-221-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | illegal. The latter usually compiles into smaller code. example code: unsigned foo(unsigned x, unsigned y) { if (x != 0) y--; return y; } before: _foo: ## @foo cmpl $1, 4(%esp) ## encoding: [0x83,0x7c,0x24,0x04,0x01] sbbl %eax, %eax ## encoding: [0x19,0xc0] notl %eax ## encoding: [0xf7,0xd0] addl 8(%esp), %eax ## encoding: [0x03,0x44,0x24,0x08] ret ## encoding: [0xc3] after: _foo: ## @foo cmpl $1, 4(%esp) ## encoding: [0x83,0x7c,0x24,0x04,0x01] movl 8(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08] adcl $-1, %eax ## encoding: [0x83,0xd0,0xff] ret ## encoding: [0xc3] llvm-svn: 122455
* When RegAllocGreedy decides to spill the interferences of the current register,Jakob Stoklund Olesen2010-12-221-37/+89
| | | | | | pick the victim with the lowest total spill weight. llvm-svn: 122445
* Include a shadow of the original CFG edges in the edge bundle graph.Jakob Stoklund Olesen2010-12-221-0/+4
| | | | llvm-svn: 122444
* Fix a bug in ReduceLoadWidth that wasn't handling extendingChris Lattner2010-12-221-1/+4
| | | | | | | | | | | | | | | | | | | | | loads properly. We miscompiled the testcase into: _test: ## @test movl $128, (%rdi) movzbl 1(%rdi), %eax ret Now we get a proper: _test: ## @test movl $128, (%rdi) movsbl (%rdi), %eax movzbl %ah, %eax ret This fixes PR8757. llvm-svn: 122392
* more cleanups, move a check for "roundedness" earlier to rejectChris Lattner2010-12-221-14/+20
| | | | | | unhanded cases faster and simplify code. llvm-svn: 122391
* reduce indentation and improve comments, no functionality change.Chris Lattner2010-12-221-51/+53
| | | | llvm-svn: 122389
* In DelayForLiveRegsBottomUp, handle instructions that read and writeAndrew Trick2010-12-211-15/+4
| | | | | | | the same physical register. Simplifies the fix from the previous checkin r122211. llvm-svn: 122370
* whitespaceAndrew Trick2010-12-211-42/+42
| | | | llvm-svn: 122368
* Reapply 122353-122355 with fixes. 122354 was wrong;Dale Johannesen2010-12-211-4/+31
| | | | | | | | the shift type was needed one place, the shift count type another. The transform in 123555 had the same problem. llvm-svn: 122366
* Revert 122353-122355 for the moment, they broke stuff.Dale Johannesen2010-12-211-29/+3
| | | | llvm-svn: 122360
* Add a new transform to DAGCombiner.Dale Johannesen2010-12-211-0/+26
| | | | llvm-svn: 122355
* Get the type of a shift from the shift, not from its shiftDale Johannesen2010-12-211-1/+1
| | | | | | | | count operand. These should be the same but apparently are not always, and this is cleaner anyway. This improves the code in an existing test. llvm-svn: 122354
* Shift by the word size is invalid IR; don't create it.Dale Johannesen2010-12-211-2/+2
| | | | llvm-svn: 122353
* fix some typosChris Lattner2010-12-211-2/+1
| | | | llvm-svn: 122349
* Fix indentation, add comment.Stuart Hastings2010-12-211-4/+6
| | | | llvm-svn: 122345
* Missing logic for nested CALLSEQ_START/END.Stuart Hastings2010-12-211-2/+5
| | | | llvm-svn: 122342
* Incremental progress towards a new implementation of StrongPHIElimination. MostCameron Zwarich2010-12-211-3/+186
| | | | | | | | | | | | of the problems with my last attempt were in the updating of LiveIntervals rather than the coalescing itself. Therefore, I decided to get that right first by essentially reimplementing the existing PHIElimination using LiveIntervals. It works correctly, with only a few tests failing (which may not be legitimate failures) and no new verifier failures (at least as far as I can tell, I didn't count the number per file). llvm-svn: 122321
* rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner2010-12-2112-60/+60
| | | | | | | something that just glues two nodes together, even if it is sometimes used for flags. llvm-svn: 122310
* improve "cannot yet select" errors a trivial amount: nowChris Lattner2010-12-211-1/+1
| | | | | | they are just as useless, but at least a bit more gramatical llvm-svn: 122305
* Add EdgeBundles to SplitKit.Jakob Stoklund Olesen2010-12-212-1/+85
| | | | | | | | | Edge bundles is an annotation on the CFG that turns it into a bipartite directed graph where each basic block is connected to an outgoing and an ingoing bundle. These bundles are useful for identifying regions of the CFG for live range splitting. llvm-svn: 122301
* Use IntEqClasses to compute connected components of live intervals.Jakob Stoklund Olesen2010-12-211-49/+9
| | | | llvm-svn: 122296
* Cosmetic changes.Dale Johannesen2010-12-201-2/+2
| | | | llvm-svn: 122259
* MachineVerifier should count landing pad successors as basic blocks rather thanCameron Zwarich2010-12-201-7/+9
| | | | | | out-edges. Fixes PR8824. llvm-svn: 122228
* Teach MachineVerifier that early clobber defs begin at USE slots and other defsCameron Zwarich2010-12-201-5/+26
| | | | | | begin at DEF slots. Fixes the second half of PR8813. llvm-svn: 122225
* Add a missing check from r122218.Cameron Zwarich2010-12-201-1/+1
| | | | llvm-svn: 122224
* implement type legalization promotion support for SMULO and UMULO, giving Chris Lattner2010-12-201-5/+48
| | | | | | | | ARM (and other 32-bit-only) targets support for i8 and i16 overflow multiplies. The generated code isn't great, but this at least fixes CodeGen/Generic/overflow.ll when running on ARM hosts. llvm-svn: 122221
* Don't assume that an instruction ending a register's live range always readsCameron Zwarich2010-12-201-4/+18
| | | | | | the register; it may be a dead def instead. Fixes PR8820. llvm-svn: 122218
* Fix a bug in the scheduler's handling of "unspillable" vregs.Chris Lattner2010-12-201-1/+14
| | | | | | | | | | | | | | | | | | Imagine we see: EFLAGS = inst1 EFLAGS = inst2 FLAGS gpr = inst3 EFLAGS Previously, we would refuse to schedule inst2 because it clobbers the EFLAGS of the predecessor. However, it also uses the EFLAGS of the predecessor, so it is safe to emit. SDep edges ensure that the right order happens already anyway. This fixes 2 testsuite crashes with the X86 patch I'm going to commit next. llvm-svn: 122211
* the result of CheckForLiveRegDef is dead, remove it.Chris Lattner2010-12-201-12/+8
| | | | llvm-svn: 122209
* reduce indentation, no functionality change.Chris Lattner2010-12-202-25/+26
| | | | llvm-svn: 122208
* Ignore debug values when performing MachineVerifier liveness checks. FixesCameron Zwarich2010-12-201-1/+3
| | | | | | PR8822. llvm-svn: 122207
* Early clobber operands are allowed to be defined at use indices. This fixes oneCameron Zwarich2010-12-191-1/+1
| | | | | | half of PR8813. llvm-svn: 122205
* Fix PR8815 by checking for an explicit clobber def tied to a use operand inCameron Zwarich2010-12-191-0/+8
| | | | | | ConnectedVNInfoEqClasses::Classify(). llvm-svn: 122202
* Fix PR8811 by teaching MachineVerifier about optional defs.Cameron Zwarich2010-12-191-3/+3
| | | | llvm-svn: 122199
* StrongPHIElimination will never run before TwoAddressInstructionPass.Cameron Zwarich2010-12-191-1/+0
| | | | llvm-svn: 122197
* Add missing standard headers. Patch by Joerg Sonnenberger!Nick Lewycky2010-12-192-0/+2
| | | | llvm-svn: 122193
* teach MaskedValueIsZero how to analyze ADDE. This isChris Lattner2010-12-191-2/+13
| | | | | | | enough to teach it that ADDE(0,0) is known 0 except the low bit, for example. llvm-svn: 122191
* Remove some checks for StrongPHIElim. These checks make it impossible to use anCameron Zwarich2010-12-193-12/+6
| | | | | | | | | | | alternative register allocator that does not require LiveIntervals by specifying it on the command-line for a target that has StrongPHIElimination enabled by default. These checks are pretty meaningless anyways, since StrongPHIElimination and PHIElimination are never used at the same time. llvm-svn: 122176
* fix PR8642: if a critical edge has a PHI value that can trap,Chris Lattner2010-12-191-0/+41
| | | | | | | isel is *required* to split the edge. PHI values get evaluated on the edge, not in their predecessor block. llvm-svn: 122170
* Apparently, operandices is not a word.Jakob Stoklund Olesen2010-12-181-1/+1
| | | | llvm-svn: 122135
* Teach the inline spiller to attempt folding a load instruction into its singleJakob Stoklund Olesen2010-12-182-5/+27
| | | | | | | | | | | | | | | | | | use before rematerializing the load. This allows us to produce: addps LCPI0_1(%rip), %xmm2 Instead of: movaps LCPI0_1(%rip), %xmm3 addps %xmm3, %xmm2 Saving a register and an instruction. The standard spiller already knows how to do this. llvm-svn: 122133
* Tweak debug spew.Jakob Stoklund Olesen2010-12-181-2/+4
| | | | llvm-svn: 122132
* Check that the register is live-in to the loop header before inserting copies inJakob Stoklund Olesen2010-12-181-5/+7
| | | | | | | | | the loop predecessors. The register can be live-out from a predecessor without being live-in to the loop header if there is a critical edge from the predecessor. llvm-svn: 122123
* Fix GCC warning:Nick Lewycky2010-12-181-0/+1
| | | | | | lib/CodeGen/RegAllocGreedy.cpp:311: error: unused variable 'PhysReg' [-Wunused-variable] llvm-svn: 122122
* Pass a Banner argument to the machine code verifier both fromJakob Stoklund Olesen2010-12-185-15/+22
| | | | | | | | createMachineVerifierPass and MachineFunction::verify. The banner is printed before the machine code dump, just like the printer pass. llvm-svn: 122113
* Avoid dereferencing end() in collectInterferingVRegs() when there is noJakob Stoklund Olesen2010-12-171-1/+1
| | | | | | interference. llvm-svn: 122108
* Make the -verify-regalloc command line option available to base classes asJakob Stoklund Olesen2010-12-173-4/+15
| | | | | | | | RegAllocBase::VerifyEnabled. Run the machine code verifier in a few interesting places during RegAllocGreedy. llvm-svn: 122107
OpenPOWER on IntegriCloud