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* CodeGen: Push the ModuleSlotTracker through MetadataDuncan P. N. Exon Smith2015-06-261-4/+4
| | | | | | | | For another 1% speedup on the testcase in PR23865, push the `ModuleSlotTracker` through to metadata-related printing in `MachineBasicBlock::print()`. llvm-svn: 240848
* CodeGen: Push the ModuleSlotTracker through MachineOperandsDuncan P. N. Exon Smith2015-06-262-34/+46
| | | | | | | | | Push `ModuleSlotTracker` through `MachineOperand`s, dropping the time for `llc -print-machineinstrs` on the testcase in PR23865 from ~13 seconds to ~9 seconds. Now `SlotTracker::processFunctionMetadata()` accounts for only 8% of the runtime, which seems reasonable. llvm-svn: 240845
* CodeGen: Use a single SlotTracker in MachineFunction::print()Duncan P. N. Exon Smith2015-06-262-2/+20
| | | | | | | | | | | | | Expose enough of the IR-level `SlotTracker` so that `MachineFunction::print()` can use a single one for printing `BasicBlock`s. Next step would be to lift this through a few more APIs so that we can make other print methods faster. Fixes PR23865, changing the runtime of `llc -print-machineinstrs` from many minutes (killed after 3 minutes, but it wasn't very close) to 13 seconds for a 502185 line dump. llvm-svn: 240842
* Debug Info: Clarify the documentation for bitfields emission.Adrian Prantl2015-06-261-2/+7
| | | | llvm-svn: 240835
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-263-34/+30
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240822
* Wrap assert loops in #ifndef NDEBUGPete Cooper2015-06-261-0/+2
| | | | | | | The body of the loops here only contained asserts. This triggered an unused variable warning on release builds and -Werror on the bots. llvm-svn: 240819
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-263-21/+18
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240817
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-264-18/+18
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240815
* Show invariant loads in MMO dumpingMatt Arsenault2015-06-261-0/+3
| | | | llvm-svn: 240813
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-261-14/+12
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240809
* Fix unused variable from r240792.Alex Lorenz2015-06-261-0/+1
| | | | | | | The variable 'I' wasn't used when assertions were disabled. This commit ensures that 'I' is used outside of an assert. llvm-svn: 240797
* [DAGCombine] Fix demanded bits computation for exact shifts.Benjamin Kramer2015-06-261-1/+13
| | | | | | Fixes a miscompilation of MultiSource/Benchmarks/MallocBench/gs llvm-svn: 240796
* MIR Serialization: Serialize machine basic block operands.Alex Lorenz2015-06-266-21/+138
| | | | | | | | | | | | | | | | | | | | | | | | | This commit serializes machine basic block operands. The machine basic block operands use the following syntax: %bb.<id>[.<name>] This commit also modifies the YAML representation for the machine basic blocks - a new, required field 'id' is added to the MBB YAML mapping. The id is used to resolve the MBB references to the actual MBBs. And while the name of the MBB can be included in a MBB reference, this name isn't used to resolve MBB references - as it's possible that multiple MBBs will reference the same BB and thus they will have the same name. If the name is specified, the parser will verify that it is equal to the name of the MBB with the specified id. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10608 llvm-svn: 240792
* [DAGCombiner] Preserve the exact bit when simplifying SRA to SRL.Benjamin Kramer2015-06-261-4/+7
| | | | | | Allows more aggressive folding of ashr/shl pairs. llvm-svn: 240788
* [DAGCombine] fold (X >>?,exact C1) << C2 --> X << (C2-C1)Benjamin Kramer2015-06-261-0/+16
| | | | | | | Instcombine also does this but many opportunities only become visible after GEPs are lowered. llvm-svn: 240787
* [InterleavedAccess] Fix failures "undefined type 'llvm::raw_ostream'" on ↵Hao Liu2015-06-261-0/+1
| | | | | | windows. llvm-svn: 240760
* [InterleavedAccess] Add a pass InterleavedAccess to identify interleaved ↵Hao Liu2015-06-262-0/+286
| | | | | | | | | | | | | | | | | | | memory accesses and transform into target specific intrinsics. E.g. An interleaved load (Factor = 2): %wide.vec = load <8 x i32>, <8 x i32>* %ptr %v0 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <0, 2, 4, 6> %v1 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <1, 3, 5, 7> It can be transformed into a ld2 intrinsic in AArch64 backend or a vld2 intrinsic in ARM backend. E.g. An interleaved store (Factor = 3): %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11> store <12 x i32> %i.vec, <12 x i32>* %ptr It can be transformed into a st3 intrinsic in AArch64 backend or a vst3 intrinsic in ARM backend. Differential Revision: http://reviews.llvm.org/D10533 llvm-svn: 240751
* AsmPrinter: Use an intrusively linked list for DIE::ChildrenDuncan P. N. Exon Smith2015-06-258-53/+47
| | | | | | | | | | | | | | Replace the `std::vector<>` for `DIE::Children` with an intrusively linked list. This is a strict memory improvement: it requires no auxiliary storage, and reduces `sizeof(DIE)` by one pointer. It also factors out the DIE-related malloc traffic. This drops llc memory usage from 735 MB down to 718 MB, or ~2.3%. (I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`; see r236629 for details.) llvm-svn: 240736
* AsmPrinter: Convert DIE::Values to a linked listDuncan P. N. Exon Smith2015-06-257-59/+66
| | | | | | | | | | | | | | | | Change `DIE::Values` to a singly linked list, where each node is allocated on a `BumpPtrAllocator`. In order to support `push_back()`, the list is circular, and points at the tail element instead of the head. I abstracted the core list logic out to `IntrusiveBackList` so that it can be reused for `DIE::Children`, which also cares about `push_back()`. This drops llc memory usage from 799 MB down to 735 MB, about 8%. (I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`; see r236629 for details.) llvm-svn: 240733
* DAGCombiner: Use pop_back_val()Matt Arsenault2015-06-251-2/+1
| | | | llvm-svn: 240709
* fix typos; NFCSanjay Patel2015-06-251-4/+4
| | | | llvm-svn: 240699
* DAGCombiner: Remove redundant checkMatt Arsenault2015-06-251-1/+1
| | | | | | | MemIntrinsicSDNode is already a subclass of MemSDNode, so the MemSDNode check is sufficient. llvm-svn: 240672
* [AsmPrinter] Fix crash in handleIndirectSymViaGOTPCRelBruno Cardoso Lopes2015-06-251-2/+9
| | | | | | | | | | | Check for symbols in MCValue before using them. Bail out early in case they are null. This fixes PR23779. Differential Revision: http://reviews.llvm.org/D10712 rdar://problem/21532830 llvm-svn: 240649
* [If Converter] Convert recursion to iteration.Akira Hatanaka2015-06-241-126/+155
| | | | | | | | | | | | | | | | | | | | | | | | | | | This commit makes changes to IfConverter::AnalyzeBlock to use iteration instead of recursion. Previously, this function would get called recursively a large number of times and eventually segfault when a function with the following CFG was compiled: BB0: if (condition0) goto BB1 goto BB2 BB1: goto BB2 BB2: if (condition1) goto BB3 goto BB4 BB3: ... (repeat until BB7488) rdar://problem/21386145 Differential Revision: http://reviews.llvm.org/D10587 llvm-svn: 240589
* MIR Serialization: Serialize simple MachineRegisterInfo attributes.Alex Lorenz2015-06-242-0/+29
| | | | | | | | | | | | | This commit serializes the 3 scalar boolean attributes from the MachineRegisterInfo class: IsSSA, TracksRegLiveness, and TracksSubRegLiveness. These attributes are serialized as part of the machine function YAML mapping. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10618 llvm-svn: 240579
* AsmPrinter: Cleanup DIEValue::EmitValue() API, NFCDuncan P. N. Exon Smith2015-06-243-14/+13
| | | | | | | | | Stop taking a `dwarf::Form` in `DIEValue::EmitValue()` and `DIEValue::SizeOf()`, since they're always passed `DIEValue::getForm()` anyway. This is just left over from when `DIEValue` didn't know its own form. llvm-svn: 240566
* MIR Serialization: Serialize the null register operands.Alex Lorenz2015-06-244-4/+16
| | | | | | | | | | | | This commit serializes the null register machine operands. It uses the '_' keyword to represent them, but the parser also allows the '%noreg' named register syntax. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10580 llvm-svn: 240558
* Eliminate additional redundant copies of Triple objects. NFC.Daniel Sanders2015-06-242-2/+2
| | | | | | | | Subscribers: rafael, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10654 llvm-svn: 240540
* Fix instruction scheduling live register trackingPawel Bylica2015-06-241-8/+17
| | | | | | | | | | | | | | | | | | | Summary: This patch fixes PR23405 (https://llvm.org/bugs/show_bug.cgi?id=23405). During a node unscheduling an entry in LiveRegGens can be replaced with a new value. That corrupts the live reg tracking and LiveReg* structure is not cleared as should be during unscheduling. Problematic condition that enforces Gen replacement is `I->getSUnit()->getHeight() < LiveRegGens[I->getReg()]->getHeight()`. This condition should be checked only if LiveRegGen was set in current node unscheduling. Test Plan: Regression test included. Reviewers: hfinkel, atrick Reviewed By: atrick Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9993 llvm-svn: 240538
* MILexer.cpp: Try to fix a warning. [-Wsign-compare]NAKAMURA Takumi2015-06-241-1/+1
| | | | llvm-svn: 240525
* MIR Serialization: Serialize immediate machine operands.Alex Lorenz2015-06-234-2/+41
| | | | | | | | Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10573 llvm-svn: 240481
* MIR Parser: Use correct source locations for machine instruction diagnostics.Alex Lorenz2015-06-231-2/+23
| | | | | | | | | | | | This commit translates the source locations for MIParser diagnostics from the locations in the machine instruction string to the locations in the MIR file. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10574 llvm-svn: 240474
* Revert "[FaultMaps] Move FaultMapParser to Object/"Sanjoy Das2015-06-231-0/+36
| | | | | | | This reverts commit r240364 (git c49542e5bb186). The issue r240364 was trying to fix was fixed independently in r240362. llvm-svn: 240448
* MIR Serialization: Serialize physical register machine operands.Alex Lorenz2015-06-234-4/+213
| | | | | | | | | | | This commit introduces functionality that's used to serialize machine operands. Only the physical register operands are serialized by this commit. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10525 llvm-svn: 240425
* [BranchFolding] Document why replacing HashMachineInstr with hash_code ↵Benjamin Kramer2015-06-231-1/+3
| | | | | | doesn't work llvm-svn: 240415
* [MachineBasicBlock] Add getFirstNonDebugInstr to complement getLastNonDebugInstrBenjamin Kramer2015-06-234-70/+30
| | | | | | Use it in CodeGen where applicable. No functionality change intended. llvm-svn: 240414
* [MachineBasicBlock] Use the const_cast(this) trick to reduce duplicationBenjamin Kramer2015-06-231-25/+0
| | | | | | NFC. llvm-svn: 240413
* Simplify the Mangler interface now that DataLayout is mandatory.Rafael Espindola2015-06-232-5/+4
| | | | | | | We only need to pass in a DataLayout when mangling a raw string, not when constructing the mangler. llvm-svn: 240405
* Use MCSymbols for FastISel.Rafael Espindola2015-06-231-1/+20
| | | | | | | | | | | The summary is that it moves the mangling earlier and replaces a few calls to .addExternalSymbol with addSym. I originally wanted to replace all the uses of addExternalSymbol with addSym, but noticed it was a lot of work and doesn't need to be done all at once. llvm-svn: 240395
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-2369-86/+86
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* [FaultMaps] Move FaultMapParser to Object/Sanjoy Das2015-06-231-36/+0
| | | | | | | | | | | | | | | | | | Summary: That way llvm-objdump can rely on it without adding an extra dependency on CodeGen. This change duplicates the FaultKind enum and the code that serializes it to a string. I could not figure out a way to get around this without adding a new dependency to Object Reviewers: rafael, ab Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10619 llvm-svn: 240364
* [x86] generalize reassociation optimization in machine combiner to 2 ↵Sanjay Patel2015-06-231-18/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | instructions Currently ( D10321, http://reviews.llvm.org/rL239486 ), we can use the machine combiner pass to reassociate the following sequence to reduce the critical path: A = ? op ? B = A op X C = B op Y --> A = ? op ? B = X op Y C = A op B 'op' is currently limited to x86 AVX scalar FP adds (with fast-math on), but in theory, it could be any associative math/logic op (see TODO in code comment). This patch generalizes the pattern match to ignore the instruction that defines 'A'. So instead of a sequence of 3 adds, we now only need to find 2 dependent adds and decide if it's worth reassociating them. This generalization has a compile-time cost because we can now match more instruction sequences and we rely more heavily on the machine combiner to discard sequences where reassociation doesn't improve the critical path. For example, in the new test case: A = M div N B = A add X C = B add Y We'll match 2 reassociation patterns, but this transform doesn't reduce the critical path: A = M div N B = A add Y C = B add X We need the combiner to reject that pattern but select this: A = M div N B = X add Y C = B add A Differential Revision: http://reviews.llvm.org/D10460 llvm-svn: 240361
* Revert r240291: causes problems in self-hosted builds.Pawel Bylica2015-06-221-1/+1
| | | | llvm-svn: 240343
* MIR Serialization: Introduce a lexer for machine instructions.Alex Lorenz2015-06-224-11/+193
| | | | | | | | | | | | This commit adds a function that tokenizes the string containing the machine instruction. This commit also adds a struct called 'MIToken' which is used to represent the lexer's tokens. Reviewers: Sean Silva Differential Revision: http://reviews.llvm.org/D10521 llvm-svn: 240323
* Fix MSVC build.Sanjoy Das2015-06-221-4/+3
| | | | | | | | I had some unnecessary `typename`s left in after addressing review. This compiled successfully with clang++ but MSVC reported an error. Fix the build error by removing the redundant `typename`s. llvm-svn: 240307
* [FaultMaps] Add a parser for the __llvm__faultmaps section.Sanjoy Das2015-06-221-0/+37
| | | | | | | | | | | | | | | Summary: The parser is exercised by llvm-objdump using -print-fault-maps. As is probably obvious, the code itself was "heavily inspired" by http://reviews.llvm.org/D10434. Reviewers: reames, atrick, JosephTremoulet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10491 llvm-svn: 240304
* Avoid a Symbol -> Name -> Symbol conversion.Rafael Espindola2015-06-226-6/+24
| | | | | | | | | | | | | | Before this we were producing a TargetExternalSymbol from a MCSymbol. That meant extracting the symbol name and fetching the symbol again down the pipeline. This patch adds a DAG.getMCSymbol that lets the MCSymbol pass unchanged on the DAG. Doing so removes the need for MO_NOPREFIX and fixes the root cause of pr23900, allowing r240130 to be committed again. llvm-svn: 240300
* MIR Serialization: Serialize machine instruction names.Alex Lorenz2015-06-225-3/+185
| | | | | | | | | | | | | | | | This commit implements initial machine instruction serialization. It serializes machine instruction names. The instructions are represented using a YAML sequence of string literals and are a part of machine basic block YAML mapping. This commit introduces a class called 'MIParser' which will be used to parse the machine instructions and operands. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10481 llvm-svn: 240295
* Fix shl folding in DAG combiner.Pawel Bylica2015-06-221-1/+1
| | | | | | | | | | | | | | | | Summary: The code responsible for shl folding in the DAGCombiner was assuming incorrectly that all constants are less than 64 bits. This patch simply changes the way values are compared. Test Plan: A regression test included. Reviewers: andreadb Reviewed By: andreadb Subscribers: andreadb, test, llvm-commits Differential Revision: http://reviews.llvm.org/D10602 llvm-svn: 240291
* [PM/AA] Hoist the AliasResult enum out of the AliasAnalysis class.Chandler Carruth2015-06-222-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow classes to implement the AA interface without deriving from the class or referencing an internal enum of some other class as their return types. Also, to a pretty fundamental extent, concepts such as 'NoAlias', 'MayAlias', and 'MustAlias' are first class concepts in LLVM and we aren't saving anything by scoping them heavily. My mild preference would have been to use a scoped enum, but that feature is essentially completely broken AFAICT. I'm extremely disappointed. For example, we cannot through any reasonable[1] means construct an enum class (or analog) which has scoped names but converts to a boolean in order to test for the possibility of aliasing. [1]: Richard Smith came up with a "solution", but it requires class templates, and lots of boilerplate setting up the enumeration multiple times. Something like Boost.PP could potentially bundle this up, but even that would be quite painful and it doesn't seem realistically worth it. The enum class solution would probably work without the need for a bool conversion. Differential Revision: http://reviews.llvm.org/D10495 llvm-svn: 240255
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