| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 130867
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allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
llvm-svn: 130862
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it is both inefficient and unexpected by dwarfdump. Change to
a DW_FORM_data4.
While in here, change the predicate name to reflect that the position
is not really absolute (it is an offset), just that the linker needs a
relocation.
llvm-svn: 130846
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Physreg joining is still on by default, but I will turn it off shortly.
llvm-svn: 130844
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fixes dwarf-die2.c test case from gcc test suite.
llvm-svn: 130842
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DW_AT_MIPS_linkage_name. This helps gdb and fixes var-path-expr.exp regression reported by gdb testsuite.
llvm-svn: 130794
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Register coalescing can sometimes create live ranges that end in the middle of a
basic block without any killing instruction. When SplitKit detects this, it will
repair the live range by shrinking it to its uses.
Live range splitting also needs to know about this. When the range shrinks so
much that it becomes allocatable, live range splitting fails because it can't
find a good split point. It is paranoid about making progress, so an allocatable
range is considered an error.
The coalescer should really not be creating these bad live ranges. They appear
when coalescing dead copies.
llvm-svn: 130787
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does it now) then use them directly. This saves one scan of entire module, to collect debug info, which in turns saves few machine cycles at compile time.
llvm-svn: 130759
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pointer type for vector indices. Make the vector unrolling code respect that.
llvm-svn: 130733
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llvm-svn: 130718
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llvm-svn: 130715
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Def operands may also have an <undef> flag, but that just means that a
sub-register redef doesn't actually read the super-register. For physical
registers, it has no meaning.
llvm-svn: 130714
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This works around a limitation in gdb which is reported by following inherit.exp test failures from gdb testsuite.
gdb.cp/inherit.exp: print g_vB.vB::vb
gdb.cp/inherit.exp: print g_vB.vB::vx
gdb.cp/inherit.exp: print g_vC.vC::vc
gdb.cp/inherit.exp: print g_vC.vC::vx
gdb.cp/inherit.exp: print g_vD.vB::vb
...
llvm-svn: 130702
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llvm-svn: 130692
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When an interfering live range ends at a dead slot index between two
instructions, make sure that the inserted copy instruction gets a slot index
after the dead ones. This makes it possible to avoid the interference.
Ideally, there shouldn't be interference ending at a deleted instruction, but
physical register coalescing can sometimes do that to sub-registers.
This fixes PR9823.
llvm-svn: 130687
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-fno-dwarf2-cfi-asm. Implement the same behavior.
llvm-svn: 130637
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range covers the entire block.
The live range can't be terminated at a random instruction.
llvm-svn: 130619
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This could happen when trying to use a value that had been eliminated after dead
code elimination and folding loads.
llvm-svn: 130597
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llvm-svn: 130596
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the final assembly. It is the same technique used when targeting
assemblers that don't support .loc.
llvm-svn: 130587
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llvm-svn: 130582
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llvm-svn: 130568
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llvm-svn: 130562
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FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM.
llvm-svn: 130560
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AsmPrinter can have line number entries.
PR 9810
llvm-svn: 130518
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llvm-svn: 130504
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emmits: .cfi_personality, .cfi_lsda and the moves.
llvm-svn: 130503
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llvm-svn: 130501
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This fixes clang generated blocks' variables' debug info.
Radar 9279956.
llvm-svn: 130373
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llvm-svn: 130360
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llvm-svn: 130343
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give it a bit more responsibility. Also implement it for MachO.
If hacked to use cfi, 32 bit MachO will produce
.cfi_personality 155, L___gxx_personality_v0$non_lazy_ptr
and 64 bit will produce
.cfi_presonality ___gxx_personality_v0
The general idea is that .cfi_personality gets passed the final symbol. It is
up to codegen to produce it if using indirect representation (like 32 bit
MachO), but it is up to MC to decide which relocations to create.
llvm-svn: 130341
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llvm-svn: 130339
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common. rdar://problem/9303592 .
llvm-svn: 130338
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llvm-svn: 130337
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llvm-svn: 130331
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location expressions.
llvm-svn: 130326
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successors) and use inverse depth first search to traverse the BBs. However
that doesn't work when the CFG has infinite loops. Simply do a linear
traversal of all BBs work just fine.
rdar://9344645
llvm-svn: 130324
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We cannot rely on the <imp-def> operands added by LiveIntervals in all cases as
demonstrated by the test case.
llvm-svn: 130313
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The number of blocks covered by a live range must be strictly decreasing when
splitting, otherwise we can't allow repeated splitting.
llvm-svn: 130249
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more callee-saved registers and introduce copies. Only allows it if scheduling
a node above calls would end up lessen register pressure.
Call operands also has added ABI restrictions for register allocation, so be
extra careful with hoisting them above calls.
rdar://9329627
llvm-svn: 130245
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llvm-svn: 130232
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llvm-svn: 130231
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inflation.
This has two effects: 1. We never inflate to a larger register class than what
the sub-target can handle. 2. Completely unconstrained virtual registers get the
largest possible register class.
llvm-svn: 130229
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llvm-svn: 130205
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symbols. For example, don't emit:
.comm _i,4,2 ## @i
## @i
instead emit:
.comm _i,4,2 ## @i
llvm-svn: 130192
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llvm-svn: 130190
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Remove previous DwarfCFI hack.
llvm-svn: 130187
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space, if requested, will be used for complex addresses of the Blocks' variables.
llvm-svn: 130178
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llvm-svn: 130171
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