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* The register allocator shouldn't consider allocating reserved registers.Jim Grosbach2010-09-011-5/+30
| | | | | | r112728 did this for fast regalloc. llvm-svn: 112741
* The register allocator shouldn't consider allocating reserved registers.Jim Grosbach2010-09-011-3/+7
| | | | llvm-svn: 112728
* tidy up a few 80-column and trailing whitespace bits.Jim Grosbach2010-09-011-16/+19
| | | | llvm-svn: 112726
* Speculatively revert 112699 and 112702, they seem to be causingEric Christopher2010-09-011-80/+82
| | | | | | self host errors on clang-x86-64. llvm-svn: 112719
* Use the SSAUpdator to turn calls to eh.exception that are not in aDuncan Sands2010-09-011-82/+80
| | | | | | | | landing pad into uses of registers rather than loads from a stack slot. Doesn't touch the 'orrible hack code - Bill needs to persuade me harder :) llvm-svn: 112702
* Use absolute label for DW_AT_stmt_list if a target does not prefer offset here.Devang Patel2010-08-311-1/+5
| | | | | | This patch was developed on top of original patch by Artur Pietrek. llvm-svn: 112678
* Reapply r112623. Included additional check for unused byval argument.Devang Patel2010-08-313-4/+52
| | | | llvm-svn: 112659
* Track liveness of unallocatable, unreserved registers in machine DCE.Jakob Stoklund Olesen2010-08-311-6/+8
| | | | | | | | | | | | | Reserved registers are unpredictable, and are treated as always live by machine DCE. Allocatable registers are never reserved, and can be used for virtual registers. Unreserved, unallocatable registers can not be used for virtual registers, but otherwise behave like a normal allocatable register. Most targets only have the flag register in this set. llvm-svn: 112649
* Ignore unallocatable registers in RegAllocFast.Jakob Stoklund Olesen2010-08-311-1/+2
| | | | llvm-svn: 112632
* Revert r112623. It is causing self host build failures.Devang Patel2010-08-313-49/+4
| | | | llvm-svn: 112631
* Remember byval argument's frame index during argument lowering and use this ↵Devang Patel2010-08-313-4/+49
| | | | | | | | info to emit debug info. Fixes Radar 8367011. llvm-svn: 112623
* Improve virtual frame base register allocation heuristics.Jim Grosbach2010-08-311-73/+109
| | | | | | | | | | | | | | | | 1. Allocate them in the entry block of the function to enable function-wide re-use. The instructions to create them should be re-materializable, so there shouldn't be additional cost compared to creating them local to the basic blocks where they are used. 2. Collect all of the frame index references for the function and sort them by the local offset referenced. Iterate over the sorted list to allocate the virtual base registers. This enables creation of base registers optimized for positive-offset access of frame references. (Note: This may be appropriate to later be a target hook to do the sorting in a target appropriate manner. For now it's done here for simplicity.) llvm-svn: 112609
* Stop using the dom frontier in DwarfEHPrepare by not promoting alloca'sDuncan Sands2010-08-312-87/+10
| | | | | | | | any more. I plan to reimplement alloca promotion using SSAUpdater later. It looks like Bill's URoR logic really always needs domtree, so the pass now always asks for domtree info. llvm-svn: 112597
* Offset is not always unsigned number.Devang Patel2010-08-312-2/+2
| | | | llvm-svn: 112584
* Simplify.Devang Patel2010-08-312-15/+15
| | | | llvm-svn: 112583
* zap unused method. x86 is the only user and already has a more powerfull versionBruno Cardoso Lopes2010-08-311-29/+0
| | | | llvm-svn: 112571
* Add experimental -disable-physical-join command line option.Jakob Stoklund Olesen2010-08-311-0/+10
| | | | | | | | | | Eventually, we want to disable physreg coalescing completely, and let the register allocator do its job using hints. This option makes it possible to measure the impact of disabling physreg coalescing. llvm-svn: 112567
* two changes:Chris Lattner2010-08-301-5/+0
| | | | | | | | | | | | | 1) nuke ConstDataCoalSection, which is dead. 2) revise my previous patch for rdar://8018335, which was completely wrong. Specifically, it doesn't make sense to mark __TEXT,__const_coal as PURE_INSTRUCTIONS, because it is for readonly data. templates (it turns out) go to const_coal_nt. The real fix for rdar://8018335 was to give ConstTextCoalSection a section kind of ReadOnly instead of Text. llvm-svn: 112496
* Revert r112461. It was failing on PPC...Bill Wendling2010-08-301-4/+2
| | | | llvm-svn: 112463
* When adding a register, we should mark it as "def" if it can optionally defineBill Wendling2010-08-301-2/+4
| | | | | | said (physical) register. llvm-svn: 112461
* revert 112457, it looks like it broke selfhost.Chris Lattner2010-08-291-133/+23
| | | | llvm-svn: 112459
* rewrite DwarfEHPrepare to use SSAUpdater to promote its allocasChris Lattner2010-08-291-23/+133
| | | | | | | | instead of PromoteMemToReg. This allows it to stop using DF and DT, eliminating a computation of DT and DF from clang -O3. Clang is now down to 2 runs of DomFrontier. llvm-svn: 112457
* inline function into its only caller.Chris Lattner2010-08-291-13/+6
| | | | llvm-svn: 112455
* remove unions from LLVM IR. They are severely buggy and notChris Lattner2010-08-282-23/+0
| | | | | | being actively maintained, improved, or extended. llvm-svn: 112356
* remove dead protoChris Lattner2010-08-281-1/+0
| | | | llvm-svn: 112354
* Completely disable tail calls when fast-isel is enabled, as fast-iselDan Gohman2010-08-281-0/+5
| | | | | | doesn't currently support dealing with this. llvm-svn: 112341
* Trim a #include.Dan Gohman2010-08-281-3/+0
| | | | llvm-svn: 112340
* Simplify.Devang Patel2010-08-271-4/+1
| | | | llvm-svn: 112305
* Remove now unneeded command line flag that enables 'optimize compares.'Bill Wendling2010-08-271-8/+1
| | | | llvm-svn: 112287
* Revert r112213. It is not needed.Devang Patel2010-08-262-19/+8
| | | | llvm-svn: 112242
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-263-19/+3
| | | | | | to try to re-use scavenged frame index reference registers. rdar://8277890 llvm-svn: 112241
* If node is not available then use FuncInfo.ValueMap to emit debug info for ↵Devang Patel2010-08-261-5/+9
| | | | | | byval parameter. llvm-svn: 112238
* Remove the now obsolete frame index virtual re-use algorithm from PEI. Pre-RAJim Grosbach2010-08-261-148/+9
| | | | | | | virtual base registers handle this function, and more. A bit more cleanup to do on the interface to eliminateFrameIndex() after this. llvm-svn: 112237
* Speculatively revert r112207.Devang Patel2010-08-261-3/+1
| | | | llvm-svn: 112216
* 80 col.Devang Patel2010-08-261-1/+2
| | | | llvm-svn: 112215
* Update DanglingDebugInfo so that it can be used to track llvm.dbg.declare also.Devang Patel2010-08-262-8/+19
| | | | llvm-svn: 112213
* Donot forget to resolve dangling debug info in a case where virtual ↵Devang Patel2010-08-261-1/+3
| | | | | | register, used for a value, is initialized after a dbg intrinsic is seen. llvm-svn: 112207
* Add a hackaround for PR7993 which is causing failures on x86 builders that ↵Chris Lattner2010-08-261-0/+2
| | | | | | lack sse2. llvm-svn: 112175
* implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.Chris Lattner2010-08-262-66/+93
| | | | llvm-svn: 112171
* zap dead code.Chris Lattner2010-08-262-37/+0
| | | | llvm-svn: 112155
* remove some llvmcontext arguments that are now dead post-refactoring.Chris Lattner2010-08-253-6/+4
| | | | llvm-svn: 112104
* Change handling of illegal vector types to widen when possible instead of Chris Lattner2010-08-252-46/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats. This affects two places in the code: handling cross block values and handling function return and arguments. Since vectors are already widened by legalizetypes, this gives us much better code and unblocks x86-64 abi and SPU abi work. For example, this (which is a silly example of a cross-block value): define <4 x float> @test2(<4 x float> %A) nounwind { %B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1> %C = fadd <2 x float> %B, %B br label %BB BB: %D = fadd <2 x float> %C, %C %E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ret <4 x float> %E } Now compiles into: _test2: ## @test2 ## BB#0: addps %xmm0, %xmm0 addps %xmm0, %xmm0 ret previously it compiled into: _test2: ## @test2 ## BB#0: addps %xmm0, %xmm0 pshufd $1, %xmm0, %xmm1 ## kill: XMM0<def> XMM0<kill> XMM0<def> insertps $0, %xmm0, %xmm0 insertps $16, %xmm1, %xmm0 addps %xmm0, %xmm0 ret This implements rdar://8230384 llvm-svn: 112101
* Fix comment.Devang Patel2010-08-251-4/+3
| | | | llvm-svn: 112086
* Remove dead argument.Devang Patel2010-08-252-6/+4
| | | | llvm-svn: 112085
* Add some statistics for PEI register scavengingJim Grosbach2010-08-251-0/+7
| | | | llvm-svn: 112084
* split the vector case of getCopyFromParts out to its own function,Chris Lattner2010-08-241-81/+102
| | | | | | no functionality change. llvm-svn: 111994
* split the vector case out of getCopyToParts into its own function. NoChris Lattner2010-08-241-117/+126
| | | | | | functionality change. llvm-svn: 111990
* tidy up, reduce indentationChris Lattner2010-08-242-127/+123
| | | | llvm-svn: 111982
* Add ARM heuristic for when to allocate a virtual base register for stackJim Grosbach2010-08-241-1/+1
| | | | | | access. rdar://8277890&7352504 llvm-svn: 111968
* Move enabling the local stack allocation pass into the target where it belongs.Jim Grosbach2010-08-243-22/+8
| | | | | | | For now it's still a command line option, but the interface to the generic code doesn't need to know that. llvm-svn: 111942
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