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* Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0 (and move a function)Chris Lattner2005-09-231-72/+86
| | | | | | | | | This happens all the time on PPC for bool values, e.g. eliminating a xori in inverted-bool-compares.ll. This should be added to the dag combiner as well. llvm-svn: 23403
* Expose the LiveInterval interfaces as public headers.Chris Lattner2005-09-216-400/+4
| | | | llvm-svn: 23400
* Stub out the rest of the DAG Combiner. Just need to fill in theNate Begeman2005-09-191-8/+104
| | | | | | | select_cc bits and then wrap it in a convenience function for use with regular select. llvm-svn: 23389
* Teach the local spiller to turn stack slot loads into register-register copiesChris Lattner2005-09-191-26/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | when possible, avoiding the load (and avoiding the copy if the value is already in the right register). This patch came about when I noticed code like the following being generated: store R17 -> [SS1] ...blah... R4 = load [SS1] This was causing an LSU reject on the G5. This problem was due to the register allocator folding spill code into a reg-reg copy (producing the load), which prevented the spiller from being able to rewrite the load into a copy, despite the fact that the value was already available in a register. In the case above, we now rip out the R4 load and replace it with a R4 = R17 copy. This speeds up several programs on X86 (which spills a lot :) ), e.g. smg2k from 22.39->20.60s, povray from 12.93->12.66s, 168.wupwise from 68.54->53.83s (!), 197.parser from 7.33->6.62s (!), etc. This may have a larger impact in some cases on the G5 (by avoiding LSU rejects), though it probably won't trigger as often (less spilling in general). Targets that implement folding of loads/stores into copies should implement the isLoadFromStackSlot hook to get this. llvm-svn: 23388
* More DAG combining. Still need the branch instructions, and select_ccNate Begeman2005-09-161-5/+425
| | | | llvm-svn: 23371
* If a function has liveins, and if the target requested that they be ploppedChris Lattner2005-09-131-0/+15
| | | | | | into particular vregs, emit copies into the entry MBB. llvm-svn: 23331
* Allow targets to say they don't support truncstore i1 (which includes a maskChris Lattner2005-09-101-2/+15
| | | | | | when storing to an 8-bit memory location), as most don't. llvm-svn: 23303
* Add a missing #include, patch courtesy of Baptiste Lepilleur.Chris Lattner2005-09-091-0/+1
| | | | llvm-svn: 23302
* Fix a problem duraid encountered on itanium where this folding:Chris Lattner2005-09-091-2/+6
| | | | | | | select (x < y), 1, 0 -> (x < y) incorrectly: the setcc returns i1 but the select returned i32. Add the zero extend as needed. llvm-svn: 23301
* Fix a crash viewing dags that have target nodes in themChris Lattner2005-09-091-1/+2
| | | | llvm-svn: 23300
* Use continue in the use-processing loop to make it clear what the early exitsChris Lattner2005-09-091-115/+123
| | | | | | | | | are, simplify logic, and cause things to not be nested as deeply. This also uses MRI->areAliases instead of an explicit loop. No functionality change, just code cleanup. llvm-svn: 23296
* Last round of 2-node folds from SD.cpp. Will move on to 3 node ops suchNate Begeman2005-09-092-2/+107
| | | | | | as setcc and select next. llvm-svn: 23295
* remove debugging code *slaps head*Chris Lattner2005-09-091-1/+0
| | | | llvm-svn: 23294
* When spilling a live range that is used multiple times by one instruction,Chris Lattner2005-09-091-9/+26
| | | | | | | | only add a reload live range once for the instruction. This is one step towards fixing a regalloc pessimization that Nate notice, but is later undone by the spiller (so no code is changed). llvm-svn: 23293
* Move yet more folds over to the dag combiner from sd.cppNate Begeman2005-09-082-12/+68
| | | | llvm-svn: 23278
* Another round of dag combiner changes. This fixes some missing XOR foldsNate Begeman2005-09-072-17/+48
| | | | | | as well as fixing how we replace old values with new values. llvm-svn: 23260
* Fix a bug that Tzu-Chien Chiu noticed: live interval analysis does NOTChris Lattner2005-09-071-1/+0
| | | | | | preserve livevar llvm-svn: 23259
* Implement a common missing fold, (add (add x, c1), c2) -> (add x, c1+c2).Nate Begeman2005-09-071-8/+14
| | | | | | | This restores all of stanford to being identical with and without the dag combiner with the add folding turned off in sd.cpp. llvm-svn: 23258
* Fix a bug nate ran into with replacealluseswith. In the recursive cse case,Chris Lattner2005-09-071-15/+45
| | | | | | | | we were losing a node, causing an assertion to fail. Now we eagerly delete discovered CSE's, and provide an optional vector to keep track of these discovered equivalences. llvm-svn: 23255
* Add an option to the DAG Combiner to enable it for beta runs, and turn onNate Begeman2005-09-072-5/+25
| | | | | | that option for PowerPC's beta. llvm-svn: 23253
* Next round of DAGCombiner changes. This version now passes all the testsNate Begeman2005-09-061-236/+231
| | | | | | | I have run so far when run before Legalize. It still needs to pick up the SetCC folds, and nodes that use SetCC. llvm-svn: 23243
* Fix a checking failure in gsChris Lattner2005-09-031-1/+1
| | | | llvm-svn: 23235
* Next round of DAG Combiner changes. Just need to support multiple returnNate Begeman2005-09-021-302/+325
| | | | | | values, and then we should be able to hook it up. llvm-svn: 23231
* Clean up some code from the last checkinChris Lattner2005-09-021-24/+12
| | | | llvm-svn: 23229
* Fix a bug in legalize where it would emit two calls to libcalls that returnChris Lattner2005-09-021-10/+13
| | | | | | | | i64 values on targets that need that expanded to 32-bit registers. This fixes PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll and speeds up 189.lucas from taking 122.72s to 81.96s on my desktop. llvm-svn: 23228
* Make sure to auto-cse nullary opsChris Lattner2005-09-021-3/+9
| | | | llvm-svn: 23224
* Fix some buggy logic where we would try to remove nodes with two operandsChris Lattner2005-09-021-34/+56
| | | | | | | | | | from the binary ops map, even if they had multiple results. This latent bug caused a few failures with the dag isel last night. To prevent stuff like this from happening in the future, add some really strict checking to make sure that the CSE maps always match up with reality! llvm-svn: 23221
* Don't create zero sized stack objects even for array allocas with a zeroChris Lattner2005-09-021-1/+2
| | | | | | number of elements. llvm-svn: 23219
* Fix the release build, noticed by Eric van Riet PaapChris Lattner2005-09-022-2/+2
| | | | llvm-svn: 23215
* Make sure to legalize assert[zs]ext's operand correctlyChris Lattner2005-09-021-2/+7
| | | | llvm-svn: 23208
* Teach live intervals to not crash on dead livein regsChris Lattner2005-09-022-7/+13
| | | | llvm-svn: 23206
* For values that are live across basic blocks and need promotion, use ANY_EXTENDChris Lattner2005-09-021-10/+5
| | | | | | | | instead of ZERO_EXTEND to eliminate extraneous extensions. This eliminates dead zero extensions on formal arguments and other cases on PPC, implementing the newly tightened up test/Regression/CodeGen/PowerPC/small-arguments.ll test. llvm-svn: 23205
* legalize ANY_EXTEND appropriatelyChris Lattner2005-09-021-6/+26
| | | | llvm-svn: 23204
* Add support for ANY_EXTEND and add a few minor folds for itChris Lattner2005-09-021-1/+11
| | | | llvm-svn: 23203
* Fix some code in the current node combining code, spotted when it was movedNate Begeman2005-09-011-11/+3
| | | | | | | | | | over to DAGCombiner.cpp 1. Don't assume that SetCC returns i1 when folding (xor (setcc) constant) 2. Don't duplicate code in folding AND with AssertZext that is handled by MaskedValueIsZero llvm-svn: 23196
* Implement first round of feedback from chris (there's still a couple thingsNate Begeman2005-09-011-201/+137
| | | | | | left to do). llvm-svn: 23195
* It is NDEBUG not _NDEBUGChris Lattner2005-09-012-3/+3
| | | | llvm-svn: 23186
* Add the rest of the currently implemented visit routines to the switchNate Begeman2005-09-011-22/+36
| | | | | | statement in visit(). llvm-svn: 23185
* First pass at the DAG Combiner. It isn't used anywhere yet, but it shouldNate Begeman2005-09-011-0/+1056
| | | | | | | be mostly functional. It currently has all folds from SelectionDAG.cpp that do not involve a condition code. llvm-svn: 23184
* If a function has live ins/outs, print themChris Lattner2005-08-311-1/+23
| | | | llvm-svn: 23181
* Allow targets to custom expand shifts that are too large for their registersChris Lattner2005-08-311-0/+39
| | | | llvm-svn: 23173
* Fix VC++ precedence warningsJeff Cohen2005-08-311-2/+2
| | | | llvm-svn: 23169
* Sigh, not my day. Fix typo.Nate Begeman2005-08-311-1/+1
| | | | llvm-svn: 23166
* Fix a mistake in my previous patch pointed out by sabre; the AssertZextNate Begeman2005-08-311-2/+3
| | | | | | case in MaskedValueIsZero was wrong. llvm-svn: 23165
* Remove some unnecessary casts, and add the AssertZext case toNate Begeman2005-08-311-2/+3
| | | | | | MaskedValueIsZero. llvm-svn: 23164
* Allow physregs to occur in the dag with multiple types. Though I don't ↵Chris Lattner2005-08-301-12/+8
| | | | | | | | likethis, it is a requirement on PPC, which can have an f32 value in r3 at onepoint in a function and a f64 value in r3 at another point. :( This fixes compilation of mesa llvm-svn: 23161
* When checking the fixed intervals, don't forget to check for register aliases.Chris Lattner2005-08-301-5/+11
| | | | | | This fixes PR621 and Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll llvm-svn: 23158
* Fix FreeBench/fourinarow with the dag isel, by not adding a bogus resultChris Lattner2005-08-301-4/+1
| | | | | | to SHIFT_PARTS nodes llvm-svn: 23151
* Fix a miscompile of PtrDist/bc. Sign extending bools is not the right thing,Chris Lattner2005-08-301-1/+4
| | | | | | at least tends to expose problems elsewhere. llvm-svn: 23149
* Remove a bogus piece of my AssertSext/AssertZext patch. oops.Nate Begeman2005-08-301-2/+0
| | | | llvm-svn: 23148
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