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* Delay adding imported entity DIEs to the lexical scope, streamlining the ↵David Blaikie2014-08-311-5/+5
| | | | | | | | | | check for "this scope has nothing in it" This makes the emptiness of the scope with regards to variables and nested scopes is the same as with regards to imported entities. Just check if we had nothing at all before we build the node. llvm-svn: 216840
* Modify DwarfDebug::constructImportedEntityDIE to return rather than insert ↵David Blaikie2014-08-312-16/+7
| | | | | | | | into the scope Another step towards improving lexical_scope handling llvm-svn: 216839
* Refactor constructImportedEntityDIE(DwarfUnit, DIImportedEntity) to return a ↵David Blaikie2014-08-312-11/+16
| | | | | | | | | | | DIE rather than inserting it into a specified context. First of many steps to improve lexical scope construction (to omit trivial lexical scopes - those without any direct variables). To that end it's easier not to create imported entities directly into the lexical scope node, but to build them, then add them if necessary. llvm-svn: 216838
* Simplify expression using container's front() rather than begin()->David Blaikie2014-08-311-3/+1
| | | | llvm-svn: 216833
* [PATCH][Interpreter] Add missing FP intrinsic lowering.Josh Klontz2014-08-301-0/+16
| | | | | | | | | | | | | | | | | Summary: This extends the work done in [1], adding missing intrinsic lowering for floor, trunc, round and copysign. [1] http://comments.gmane.org/gmane.comp.compilers.llvm.cvs/199372 Test Plan: Extended `test/ExecutionEngine/Interpreter/intrinsics.ll` to test the additional missing intrinsics. All tests pass. Reviewers: dexonsmith Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5120 llvm-svn: 216827
* Fix some cases where StringRef was being passed by const reference. Remove ↵Craig Topper2014-08-302-4/+4
| | | | | | const from some other StringRefs since its implicitly const already. llvm-svn: 216820
* [MachineSinking] Clear kill flag of all operands at all their uses.Juergen Ributzka2014-08-291-3/+13
| | | | | | | | | | | | | | | | | | | | | | | When sinking an instruction it might be moved past the original last use of one of its operands. This last use has the kill flag set and the verifier will obviously complain about this. Before Machine Sinking (AArch64): %vreg3<def> = ASRVXr %vreg1, %vreg2<kill> %XZR<def> = SUBSXrs %vreg4, %vreg1<kill>, 160, %NZCV<imp-def> ... After Machine Sinking: %XZR<def> = SUBSXrs %vreg4, %vreg1<kill>, 160, %NZCV<imp-def> ... %vreg3<def> = ASRVXr %vreg1, %vreg2<kill> This fix clears all the kill flags in all instruction that use the same operands as the instruction that is being sunk. This fixes rdar://problem/18180996. llvm-svn: 216803
* Debug info: Add a new explicit DIDescriptor flag for the "public" accessAdrian Prantl2014-08-291-3/+3
| | | | | | | | | | specifier and change the default behavior to only emit the DW_AT_accessibility(public) attribute when the isPublic() is explicitly set. rdar://problem/18154959 llvm-svn: 216799
* Revert accidentally committed patches r216787-r216789David Blaikie2014-08-292-29/+9
| | | | | | | | | | Rushed when I realized I hadn't committed the FreeDeleter for a clang change I'd committed, and didn't check that I had things lying around in my client. Apologies for the noise. llvm-svn: 216792
* Omit DW_AT_artificial, DW_AT_external, and similar attributes under -gmltDavid Blaikie2014-08-291-0/+3
| | | | llvm-svn: 216789
* Omit dwarf::DW_AT_frame_base under -gmltDavid Blaikie2014-08-291-3/+6
| | | | llvm-svn: 216788
* StuffDavid Blaikie2014-08-291-6/+20
| | | | llvm-svn: 216787
* Fix typos in comments, NFCRobin Morisset2014-08-292-2/+2
| | | | | | | | | | | | | | Summary: Just fixing comments, no functional change. Test Plan: N/A Reviewers: jfb Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D5130 llvm-svn: 216784
* Add a const and munge some commentsReid Kleckner2014-08-291-1/+1
| | | | llvm-svn: 216781
* musttail: Forward regparms of variadic functions on x86_64Reid Kleckner2014-08-291-0/+7
| | | | | | | | | | | | | | | | | | | | | | Summary: If a variadic function body contains a musttail call, then we copy all of the remaining register parameters into virtual registers in the function prologue. We track the virtual registers through the function body, and add them as additional registers to pass to the call. Because this is all done in virtual registers, the register allocator usually gives us good code. If the function does a call, however, it will have to spill and reload all argument registers (ew). Forwarding regparms on x86_32 is not implemented because most compilers don't support varargs in 32-bit with regparms. Reviewers: majnemer Subscribers: aemerson, llvm-commits Differential Revision: http://reviews.llvm.org/D5060 llvm-svn: 216780
* Use DwarfDebug::attachLowHighPC for the compilation unit DIE.Frederic Riss2014-08-291-4/+1
| | | | llvm-svn: 216719
* Do not assume the value passed to memset is an i32.Job Noorman2014-08-291-8/+1
| | | | | | | | | | | | | The code in SelectionDAG::getMemset for some reason assumes the value passed to memset is an i32. This breaks the generated code for targets that only have registers smaller than 32 bits because the value might get split into multiple registers by the calling convention. See the test for the MSP430 target included in the patch for an example. This patch ensures that nothing is assumed about the type of the value. Instead, the type is taken from the selected overload of the llvm.memset intrinsic. llvm-svn: 216716
* Move FNEG next to FABS and make them more similar, so it's easier that they ↵Sanjay Patel2014-08-281-43/+46
| | | | | | can be refactored. NFC. llvm-svn: 216688
* On MachO, don't put non-private constants in mergeable sections.Rafael Espindola2014-08-281-1/+3
| | | | | | | | | | | On MachO, putting a symbol that doesn't start with a 'L' or 'l' in one of the __TEXT,__literal* sections prevents the linker from merging the context of the section. Since private GVs are the ones the get mangled to start with 'L' or 'l', we now only put those on the __TEXT,__literal* sections. llvm-svn: 216682
* Constify MCSymbol* parameters to DwarfDebug::attachLowHighPC.Frederic Riss2014-08-282-3/+3
| | | | llvm-svn: 216681
* Do not introduce new shuffle patterns after operation legalization if ↵Owen Anderson2014-08-281-2/+1
| | | | | | | | | SHUFFLE_VECTOR was marked custom. The target independent DAG combine has no way to know if the shuffles it is introducing are ones that the target could support or not. llvm-svn: 216678
* Janitorial services: "Don’t duplicate function or class name at the ↵Sanjay Patel2014-08-281-134/+119
| | | | | | beginning of the comment." llvm-svn: 216674
* Remove local TLI vars that are just duplicates of the class var. No ↵Sanjay Patel2014-08-281-2/+0
| | | | | | functional change. llvm-svn: 216673
* Use local vars to improve readability. No functional change.Sanjay Patel2014-08-281-42/+37
| | | | | | | Completes what was started in r216611 and r216623. Used const refs instead of pointers; not sure if one is preferable to the other. llvm-svn: 216672
* [PBQP] Only output debug information when requestedArnaud A. de Grandmaison2014-08-281-2/+2
| | | | llvm-svn: 216660
* [FastISel] Undo phi node updates when falling-back to SelectionDAG.Juergen Ributzka2014-08-281-4/+7
| | | | | | | | | | | | | | | | | | | | The included test case would fail, because the MI PHI node would have two operands from the same predecessor. This problem occurs when a switch instruction couldn't be selected. This happens always, because there is no default switch support for FastISel to begin with. The problem was that FastISel would first add the operand to the PHI nodes and then fall-back to SelectionDAG, which would then in turn add the same operands to the PHI nodes again. This fix removes these duplicate PHI node operands by reseting the PHINodesToUpdate to its original state before FastISel tried to select the instruction. This fixes <rdar://problem/18155224>. llvm-svn: 216640
* [FastISel]Juergen Ributzka2014-08-281-1/+8
| | | | | | | | | | | | | | | | | | | | Currently instructions are folded very aggressively for AArch64 into the memory operation, which can lead to the use of killed operands: %vreg1<def> = ADDXri %vreg0<kill>, 2 %vreg2<def> = LDRBBui %vreg0, 2 ... = ... %vreg1 ... This usually happens when the result is also used by another non-memory instruction in the same basic block, or any instruction in another basic block. This fix teaches hasTrivialKill to not only check the LLVM IR that the value has a single use, but also to check if the register that represents that value has already been used. This can happen when the instruction with the use was folded into another instruction (in this particular case a load instruction). This fixes rdar://problem/18142857. llvm-svn: 216634
* Use local variable in visitFADD. No functional change.Sanjay Patel2014-08-271-13/+11
| | | | llvm-svn: 216623
* Group unsafe-math optimizations for fsub into one block. No functional change.Sanjay Patel2014-08-271-14/+17
| | | | llvm-svn: 216616
* [FastISel] Fix a potential bug in FastEmitInst_riJuergen Ributzka2014-08-271-2/+1
| | | | | | | | FastEmitInst_ri was constraining the first operand without checking if it is a virtual register. Use constrainOperandRegClass as all the other FastEmitInst_* functions. llvm-svn: 216613
* Use local variable to improve readability. Sanjay Patel2014-08-271-15/+10
| | | | | | No functional change intended. llvm-svn: 216611
* Return a std::unique_ptr when creating a new MemoryBuffer.Rafael Espindola2014-08-271-3/+5
| | | | llvm-svn: 216583
* Teach the AArch64 backend about v4f16 and v8f16Oliver Stannard2014-08-271-6/+17
| | | | | | | | This teaches the AArch64 backend to deal with the operations required to deal with the operations on v4f16 and v8f16 which are exposed by NEON intrinsics, plus the add, sub, mul and div operations. llvm-svn: 216555
* [SDAG] Re-instate r215611 with a fix to a pesky X86 DAG combine.Chandler Carruth2014-08-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This combine is essentially combining target-specific nodes back into target independent nodes that it "knows" will be combined yet again by a target independent DAG combine into a different set of target-independent nodes that are legal (not custom though!) and thus "ok". This seems... deeply flawed. The crux of the problem is that we don't combine un-legalized shuffles that are introduced by legalizing other operations, and thus we don't see a very profitable combine opportunity. So the backend just forces the input to that combine to re-appear. However, for this to work, the conditions detected to re-form the unlegalized nodes must be *exactly* right. Previously, failing this would have caused poor code (if you're lucky) or a crasher when we failed to select instructions. After r215611 we would fall back into the legalizer. In some cases, this just "fixed" the crasher by produces bad code. But in the test case added it caused the legalizer and the dag combiner to iterate forever. The fix is to make the alignment checking in the x86 side of things match the alignment checking in the generic DAG combine exactly. This isn't really a satisfying or principled fix, but it at least make the code work as intended. It also highlights that it would be nice to detect the availability of under aligned loads for a given type rather than bailing on this optimization. I've left a FIXME to document this. Original commit message for r215611 which covers the rest of the chang: [SDAG] Fix a case where we would iteratively legalize a node during combining by replacing it with something else but not re-process the node afterward to remove it. In a truly remarkable stroke of bad luck, this would (in the test case attached) end up getting some other node combined into it without ever getting re-processed. By adding it back on to the worklist, in addition to deleting the dead nodes more quickly we also ensure that if it *stops* being dead for any reason it makes it back through the legalizer. Without this, the test case will end up failing during instruction selection due to an and node with a type we don't have an instruction pattern for. It took many million runs of the shuffle fuzz tester to find this. llvm-svn: 216537
* Simplify creation of a bunch of ArrayRefs by using None, makeArrayRef or ↵Craig Topper2014-08-274-20/+11
| | | | | | just letting them be implicitly created. llvm-svn: 216525
* Fix some cases were ArrayRefs were being passed by reference. Also remove ↵Craig Topper2014-08-271-1/+1
| | | | | | 'const' from some other ArrayRef uses since its implicitly const already. llvm-svn: 216524
* Remove type unit skeletons. GDB no longer needs them & this saves a heap of ↵David Blaikie2014-08-271-22/+1
| | | | | | space. llvm-svn: 216521
* CodeGen/LiveVariables: use vector::assign()Dylan Noblesmith2014-08-261-8/+4
| | | | | | Address review comments. llvm-svn: 216426
* Modernize raw_fd_ostream's constructor a bit.Rafael Espindola2014-08-252-6/+7
| | | | | | | | | | Take a StringRef instead of a "const char *". Take a "std::error_code &" instead of a "std::string &" for error. A create static method would be even better, but this patch is already a bit too big. llvm-svn: 216393
* Allow vectorization of division by uniform power of 2.Karthik Bhat2014-08-251-3/+5
| | | | | | | | This patch adds support to recognize division by uniform power of 2 and modifies the cost table to vectorize division by uniform power of 2 whenever possible. Updates Cost model for Loop and SLP Vectorizer.The cost table is currently only updated for X86 backend. Thanks to Hal, Andrea, Sanjay for the review. (http://reviews.llvm.org/D4971) llvm-svn: 216371
* CodeGen/LiveVariables: hoist out code in nested loopsDylan Noblesmith2014-08-251-110/+121
| | | | | | This makes runOnMachineFunction vastly more readable. llvm-svn: 216368
* CodeGen/LiveVariables: switch to std::vectorDylan Noblesmith2014-08-251-11/+13
| | | | | | No functionality change. llvm-svn: 216367
* CodeGen: switch raw array to std::vectorDylan Noblesmith2014-08-251-8/+1
| | | | llvm-svn: 216355
* Use range based for loops to avoid needing to re-mention SmallPtrSet size.Craig Topper2014-08-248-32/+17
| | | | llvm-svn: 216351
* Revert r215611 because it caused the infinite loop in bug 20736. There is a ↵Nick Lewycky2014-08-231-2/+0
| | | | | | reduced testcase in that bug. llvm-svn: 216307
* ARM / x86_64 varargs: Don't save regparms in prologue without va_startReid Kleckner2014-08-221-0/+8
| | | | | | | | | | | | There's no need to do this if the user doesn't call va_start. In the future, we're going to have thunks that forward these register parameters with musttail calls, and they won't need these spills for handling va_start. Most of the test suite changes are adding va_start calls to existing tests to keep things working. llvm-svn: 216294
* Use DILexicalBlockFile, rather than DILexicalBlock, to track discriminator ↵David Blaikie2014-08-211-2/+2
| | | | | | | | | | | | | | | changes to ensure discriminator changes don't introduce new DWARF DW_TAG_lexical_blocks. Somewhat unnoticed in the original implementation of discriminators, but it could cause instructions to end up in new, small, DW_TAG_lexical_blocks due to the use of DILexicalBlock to track discriminator changes. Instead, use DILexicalBlockFile which we already use to track file changes without introducing new scopes, so it works well to track discriminator changes in the same way. llvm-svn: 216239
* name change: isPow2DivCheap -> isPow2SDivCheapSanjay Patel2014-08-212-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | isPow2DivCheap That name doesn't specify signed or unsigned. Lazy as I am, I eventually read the function and variable comments. It turns out that this is strictly about signed div. But I discovered that the comments are wrong: srl/add/sra is not the general sequence for signed integer division by power-of-2. We need one more 'sra': sra/srl/add/sra That's the sequence produced in DAGCombiner. The first 'sra' may be removed when dividing by exactly '2', but that's a special case. This patch corrects the comments, changes the name of the flag bit, and changes the name of the accessor methods. No functional change intended. Differential Revision: http://reviews.llvm.org/D5010 llvm-svn: 216237
* [PeepholeOptimizer] Enable the advanced copy optimization by default.Quentin Colombet2014-08-211-1/+1
| | | | | | | | | | | | | The advanced copy optimization does not yield any difference on the whole llvm test-suite + SPECs, either in compile time or runtime (binaries are identical), but has a big potential when data go back and forth between register files as demonstrated with test/CodeGen/ARM/adv-copy-opt.ll. Note: This was measured for both Os and O3 for armv7s, arm64, and x86_64. <rdar://problem/12702965> llvm-svn: 216236
* Rename AtomicExpandLoadLinked into AtomicExpandRobin Morisset2014-08-213-21/+21
| | | | | | | | | | | AtomicExpandLoadLinked is currently rather ARM-specific. This patch is the first of a group that aim at making it more target-independent. See http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-August/075873.html for details The command line option is "atomic-expand" llvm-svn: 216231
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