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* Don't duplicate comment from the .h. NFC.Rafael Espindola2015-03-171-4/+0
| | | | llvm-svn: 232476
* Move the EH symbol to the asm printer and use it for the SJLJ case too.Rafael Espindola2015-03-176-31/+11
| | | | llvm-svn: 232475
* Remove dead code. NFC.Rafael Espindola2015-03-172-28/+0
| | | | llvm-svn: 232472
* Replace a use of GetTempSymbol with createTempSymbol.Rafael Espindola2015-03-175-12/+26
| | | | | | This is cleaner and avoids a crash in a corner case. llvm-svn: 232471
* Pass in a "const Triple &T" instead of a raw StringRef.Rafael Espindola2015-03-161-6/+5
| | | | llvm-svn: 232429
* IR: Take advantage of -verify checks for MDExpressionDuncan P. N. Exon Smith2015-03-162-2/+3
| | | | | | | | | | | | | | | | | | Now that we check `MDExpression` during `-verify` (r232299), make the `DIExpression` wrapper more strict: - remove redundant checks in `DebugInfoVerifier`, - overload `get()` to `cast_or_null<MDExpression>` (superseding `getRaw()`), - stop checking for null in any accessor, and - remove `DIExpression::Verify()` entirely in favour of `MDExpression::isValid()`. There is still some logic in this class, mostly to do with high-level iterators; I'll defer cleaning up those until the rest of the wrappers are similarly strict. llvm-svn: 232412
* Fix uses of reserved identifiers starting with an underscore followed by an ↵David Blaikie2015-03-161-6/+6
| | | | | | | | | uppercase letter This covers essentially all of llvm's headers and libs. One or two weird cases I wasn't sure were worth/appropriate to fix. llvm-svn: 232394
* [AsmPrinter] Use the per-function subtarget to emit inline asm instructions thatAkira Hatanaka2015-03-162-28/+15
| | | | | | | | | | are not at the file level. Previously, the default subtarget created from the target triple was used to emit inline asm instructions. Compilation would fail in cases where the feature bits necessary to assemble an inline asm instruction in a function weren't set. llvm-svn: 232392
* [llvm] Replacing asserts with static_asserts where appropriateGabor Horvath2015-03-162-2/+2
| | | | | | | | | | | | | | | | Summary: This patch consists of the suggestions of clang-tidy/misc-static-assert check. Reviewers: alexfh Reviewed By: alexfh Subscribers: xazax.hun, llvm-commits Differential Revision: http://reviews.llvm.org/D8343 llvm-svn: 232366
* remove function names from comments; NFCSanjay Patel2015-03-151-7/+6
| | | | llvm-svn: 232328
* fix typo: NFCSanjay Patel2015-03-151-1/+1
| | | | llvm-svn: 232327
* [opaque pointer type] IRBuilder gep migration progressDavid Blaikie2015-03-151-16/+19
| | | | llvm-svn: 232294
* [MachineLICM] First steps of sinking GEPs near calls.Daniel Jasper2015-03-141-0/+61
| | | | | | | | | | | | | | | Specifically, if there are copy-like instructions in the loop header they are moved into the loop close to their uses. This reduces the live intervals of the values and can avoid register spills. This is working towards a fix for http://llvm.org/PR22230. Review: http://reviews.llvm.org/D7259 Next steps: - Find a better cost model (which non-copy instructions should be sunk?) - Make this dependent on register pressure llvm-svn: 232262
* BranchFolding: MergePotentialsElt has a total order, just call array_pod_sort.Benjamin Kramer2015-03-131-1/+1
| | | | | | No functionality change intended. llvm-svn: 232217
* Recommit r232027 with PR22883 fixed: Add infrastructure for support of ↵Daniel Sanders2015-03-132-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | multiple memory constraints. The operand flag word for ISD::INLINEASM nodes now contains a 15-bit memory constraint ID when the operand kind is Kind_Mem. This constraint ID is a numeric equivalent to the constraint code string and is converted with a target specific hook in TargetLowering. This patch maps all memory constraints to InlineAsm::Constraint_m so there is no functional change at this point. It just proves that using these previously unused bits in the encoding of the flag word doesn't break anything. The next patch will make each target preserve the current mapping of everything to Constraint_m for itself while changing the target independent implementation of the hook to return Constraint_Unknown appropriately. Each target will then be adapted in separate patches to use appropriate Constraint_* values. PR22883 was caused the matching operands copying the whole of the operand flags for the matched operand. This included the constraint id which needed to be replaced with the operand number. This has been fixed with a conversion function. Following on from this, matching operands also used the operand number as the constraint id. This has been fixed by looking up the matched operand and taking it from there. llvm-svn: 232165
* [MachineCopyPropagation] Fix a bug causing incorrect removal for the ↵Hao Liu2015-03-131-4/+3
| | | | | | | | | | | | | | instruction sequences as follows %Q5_Q6<def> = COPY %Q2_Q3 %D5<def> = %D3<def> = %D3<def> = COPY %D6 // Incorrectly removed in MachineCopyPropagation Using of %D3 results in incorrect result ... Reviewed in http://reviews.llvm.org/D8242 llvm-svn: 232142
* Use the cached subtarget off of the machine function.Eric Christopher2015-03-131-1/+1
| | | | llvm-svn: 232129
* Use the cached subtarget off of the machine function.Eric Christopher2015-03-131-6/+6
| | | | llvm-svn: 232128
* [X86, AVX2] Replace inserti128 and extracti128 intrinsics with generic shufflesSanjay Patel2015-03-121-22/+0
| | | | | | | | | | | | | | | | | This should complete the job started in r231794 and continued in r232045: We want to replace as much custom x86 shuffling via intrinsics as possible because pushing the code down the generic shuffle optimization path allows for better codegen and less complexity in LLVM. AVX2 introduced proper integer variants of the hacked integer insert/extract C intrinsics that were created for this same functionality with AVX1. This should complete the removal of insert/extract128 intrinsics. The Clang precursor patch for this change was checked in at r232109. llvm-svn: 232120
* Remove unused headers.Eric Christopher2015-03-121-2/+0
| | | | llvm-svn: 232102
* Revert "r232027 - Add infrastructure for support of multiple memory constraints"Hal Finkel2015-03-122-15/+1
| | | | | | | | | | | | | | | | | | | | | | | | This (r232027) has caused PR22883; so it seems those bits might be used by something else after all. Reverting until we can figure out what else to do. Original commit message: The operand flag word for ISD::INLINEASM nodes now contains a 15-bit memory constraint ID when the operand kind is Kind_Mem. This constraint ID is a numeric equivalent to the constraint code string and is converted with a target specific hook in TargetLowering. This patch maps all memory constraints to InlineAsm::Constraint_m so there is no functional change at this point. It just proves that using these previously unused bits in the encoding of the flag word doesn't break anything. The next patch will make each target preserve the current mapping of everything to Constraint_m for itself while changing the target independent implementation of the hook to return Constraint_Unknown appropriately. Each target will then be adapted in separate patches to use appropriate Constraint_* values. llvm-svn: 232093
* [X86, AVX] replace vextractf128 intrinsics with generic shufflesSanjay Patel2015-03-121-3/+0
| | | | | | | | | | | | | | | | | Now that we've replaced the vinsertf128 intrinsics, do the same for their extract twins. This is very much like D8086 (checked in at r231794): We want to replace as much custom x86 shuffling via intrinsics as possible because pushing the code down the generic shuffle optimization path allows for better codegen and less complexity in LLVM. This is also the LLVM sibling to the cfe D8275 patch. Differential Revision: http://reviews.llvm.org/D8276 llvm-svn: 232045
* Add infrastructure for support of multiple memory constraints.Daniel Sanders2015-03-122-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The operand flag word for ISD::INLINEASM nodes now contains a 15-bit memory constraint ID when the operand kind is Kind_Mem. This constraint ID is a numeric equivalent to the constraint code string and is converted with a target specific hook in TargetLowering. This patch maps all memory constraints to InlineAsm::Constraint_m so there is no functional change at this point. It just proves that using these previously unused bits in the encoding of the flag word doesn't break anything. The next patch will make each target preserve the current mapping of everything to Constraint_m for itself while changing the target independent implementation of the hook to return Constraint_Unknown appropriately. Each target will then be adapted in separate patches to use appropriate Constraint_* values. Reviewers: hfinkel Reviewed By: hfinkel Subscribers: hfinkel, jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D8171 llvm-svn: 232027
* [NVPTXAsmPrinter] do not print .align on function headersJingyue Wu2015-03-121-1/+2
| | | | | | | | | | | | | | | | | | | Summary: PTX does not allow .align directives on function headers. Fixes PR21551. Test Plan: test/Codegen/NVPTX/function-align.ll Reviewers: eliben, jholewinski Reviewed By: eliben, jholewinski Subscribers: llvm-commits, eliben, jpienaar, jholewinski Differential Revision: http://reviews.llvm.org/D8274 llvm-svn: 232004
* Make llvm.eh.actions an intrinsic and add docs for itReid Kleckner2015-03-121-5/+3
| | | | | | | | These docs *don't* match the way WinEHPrepare uses them yet, and verifier support isn't implemented either. The implementation will come after the documentation text is reviewed and agreed upon. llvm-svn: 232003
* Stop calling DwarfEHPrepare from WinEHPrepareReid Kleckner2015-03-123-40/+24
| | | | | | | | Instead, run both EH preparation passes, and have them both ignore functions with unrecognized EH personalities. Pass delegation involved some hacky code for creating an AnalysisResolver that we don't need now. llvm-svn: 231995
* Move the DataLayout to the generic TargetMachine, making it mandatory.Mehdi Amini2015-03-121-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: I don't know why every singled backend had to redeclare its own DataLayout. There was a virtual getDataLayout() on the common base TargetMachine, the default implementation returned nullptr. It was not clear from this that we could assume at call site that a DataLayout will be available with each Target. Now getDataLayout() is no longer virtual and return a pointer to the DataLayout member of the common base TargetMachine. I plan to turn it into a reference in a future patch. The only backend that didn't have a DataLayout previsouly was the CPPBackend. It now initializes the default DataLayout. This commit is NFC for all the other backends. Test Plan: clang+llvm ninja check-all Reviewers: echristo Subscribers: jfb, jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D8243 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 231987
* Fix some clang warnings in WinEHPrepareReid Kleckner2015-03-111-3/+2
| | | | llvm-svn: 231985
* Handle big index in getelementptr instructionReid Kleckner2015-03-112-21/+12
| | | | | | | | | | | | | | | CodeGen incorrectly ignores (assert from APInt) constant index bigger than 2^64 in getelementptr instruction. This is a test and fix for that. Patch by Paweł Bylica! Reviewed By: rnk Subscribers: majnemer, rnk, mcrosier, resistor, llvm-commits Differential Revision: http://reviews.llvm.org/D8219 llvm-svn: 231984
* Extended support for native Windows C++ EH outliningAndrew Kaylor2015-03-111-139/+857
| | | | | | Differential Review: http://reviews.llvm.org/D7886 llvm-svn: 231981
* Remove useMachineScheduler and replace it with subtarget optionsEric Christopher2015-03-114-35/+14
| | | | | | | | | | | | | that control, individually, all of the disparate things it was controlling. At the same time move a FIXME in the Hexagon port to a new subtarget function that will enable a user of the machine scheduler to avoid using the source scheduler for pre-RA-scheduling. The FIXME would have this removed, but involves either testcase changes or adding -pre-RA-sched=source to a few testcases. llvm-svn: 231980
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-1/+2
| | | | | | | MachineFunction argument so that we can grab subtarget specific features off of it. llvm-svn: 231979
* Put jump tables in unique sections on COFF.Rafael Espindola2015-03-111-0/+25
| | | | | | | | | | | If a function is going in an unique section (because of -ffunction-sections for example), putting a jump table in .rodata will keep .rodata alive and that will keep alive any other function that also has a jump table. Instead, put the jump table in a unique section that is associated with the function. llvm-svn: 231961
* Have getRegPressureSetLimit take a MachineFunction so that aEric Christopher2015-03-111-2/+2
| | | | | | we can inspect the subtarget and function when computing values. llvm-svn: 231951
* Print section start labels when first switching to the section.Rafael Espindola2015-03-112-45/+5
| | | | | | | This is less brittle and avoids polluting the start of the file with every debug section. llvm-svn: 231898
* Have TargetRegisterInfo::getLargestLegalSuperClass take aEric Christopher2015-03-104-4/+6
| | | | | | | MachineFunction argument so that it can look up the subtarget rather than using a cached one in some Targets. llvm-svn: 231888
* Emit correct linkage-name attribute based on DWARF version.Paul Robinson2015-03-103-13/+15
| | | | | | | | | | There are still 4 tests that check for DW_AT_MIPS_linkage_name, because they specify DWARF 2 or 3 in the module metadata. So, I didn't create an explicit version-based test for the attribute. Differential Revision: http://reviews.llvm.org/D8227 llvm-svn: 231880
* Remove the use of the subtarget in MCCodeEmitter creation andEric Christopher2015-03-101-4/+3
| | | | | | | update all ports accordingly. Required a couple of small rewrites in handling subtarget features during creation in PPC. llvm-svn: 231861
* Create symbols marking the start of a section earlier.Rafael Espindola2015-03-102-24/+22
| | | | | | | | | This lets us pass the symbol to the constructor and avoid the mutable field. This also opens the way for outputting the symbol only when needed, instead of outputting them at the start of the file. llvm-svn: 231859
* [CodeGenPrepare] Refine the cost model provided by the promotion helper.Quentin Colombet2015-03-101-61/+77
| | | | | | | | | | | | | | | | | - Use TargetLowering to check for the actual cost of each extension. - Provide a factorized method to check for the cost of an extension: TargetLowering::isExtFree. - Provide a virtual method TargetLowering::isExtFreeImpl for targets to be able to tune the cost of non-free extensions. This refactoring offers a better granularity to model what really happens on different targets. No performance changes and very few code differences. Part of <rdar://problem/19267165> llvm-svn: 231855
* Don't evaluate rend() on every iteration of the loop.Chad Rosier2015-03-101-1/+3
| | | | llvm-svn: 231837
* [AsmPrinter][TLOF] Reintroduce AArch64 testBruno Cardoso Lopes2015-03-101-11/+12
| | | | | | | | | | | | Follow up from r231505. Fix the non-determinism by using a MapVector and reintroduce the AArch64 testcase. Defer deleting the got candidates up to the end and remove them in a bulk, avoiding linear time removal of each element. Thanks to Renato Golin for trying it out on other platforms. llvm-svn: 231830
* Change the datatype of DwarfExpression::Emit(Un)Signed to (u)int64_tAdrian Prantl2015-03-103-10/+10
| | | | | | so it matches the one used by ByteStreamer::Emit(U|S)LEB128. llvm-svn: 231823
* Store an optional section start label in MCSection.Rafael Espindola2015-03-1012-137/+92
| | | | | | | | | | | | This makes code that uses section relative expressions (debug info) simpler and less brittle. This is still a bit awkward as the symbol is created late and has to be stored in a mutable field. I will move the symbol creation earlier in the next patch. llvm-svn: 231802
* Teach lowering to correctly handle invoke statepoint and gc results tied to ↵Igor Laevsky2015-03-103-22/+92
| | | | | | | | | | | them. Note that we still can not lower gc.relocates for invoke statepoints. Also it extracts getCopyFromRegs helper function in SelectionDAGBuilder as we need to be able to customize type of the register exported from basic block during lowering of the gc.result. (Resubmitting this change after not being able to reproduce buildbot failure) Differential Revision: http://reviews.llvm.org/D7760 llvm-svn: 231800
* [BranchFolding] Remove MMOs during tail merge to preserve dependencies.Chad Rosier2015-03-101-0/+57
| | | | | | | | | | | | | | | | | | When tail merging it may be necessary to remove MMOs from memory operations to ensures later passes (e.g., MI sched) conservatively compute dependencies. Currently, we only remove the MMO from the common tail if the MMO doesn't match with the relative instruction in the non-common tail(s). A more robust solution would be to add multiple MMOs from the duplicate MIs to the new MI. Currently ScheduleDAGInstrs.cpp ignores all MMOs on instructions with multiple MMOs, so this solution is equivalent for the time being. No test case included as this is incredibly difficult to reproduce. Patch was a collaborative effort between Ana Pazos and myself. Phabricator: http://reviews.llvm.org/D7769 llvm-svn: 231799
* [X86, AVX] replace vinsertf128 intrinsics with generic shufflesSanjay Patel2015-03-101-3/+0
| | | | | | | | | | | | | | We want to replace as much custom x86 shuffling via intrinsics as possible because pushing the code down the generic shuffle optimization path allows for better codegen and less complexity in LLVM. This is the sibling patch for the Clang half of this change: http://reviews.llvm.org/D8088 Differential Revision: http://reviews.llvm.org/D8086 llvm-svn: 231794
* Remove effectively dead code.Rafael Espindola2015-03-102-17/+1
| | | | | | | Switching back and forth between sections does nothing (other than producing larger .s files). llvm-svn: 231790
* The operand flag word used in ISD::INLINEASM is an i32 not a pointer. NFC.Daniel Sanders2015-03-101-4/+2
| | | | | | | | | | | | | | | | | | | Summary: This is part of the work to support memory constraints that behave differently to 'm'. The subsequent patches will expand on the existing encoding (which is a 32-bit int) and as a result in some flag words will no longer fit into an i16. This problem only affected the MSP430 target which appears to have 16-bit pointers. Reviewers: hfinkel Reviewed By: hfinkel Subscribers: hfinkel, llvm-commits Differential Revision: http://reviews.llvm.org/D8168 llvm-svn: 231783
* Move variable into assert to fix -Asserts builds.Rafael Espindola2015-03-101-4/+2
| | | | llvm-svn: 231753
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