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* No longer need to track last def / use.Evan Cheng2007-07-111-79/+15
| | | | llvm-svn: 38534
* Fix for PR1545: Revamp code that update kill information due to register reuse.Evan Cheng2007-07-111-63/+85
| | | | llvm-svn: 38525
* Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoadDan Gohman2007-06-191-3/+2
| | | | | | | | | | with a general target hook to identify rematerializable instructions. Some instructions are only rematerializable with specific operands, such as loads from constant pools, while others are always rematerializable. This hook allows both to be identified as being rematerializable with the same mechanism. llvm-svn: 37644
* Add a target hook to allow loads from constant pools to be rematerialized, ↵Dan Gohman2007-06-141-1/+2
| | | | | | | | and an implementation for x86. llvm-svn: 37576
* Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.Evan Cheng2007-04-261-5/+5
| | | | llvm-svn: 36483
* Match MachineFunction::UsedPhysRegs changes.Evan Cheng2007-04-251-19/+12
| | | | llvm-svn: 36452
* Re-materialize all loads from fixed stack slots.Evan Cheng2007-04-041-6/+18
| | | | llvm-svn: 35660
* Don't add the same MI to register reuse "last def/use" twice if it reads theEvan Cheng2007-03-301-1/+4
| | | | | | register more than once. llvm-svn: 35513
* Don't call getOperandConstraint() if operand index is greater thanEvan Cheng2007-03-271-1/+2
| | | | | | TID->numOperands. llvm-svn: 35375
* Fix for PR1266. Don't mark a two address operand IsKill.Evan Cheng2007-03-261-19/+30
| | | | llvm-svn: 35365
* First cut trivial re-materialization support.Evan Cheng2007-03-201-12/+68
| | | | llvm-svn: 35208
* Only propagate IsKill if the last use is a kill.Evan Cheng2007-03-031-8/+22
| | | | llvm-svn: 34878
* - Keep track all def and uses of stack slot available in register.Evan Cheng2007-03-021-28/+51
| | | | | | - Available value use may be deleted (e.g. noop move). llvm-svn: 34841
* Invalidate last use of a reused register if the use is a deleted noop copy.Evan Cheng2007-03-021-0/+1
| | | | llvm-svn: 34839
* A restore is promoted to copy (or deleted entirely), remove the kill from ↵Evan Cheng2007-03-011-3/+4
| | | | | | the last use of the targetted register. llvm-svn: 34773
* A couple of more places where a register liveness has been extended and its ↵Evan Cheng2007-02-251-5/+57
| | | | | | last kill should be updated accordingly. llvm-svn: 34597
* Reuse extends the liveness of a register. Transfer the kill to the operand ↵Evan Cheng2007-02-231-1/+6
| | | | | | that reuse it. llvm-svn: 34536
* A spill kills the register being stored. But it is later being reused by ↵Evan Cheng2007-02-231-25/+39
| | | | | | spiller, its live range has to be extended. llvm-svn: 34517
* Use BitVector instead. No functionality change.Evan Cheng2007-02-211-8/+5
| | | | llvm-svn: 34460
* Dead code.Evan Cheng2007-02-201-6/+0
| | | | llvm-svn: 34435
* Fixed a long standing spiller bug that's exposed by Thumb:Evan Cheng2007-02-081-13/+13
| | | | | | | | | | | | | | | | | | | | | | | The code sequence before the spiller is something like: = tMOVrr %reg1117 = tMOVrr %reg1078 = tLSLri %reg1117, 2 The it starts spilling: %r0 = tRestore <fi#5>, 0 %r1 = tRestore <fi#7>, 0 %r1 = tMOVrr %r1<kill> tSpill %r1, <fi#5>, 0 %reg1078 = tLSLri %reg1117, 2 It restores the value while processing the first tMOVrr. At this point, the spiller remembers fi#5 is available in %r0. Next it processes the second move. It restores the source before the move and spills the result afterwards. The move becomes a noop and is deleted. However, a spill has been inserted and that should invalidate reuse of %r0 for fi#5 and add reuse of %r1 for fi#5. Therefore, %reg1117 (which is also assigned fi#5) should get %r1, not %r0. llvm-svn: 34039
* Switch this to use SmallSet to avoid mallocs in the common case.Chris Lattner2007-01-231-3/+3
| | | | llvm-svn: 33457
* GetRegForReload() now keeps track which registers have been considered and ↵Evan Cheng2007-01-191-8/+32
| | | | | | | | | | | | | | rejected during its quest to find a suitable reload register. This avoids an infinite loop in case like this: t1 := op t2, t3 t2 <- assigned r0 for use by the reload but ended up reuse r1 t3 <- assigned r1 for use by the reload but ended up reuse r0 t1 <- desires r1 sees r1 is taken by t2, tries t2's reload register r0 sees r0 is taken by t3, tries t3's reload register r1 sees r1 is taken by t2, tries t2's reload register r0 ... llvm-svn: 33382
* Eliminate static ctors from StatisticsChris Lattner2006-12-191-7/+7
| | | | llvm-svn: 32698
* Added an automatic cast to "std::ostream*" etc. from OStream. We then canBill Wendling2006-12-171-7/+1
| | | | | | | rework the hacks that had us passing OStream in. We pass in std::ostream* instead, check for null, and then dispatch to the correct print() method. llvm-svn: 32636
* Minor clean up.Evan Cheng2006-12-151-2/+3
| | | | llvm-svn: 32593
* Fix a long-standing spiller bug:Evan Cheng2006-12-141-1/+35
| | | | | | | | | | | | | | | | If a spillslot value is available in a register, and there is a noop copy that targets that register, the spiller correctly decide not to invalidate the spillslot register. However, even though the noop copy does not clobbers the value. It does start a new intersecting live range. That means the spillslot register is available for use but should not be reused for a two-address instruction modref operand which would clobber the new live range. When we remove the noop copy, update the available information by clearing the canClobber bit. llvm-svn: 32576
* Move findTiedToSrcOperand to TargetInstrDescriptor.Evan Cheng2006-12-081-2/+2
| | | | llvm-svn: 32366
* Proper fix for PR1037: to determine is a VR is a modref, check 1) whether it isEvan Cheng2006-12-081-2/+4
| | | | | | | tied to another oeprand, 2) whether is is being tied to by another operand. So the destination operand of a two-address MI can be correctly identified. llvm-svn: 32354
* Revision 1.83 causes PR1037.Reid Spencer2006-12-071-2/+1
| | | | | | Reverted. llvm-svn: 32305
* Changed llvm_ostream et all to OStream. llvm_cerr, llvm_cout, llvm_null, areBill Wendling2006-12-071-3/+3
| | | | | | now cerr, cout, and NullStream resp. llvm-svn: 32298
* MI keeps a ptr of TargetInstrDescriptor, use it.Evan Cheng2006-12-071-2/+3
| | | | llvm-svn: 32296
* getOperandConstraint returns -1 if the operand does have the specific ↵Evan Cheng2006-12-071-1/+1
| | | | | | constraint. This bug was causing excessive spills. llvm-svn: 32295
* Detemplatize the Statistic class. The only type it is instantiated withChris Lattner2006-12-061-6/+6
| | | | | | is 'unsigned'. llvm-svn: 32279
* Match TargetInstrInfo changes.Evan Cheng2006-12-011-4/+2
| | | | llvm-svn: 32098
* More removal of std::cerr and DEBUG, replacing with DOUT instead.Bill Wendling2006-11-171-38/+44
| | | | llvm-svn: 31806
* Fixed some spiller bugs exposed by the recent two-address code changes. NowEvan Cheng2006-11-041-21/+53
| | | | | | | | | there may be other def(s) apart from the use&def two-address operand. We need to check if the register reuse for a use&def operand may conflicts with another def. Provide a mean to recover from the conflict if it is detected when the defs are processed later. llvm-svn: 31439
* RenameEvan Cheng2006-11-011-1/+1
| | | | llvm-svn: 31364
* Two-address instructions no longer have to be A := A op C. Now any pair of ↵Evan Cheng2006-11-011-6/+10
| | | | | | dest / src operands can be tied together. llvm-svn: 31363
* restore my previous patch, now that the X86 backend bug has been fixed:Chris Lattner2006-10-121-17/+32
| | | | | | http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20061009/038518.html llvm-svn: 30906
* Backing out Chris' last commit. It's breaking llvm-gcc bootstrapping.Evan Cheng2006-10-121-32/+17
| | | | | | | | | | | | | It's turning: movl -24(%ebp), %esp subl $16, %esp movl -24(%ebp), %ecx into movl -24(%ebp), %esp subl $16, %esp movl %esp, (%esp) llvm-svn: 30902
* If we see a load from a stack slot into a physreg, consider it as providingChris Lattner2006-10-121-17/+32
| | | | | | the stack slot. This fixes PR943. llvm-svn: 30898
* Fix a long-standing wart in the code generator: two-address instruction loweringChris Lattner2006-09-051-55/+44
| | | | | | | | | | | | | | | actually *removes* one of the operands, instead of just assigning both operands the same register. This make reasoning about instructions unnecessarily complex, because you need to know if you are before or after register allocation to match up operand #'s with the target description file. Changing this also gets rid of a bunch of hacky code in various places. This patch also includes changes to fold loads into cmp/test instructions in the X86 backend, along with a significant simplification to the X86 spill folding code. llvm-svn: 30108
* s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|Chris Lattner2006-08-271-1/+1
| | | | llvm-svn: 29911
* Take advantage of the recent improvements to the liveintervals set (trackingChris Lattner2006-08-241-30/+10
| | | | | | | | | | | | | | | | | | | instructions which define each value#) to simplify and improve the coallescer. In particular, this patch: 1. Implements iterative coallescing. 2. Reverts an unsafe hack from handlePhysRegDef, superceeding it with a better solution. 3. Implements PR865, "coallescing" away the second copy in code like: A = B ... B = A This also includes changes to symbolically print registers in intervals when possible. llvm-svn: 29862
* Added a check so that if we have two machine instructions in this formBill Wendling2006-08-211-10/+30
| | | | | | | | | MOV R0, R1 MOV R1, R0 the second machine instruction is removed. Added a regression test. llvm-svn: 29792
* Eliminate data relocations by using NULL instead of global empty list.Jim Laskey2006-07-211-4/+6
| | | | llvm-svn: 29250
* Reduce number of exported symbolsAndrew Lenharth2006-07-201-7/+7
| | | | llvm-svn: 29220
* Shave another 27K off libllvmgcc.dylib with visibility hiddenChris Lattner2006-06-281-4/+7
| | | | llvm-svn: 28973
* Move some methods out of MachineInstr into MachineOperandChris Lattner2006-05-041-8/+8
| | | | llvm-svn: 28102
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