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* Fix a bug in dead spill slot elimination.Evan Cheng2008-02-271-0/+2
| | | | llvm-svn: 47687
* Final de-tabification.Bill Wendling2008-02-271-1/+1
| | | | llvm-svn: 47663
* Spiller now remove unused spill slots.Evan Cheng2008-02-271-17/+72
| | | | llvm-svn: 47657
* Rename PrintableName to Name.Bill Wendling2008-02-261-7/+7
| | | | llvm-svn: 47629
* Change "Name" to "AsmName" in the target register info. Gee, a refactoring toolBill Wendling2008-02-261-9/+9
| | | | | | would have been a Godsend here! llvm-svn: 47625
* De-tabify.Bill Wendling2008-02-261-1/+1
| | | | llvm-svn: 47598
* Make sure reload of implicit uses are issued before remat's.Evan Cheng2008-02-221-3/+15
| | | | llvm-svn: 47492
* Enable re-materialization of instructions which have virtual register ↵Evan Cheng2008-02-221-11/+32
| | | | | | | | operands if the definition of the operand also reaches its uses. llvm-svn: 47475
* Update gcc 4.3 warnings fix patch with recent head changesAnton Korobeynikov2008-02-201-1/+2
| | | | llvm-svn: 47368
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-52/+52
| | | | llvm-svn: 46930
* Forgot these files.Evan Cheng2008-02-081-1/+1
| | | | llvm-svn: 46896
* rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner2008-01-071-7/+7
| | | | | | | Make MachineInstr::getDesc return a reference instead of a pointer, since it can never be null. llvm-svn: 45695
* Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptorChris Lattner2008-01-071-1/+1
| | | | llvm-svn: 45680
* Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflectsChris Lattner2008-01-071-3/+3
| | | | | | | | | | | | | | | that it is cheap and efficient to get. Move a variety of predicates from TargetInstrInfo into TargetInstrDescriptor, which makes it much easier to query a predicate when you don't have TII around. Now you can use MI->getDesc()->isBranch() instead of going through TII, and this is much more efficient anyway. Not all of the predicates have been moved over yet. Update old code that used MI->getInstrDescriptor()->Flags to use the new predicates in many places. llvm-svn: 45674
* Update CodeGen for MRegisterInfo --> TargetInstrInfo changes.Owen Anderson2008-01-071-5/+5
| | | | llvm-svn: 45673
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-8/+12
| | | | llvm-svn: 45484
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-3/+3
| | | | | | Machine-level API cleanup instigated by Chris. llvm-svn: 45470
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-28/+30
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* More cleanups for MachineOperand:Chris Lattner2007-12-301-2/+2
| | | | | | | | | | - Eliminate the static "print" method for operands, moving it into MachineOperand::print. - Change various set* methods for register flags to take a bool for the value to set it to. Remove unset* methods. - Group methods more logically by operand flavor in MachineOperand.h llvm-svn: 45461
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* If deleting a reload instruction due to reuse (value is available in ↵Evan Cheng2007-12-111-2/+18
| | | | | | register R and reload is targeting R), make sure to invalidate the kill information of the last kill. llvm-svn: 44894
* MachineInstr can change. Store indexes instead.Evan Cheng2007-12-051-1/+1
| | | | llvm-svn: 44612
* If a split live interval is spilled again, remove the kill marker on its ↵Evan Cheng2007-12-051-1/+2
| | | | | | last use. llvm-svn: 44611
* Fix kill info for split intervals.Evan Cheng2007-12-051-3/+5
| | | | llvm-svn: 44609
* - Mark last use of a split interval as kill instead of letting spiller track it.Evan Cheng2007-12-051-2/+0
| | | | | | | | | This allows an important optimization to be re-enabled. - If all uses / defs of a split interval can be folded, give the interval a low spill weight so it would not be picked in case spilling is needed (avoid pushing other intervals in the same BB to be spilled). llvm-svn: 44601
* Add a argument to storeRegToStackSlot and storeRegToAddr to specify whetherEvan Cheng2007-12-051-11/+7
| | | | | | the stored register is killed. llvm-svn: 44600
* Remove a unsafe optimization. This fixes 401.bzip2.Evan Cheng2007-12-041-8/+0
| | | | llvm-svn: 44587
* Spiller unfold optimization bug: do not clobber a reusable stack slot value ↵Evan Cheng2007-12-041-10/+16
| | | | | | unless it can be modified. llvm-svn: 44575
* Bug fixes.Evan Cheng2007-12-031-7/+8
| | | | llvm-svn: 44549
* Update kill info for uses of split intervals.Evan Cheng2007-12-031-8/+15
| | | | llvm-svn: 44531
* Remove redundant foldMemoryOperand variants and other code clean up.Evan Cheng2007-12-021-14/+4
| | | | llvm-svn: 44517
* Fixed various live interval splitting bugs / compile time issues.Evan Cheng2007-11-291-47/+25
| | | | llvm-svn: 44428
* Recover compile time regression.Evan Cheng2007-11-281-21/+23
| | | | llvm-svn: 44386
* Live interval splitting:Evan Cheng2007-11-171-55/+143
| | | | | | | | | | | | | | | | | | | When a live interval is being spilled, rather than creating short, non-spillable intervals for every def / use, split the interval at BB boundaries. That is, for every BB where the live interval is defined or used, create a new interval that covers all the defs and uses in the BB. This is designed to eliminate one common problem: multiple reloads of the same value in a single basic block. Note, it does *not* decrease the number of spills since no copies are inserted so the split intervals are *connected* through spill and reloads (or rematerialization). The newly created intervals can be spilled again, in that case, since it does not span multiple basic blocks, it's spilled in the usual manner. However, it can reuse the same stack slot as the previously split interval. This is currently controlled by -split-intervals-at-bb. llvm-svn: 44198
* Clean up sub-register implementation by moving subReg information back toEvan Cheng2007-11-141-24/+11
| | | | | | | | | | | MachineOperand auxInfo. Previous clunky implementation uses an external map to track sub-register uses. That works because register allocator uses a new virtual register for each spilled use. With interval splitting (coming soon), we may have multiple uses of the same register some of which are of using different sub-registers from others. It's too fragile to constantly update the information. llvm-svn: 44104
* One more extract_subreg coalescing bug.Evan Cheng2007-11-021-5/+33
| | | | llvm-svn: 43644
* - Only perform the unfolding optimization when the folding in question is ↵Evan Cheng2007-10-221-5/+2
| | | | | | | | modref. - Remove a bogus assertion. llvm-svn: 43211
* Local spiller optimization:Evan Cheng2007-10-191-139/+243
| | | | | | | | | | | | | | | | Turn a store folding instruction into a load folding instruction. e.g. xorl %edi, %eax movl %eax, -32(%ebp) movl -36(%ebp), %eax orl %eax, -32(%ebp) => xorl %edi, %eax orl -36(%ebp), %eax mov %eax, -32(%ebp) This enables the unfolding optimization for a subsequent instruction which will also eliminate the newly introduced store instruction. llvm-svn: 43192
* Local spiller optimization: Evan Cheng2007-10-131-4/+50
| | | | | | | | | | | | | | | | | | | Turn this: movswl %ax, %eax movl %eax, -36(%ebp) xorl %edi, -36(%ebp) into movswl %ax, %eax xorl %edi, %eax movl %eax, -36(%ebp) by unfolding the load / store xorl into an xorl and a store when we know the value in the spill slot is available in a register. This doesn't change the number of instructions but reduce the number of times memory is accessed. Also unfold some load folding instructions and reuse the value when similar situation presents itself. llvm-svn: 42947
* EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG likeEvan Cheng2007-10-121-38/+70
| | | | | | | | | (almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. llvm-svn: 42899
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-3/+4
| | | | | | Tested with "make check"! llvm-svn: 42346
* Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman2007-09-141-6/+6
| | | | | | | isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. llvm-svn: 41958
* Add instruction dump output. This helps find bugs.David Greene2007-09-061-0/+6
| | | | llvm-svn: 41744
* If the source of a move is in spill slot, the reload may be folded to ↵Evan Cheng2007-08-151-13/+19
| | | | | | essentially a load from stack slot. It's ok to mark the stack slot value as available for reuse. But it should not be clobbered since the destination of the move is live. llvm-svn: 41109
* - If a def is dead, do not spill it.Evan Cheng2007-08-141-61/+115
| | | | | | | - If the defs of a spilled rematerializable MI are dead after the spill store is deleted, delete the def MI as well. llvm-svn: 41086
* If a MI's def is remat as well as spilled, and the store is later deemed ↵Evan Cheng2007-08-141-2/+29
| | | | | | dead, mark the def operand as isDead. llvm-svn: 41083
* If a spilled value is being reused and the use is a kill, that means there areEvan Cheng2007-08-141-18/+32
| | | | | | | no more uses within the MBB and the spilled value isn't live out of the MBB. Then it's safe to delete the spill store. llvm-svn: 41069
* If a rematerializable def is not deleted, i.e. it is also spilled, check if theEvan Cheng2007-08-141-11/+20
| | | | | | spilled value is available for reuse. llvm-svn: 41067
* Re-implement trivial rematerialization. This allows def MIs whose live ↵Evan Cheng2007-08-131-128/+118
| | | | | | intervals that are coalesced to be rematerialized. llvm-svn: 41060
* Missed a couple of places where new instructions are added due to spill / ↵Evan Cheng2007-07-111-67/+77
| | | | | | restore. llvm-svn: 39748
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