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* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-1/+2
| | | | | | doesn't have to guess. llvm-svn: 103194
* Move REG_SEQUENCE removal to 2addr pass.Evan Cheng2010-05-051-0/+68
| | | | llvm-svn: 103109
* Ignore dbg_value's.Evan Cheng2010-03-231-5/+7
| | | | llvm-svn: 99321
* Add MachineRegisterInfo::hasOneUse and hasOneNonDBGUse.Evan Cheng2010-03-031-6/+3
| | | | llvm-svn: 97663
* Swap parameters of isSafeToMove and isSafeToReMat for consistency.Evan Cheng2010-03-021-2/+2
| | | | llvm-svn: 97578
* Don't allow DBG_VALUE to affect codegen.Dale Johannesen2010-02-111-0/+3
| | | | llvm-svn: 95889
* Skip debug info in a couple of places.Dale Johannesen2010-02-101-3/+7
| | | | llvm-svn: 95814
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-12/+7
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Skip DEBUG_VALUE in some places where it was affecting codegen.Dale Johannesen2010-02-091-0/+4
| | | | llvm-svn: 95647
* Change errs() to dbgs().David Greene2010-01-051-12/+12
| | | | llvm-svn: 92565
* improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner2009-12-031-4/+4
| | | | | | Patch by Howard Hinnant! llvm-svn: 90365
* Fix PR5300.Jakob Stoklund Olesen2009-11-181-12/+5
| | | | | | | | When TwoAddressInstructionPass deletes a dead instruction, make sure that all register kills are accounted for. The 2-addr register does not get special treatment. llvm-svn: 89246
* - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.Evan Cheng2009-11-141-1/+1
| | | | | | | | - If destination is a physical register and it has a subreg index, use the sub-register instead. This fixes PR5423. llvm-svn: 88745
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-251-1/+0
| | | | | | VISIBILITY_HIDDEN removal. llvm-svn: 85043
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-2/+1
| | | | | | | Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. llvm-svn: 85042
* Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman2009-10-091-2/+6
| | | | | | | | | | | | | | is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. llvm-svn: 83687
* Overhaul the TwoAddressInstructionPass to simplify the logic, especiallyBob Wilson2009-09-031-159/+210
| | | | | | | | | | | | | | | | | for the complicated case where one register is tied to multiple destinations. This avoids the extra scan of instruction operands that was introduced by my recent change. I also pulled some code out into a separate TryInstructionTransform method, added more comments, and renamed some variables. Besides all those changes, this takes care of a FIXME in the code regarding an assumption about there being a single tied use of a register when converting to a 3-address form. I'm not aware of cases where that assumption is violated, but the code now only attempts to transform an instruction, either by commuting its operands or by converting to a 3-address form, for the simple case where there is a single pair of tied operands. llvm-svn: 80945
* Rearrange code to eliminate redundancy and avoid gotos.Bob Wilson2009-09-021-64/+40
| | | | llvm-svn: 80798
* Avoid calling removeVirtualRegisterKilled which iterates over the operandsBob Wilson2009-09-011-1/+2
| | | | | | to find the kill, since we already have the operand. llvm-svn: 80736
* Refactor some code into separate functions. No functional changes.Bob Wilson2009-09-011-52/+82
| | | | llvm-svn: 80733
* Move use of LV inside condition that guards for null LV.Bob Wilson2009-09-011-5/+5
| | | | llvm-svn: 80731
* Fix pr4843: When an instruction has multiple destination registers that areBob Wilson2009-09-011-11/+55
| | | | | | | | | tied to different source registers, the TwoAddressInstructionPass needs to be smarter. Change it to check before replacing a source register whether that source register is tied to a different destination register, and if so, defer handling it until a subsequent iteration. llvm-svn: 80654
* Use early exit and reduce indentation.Bob Wilson2009-08-311-157/+157
| | | | llvm-svn: 80631
* If the tied registers are already the same, there is no need to changeBob Wilson2009-08-311-5/+5
| | | | | | them. Move the code to make that change inside the conditional. llvm-svn: 80630
* remove some DOUTsChris Lattner2009-08-231-11/+11
| | | | llvm-svn: 79812
* Code clean up.Evan Cheng2009-08-071-4/+5
| | | | llvm-svn: 78360
* Use setPreservesAll and setPreservesCFG in CodeGen passes.Dan Gohman2009-07-311-0/+1
| | | | llvm-svn: 77754
* More migration to raw_ostream, the water has dried up around the iostream hole.Daniel Dunbar2009-07-251-1/+2
| | | | | | | | | | - Some clients which used DOUT have moved to DEBUG. We are deprecating the "magic" DOUT behavior which avoided calling printing functions when the statement was disabled. In addition to being unnecessary magic, it had the downside of leaving code in -Asserts builds, and of hiding potentially unnecessary computations. llvm-svn: 77019
* Use TII->findCommutedOpIndices to find the commute operands (rather than ↵Evan Cheng2009-07-201-4/+8
| | | | | | guessing). llvm-svn: 76472
* Let callers decide the sub-register index on the def operand of ↵Evan Cheng2009-07-161-1/+2
| | | | | | | | rematerialized instructions. Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right. llvm-svn: 75900
* Two-address pass should use findCommutedOpIndices to determine what ↵Evan Cheng2009-07-111-3/+10
| | | | | | registers are commuted. llvm-svn: 75317
* Eliminate VarInfo::UsedBlocks.Evan Cheng2009-05-261-5/+0
| | | | llvm-svn: 72411
* Fix for PR4124. Make TwoAddressFormPass::FindLastUseInMBB return the real ↵Lang Hames2009-05-141-2/+5
| | | | | | last use. llvm-svn: 71769
* Fix for PR4121. If TwoAddressInstructionPass removes a dead def, and the regBLang Hames2009-05-131-0/+6
| | | | | | operand was killed, the kill needs to be removed from regB's VarInfo. llvm-svn: 71635
* Avoid warning in release-asserts build.Mike Stump2009-05-081-0/+1
| | | | llvm-svn: 71275
* Fix for PR4051. When 2address pass delete an instruction, update kill info ↵Evan Cheng2009-04-281-8/+79
| | | | | | when necessary. llvm-svn: 70279
* Fix PR3934 part 2. findOnlyInterestingUse() was not setting IsCopy and ↵Evan Cheng2009-04-141-9/+13
| | | | | | IsDstPhys which are returned by value and used by callee. This happened to work on the earlier test cases because of a logic error in the caller side. llvm-svn: 69006
* PR3934: Fix a bogus two-address pass assertion.Evan Cheng2009-04-131-8/+10
| | | | llvm-svn: 68979
* Add an assertion to verify that a copy was actually emitted.Dan Gohman2009-04-131-1/+2
| | | | llvm-svn: 68953
* Implement support for using modeling implicit-zero-extension on x86-64Dan Gohman2009-04-081-3/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG instructions), and teach the DAGCombiner to take advantage of this on targets which support it. This eliminates many redundant zero-extension operations on x86-64. This adds a new TargetLowering hook, isZExtFree. It's similar to isTruncateFree, except it only applies to actual definitions, and not no-op truncates which may not zero the high bits. Also, this adds a new optimization to SimplifyDemandedBits: transform operations like x+y into (zext (add (trunc x), (trunc y))) on targets where all the casts are no-ops. In contexts where the high part of the add is explicitly masked off, this allows the mask operation to be eliminated. Fix the DAGCombiner to avoid undoing these transformations to eliminate casts on targets where the casts are no-ops. Also, this adds a new two-address lowering heuristic. Since two-address lowering runs before coalescing, it helps to be able to look through copies when deciding whether commuting and/or three-address conversion are profitable. Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle the case that a clobber range extended both before and beyond an existing live range. In that case, multiple live ranges need to be added. This was exposed by the new subreg coalescing code. Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the spiller behavior it was looking for no longer occurrs with the new instruction selection. llvm-svn: 68576
* Turn a 2-address instruction into a 3-address one when it's profitable even ↵Evan Cheng2009-03-301-21/+68
| | | | | | | | | | | | | if the two-address operand is killed. e.g. %reg1024<def> = MOV r1 %reg1025<def> = ADD %reg1024, %reg1026 r0 = MOV %reg1025 If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy. llvm-svn: 68065
* Model inline asm constraint which ties an input to an output register as ↵Evan Cheng2009-03-231-4/+5
| | | | | | machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. llvm-svn: 67512
* Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.Evan Cheng2009-03-191-6/+6
| | | | llvm-svn: 67335
* Minor optimization:Evan Cheng2009-03-011-29/+237
| | | | | | | | | | | Look for situations like this: %reg1024<def> = MOV r1 %reg1025<def> = MOV r0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 Commute the ADD to hopefully eliminate an otherwise unavoidable copy. llvm-svn: 65752
* If two-address def is dead and the instruction does not define other ↵Evan Cheng2009-02-211-0/+30
| | | | | | registers, and it doesn't produce side effects, just delete the instruction. llvm-svn: 65218
* Rename getAnalysisToUpdate to getAnalysisIfAvailable.Duncan Sands2009-01-281-1/+1
| | | | llvm-svn: 63198
* Teach 2addr pass to be do more commuting. If both uses of a two-address ↵Evan Cheng2009-01-251-6/+104
| | | | | | | | | | | | | | | | | | | | | instruction are killed, but the first operand has a use before and after the def, commute if the second operand does not suffer from the same issue. %reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1 %reg1029<def> = MOV8rr %reg1028 %reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead> insert => %reg1030<def> = MOV8rr %reg1028 %reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead> In this case, it might not be possible to coalesce the second MOV8rr instruction if the first one is coalesced. So it would be profitable to commute it: %reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1 %reg1029<def> = MOV8rr %reg1028 %reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead> insert => %reg1030<def> = MOV8rr %reg1029 %reg1030<def> = ADD8rr %reg1029<kill>, %reg1028<kill>, %EFLAGS<imp-def,dead> llvm-svn: 62954
* Refactor code. No functionality change.Evan Cheng2009-01-231-20/+38
| | | | llvm-svn: 62893
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-051-1/+1
| | | | llvm-svn: 61715
* Do the LiveVariables update before printing the instruction inDan Gohman2008-11-121-1/+2
| | | | | | | the debug output, so that the updated liveness flags are reflected in the debug output. llvm-svn: 59147
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