| Commit message (Collapse) | Author | Age | Files | Lines |
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checked and it is safe to proceed with the changes.
llvm-svn: 105304
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llvm-svn: 105066
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that are aliases of the specified register.
- Rename modifiesRegister to definesRegister since it's looking a def of the
specific register or one of its super-registers. It's not looking for def of a
sub-register or alias that could change the specified register.
- Added modifiesRegister to look for defs of aliases.
llvm-svn: 104377
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lowering REG_SEQUENCE instructions.
Insert copies for REG_SEQUENCE sources not killed to avoid breaking later passes.
llvm-svn: 104146
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REG_SEQUENCE instructions.
llvm-svn: 103994
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it with an IMPLICIT_DEF rather than deleting it or else it would be left without a def.
llvm-svn: 103984
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llvm-svn: 103971
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instructions.
e.g.
%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1027<def> = EXTRACT_SUBREG %reg1026, 6
%reg1028<def> = EXTRACT_SUBREG %reg1026<kill>, 5
...
%reg1029<def> = REG_SEQUENCE %reg1028<kill>, 5, %reg1027<kill>, 6, %reg1028, 7, %reg1027, 8, %reg1028, 9, %reg1027, 10, %reg1030<kill>, 11, %reg1032<kill>, 12
After REG_SEQUENCE is eliminated, we are left with:
%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1029:6<def> = EXTRACT_SUBREG %reg1026, 6
%reg1029:5<def> = EXTRACT_SUBREG %reg1026<kill>, 5
The regular coalescer will not be able to coalesce reg1026 and reg1029 because it doesn't
know how to combine sub-register indices 5 and 6. Now 2-address pass will consult the
target whether sub-registers 5 and 6 of reg1026 can be combined to into a larger
sub-register (or combined to be reg1026 itself as is the case here). If it is possible,
it will be able to replace references of reg1026 with reg1029 + the larger sub-register
index.
llvm-svn: 103835
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information when a copy is introduced.
llvm-svn: 103680
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llvm-svn: 103538
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llvm-svn: 103449
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llvm-svn: 103435
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doesn't have to guess.
llvm-svn: 103194
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llvm-svn: 103109
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llvm-svn: 99321
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llvm-svn: 97663
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llvm-svn: 97578
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llvm-svn: 95889
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llvm-svn: 95814
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into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
llvm-svn: 95687
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llvm-svn: 95647
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llvm-svn: 92565
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Patch by Howard Hinnant!
llvm-svn: 90365
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When TwoAddressInstructionPass deletes a dead instruction, make sure that all
register kills are accounted for. The 2-addr register does not get special
treatment.
llvm-svn: 89246
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- If destination is a physical register and it has a subreg index, use the
sub-register instead.
This fixes PR5423.
llvm-svn: 88745
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VISIBILITY_HIDDEN removal.
llvm-svn: 85043
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Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
llvm-svn: 85042
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is trivially rematerializable and integrate it into
TargetInstrInfo::isTriviallyReMaterializable. This way, all places that
need to know whether an instruction is rematerializable will get the
same answer.
This enables the useful parts of the aggressive-remat option by
default -- using AliasAnalysis to determine whether a memory location
is invariant, and removes the questionable parts -- rematting operations
with virtual register inputs that may not be live everywhere.
llvm-svn: 83687
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for the complicated case where one register is tied to multiple destinations.
This avoids the extra scan of instruction operands that was introduced by
my recent change. I also pulled some code out into a separate
TryInstructionTransform method, added more comments, and renamed some
variables.
Besides all those changes, this takes care of a FIXME in the code regarding
an assumption about there being a single tied use of a register when
converting to a 3-address form. I'm not aware of cases where that assumption
is violated, but the code now only attempts to transform an instruction,
either by commuting its operands or by converting to a 3-address form,
for the simple case where there is a single pair of tied operands.
llvm-svn: 80945
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llvm-svn: 80798
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to find the kill, since we already have the operand.
llvm-svn: 80736
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llvm-svn: 80733
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llvm-svn: 80731
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tied to different source registers, the TwoAddressInstructionPass needs to
be smarter. Change it to check before replacing a source register whether
that source register is tied to a different destination register, and if so,
defer handling it until a subsequent iteration.
llvm-svn: 80654
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llvm-svn: 80631
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them. Move the code to make that change inside the conditional.
llvm-svn: 80630
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llvm-svn: 79812
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llvm-svn: 78360
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llvm-svn: 77754
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- Some clients which used DOUT have moved to DEBUG. We are deprecating the
"magic" DOUT behavior which avoided calling printing functions when the
statement was disabled. In addition to being unnecessary magic, it had the
downside of leaving code in -Asserts builds, and of hiding potentially
unnecessary computations.
llvm-svn: 77019
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guessing).
llvm-svn: 76472
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rematerialized instructions.
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.
llvm-svn: 75900
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registers are commuted.
llvm-svn: 75317
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llvm-svn: 72411
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last use.
llvm-svn: 71769
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operand was killed, the kill needs to be removed from regB's VarInfo.
llvm-svn: 71635
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llvm-svn: 71275
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when necessary.
llvm-svn: 70279
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IsDstPhys which are returned by value and used by callee. This happened to work on the earlier test cases because of a logic error in the caller side.
llvm-svn: 69006
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llvm-svn: 68979
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