| Commit message (Collapse) | Author | Age | Files | Lines |
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- Some clients which used DOUT have moved to DEBUG. We are deprecating the
"magic" DOUT behavior which avoided calling printing functions when the
statement was disabled. In addition to being unnecessary magic, it had the
downside of leaving code in -Asserts builds, and of hiding potentially
unnecessary computations.
llvm-svn: 77019
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guessing).
llvm-svn: 76472
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rematerialized instructions.
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.
llvm-svn: 75900
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registers are commuted.
llvm-svn: 75317
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llvm-svn: 72411
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last use.
llvm-svn: 71769
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operand was killed, the kill needs to be removed from regB's VarInfo.
llvm-svn: 71635
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llvm-svn: 71275
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when necessary.
llvm-svn: 70279
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IsDstPhys which are returned by value and used by callee. This happened to work on the earlier test cases because of a logic error in the caller side.
llvm-svn: 69006
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llvm-svn: 68979
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llvm-svn: 68953
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with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.
This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.
Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.
Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.
Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.
Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.
llvm-svn: 68576
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if the two-address operand is killed.
e.g.
%reg1024<def> = MOV r1
%reg1025<def> = ADD %reg1024, %reg1026
r0 = MOV %reg1025
If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy.
llvm-svn: 68065
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machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
llvm-svn: 67512
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llvm-svn: 67335
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Look for situations like this:
%reg1024<def> = MOV r1
%reg1025<def> = MOV r0
%reg1026<def> = ADD %reg1024, %reg1025
r0 = MOV %reg1026
Commute the ADD to hopefully eliminate an otherwise unavoidable copy.
llvm-svn: 65752
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registers, and it doesn't produce side effects, just delete the instruction.
llvm-svn: 65218
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llvm-svn: 63198
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instruction are killed, but the first operand has a use before and after the def, commute if the second operand does not suffer from the same issue.
%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1
%reg1029<def> = MOV8rr %reg1028
%reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>
insert => %reg1030<def> = MOV8rr %reg1028
%reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead>
In this case, it might not be possible to coalesce the second MOV8rr
instruction if the first one is coalesced. So it would be profitable to
commute it:
%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1
%reg1029<def> = MOV8rr %reg1028
%reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>
insert => %reg1030<def> = MOV8rr %reg1029
%reg1030<def> = ADD8rr %reg1029<kill>, %reg1028<kill>, %EFLAGS<imp-def,dead>
llvm-svn: 62954
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llvm-svn: 62893
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llvm-svn: 61715
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the debug output, so that the updated liveness flags are
reflected in the debug output.
llvm-svn: 59147
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llvm-svn: 57259
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isReg, etc., from isRegister, etc.
llvm-svn: 57006
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llvm-svn: 55779
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llvm-svn: 55434
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llvm-svn: 55430
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propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.
llvm-svn: 53097
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instructionChanged. That is, it only update the VarInfo.kills if the new instruction is known to have the correct dead and kill markers.
- CommuteInstruction copies kill / dead markers over to new instruction. So use replaceKillInstruction instead.
llvm-svn: 53061
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TargetInstrInfo::convertToThreeAddressInstruction
Also, if LV isn't around, then TwoAddr doesn't need to be updating flags, since they won't have been set in the first place.
llvm-svn: 53058
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needs to update it if it's already around.
llvm-svn: 53049
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llvm-svn: 52920
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llvm-svn: 52701
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llvm-svn: 52487
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a win.
llvm-svn: 52452
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like.
llvm-svn: 51662
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that it's safe to remat an instruction.
llvm-svn: 51659
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before deleting the instruction.
llvm-svn: 51609
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Running /Users/void/llvm/llvm.src/test/CodeGen/X86/dg.exp ...
FAIL: /Users/void/llvm/llvm.src/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
Failed with exit(1) at line 1
while running: llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll | llc -march=x86 -mattr=+sse2 -stats |& grep {1 .*folded into instructions}
child process exited abnormally
Make this conditional for now.
llvm-svn: 51563
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LBB1_3: # bb
...
xorl %ebp, %ebp
subl (%ebx), %ebp
...
incl %ecx
cmpl %edi, %ecx
jl LBB1_3 # bb
Whe using machine LICM, LLVM converts it into:
xorl %esi, %esi
LBB1_3: # bb
...
movl %esi, %ebp
subl (%ebx), %ebp
...
incl %ecx
cmpl %edi, %ecx
jl LBB1_3 # bb
Two address conversion inserts the copy instruction. However, it's cheaper to
rematerialize it, and remat helps reduce register pressure.
llvm-svn: 51562
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address of the PassInfo directly instead of calling getPassInfo.
This eliminates a bunch of dynamic initializations of static data.
Also, fold RegisterPassBase into PassInfo, make a bunch of its
data members const, and rearrange some code to initialize data
members in constructors instead of using setter member functions.
llvm-svn: 51022
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several things that were neither in an anonymous namespace nor static
but not intended to be global.
llvm-svn: 51017
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- Comment fixes.
- Moar whitespace.
- Made ivars "private" by default.
No functionality change.
llvm-svn: 50926
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llvm-svn: 48853
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llvm-svn: 48337
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more than one instructions.
llvm-svn: 48336
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llvm-svn: 48334
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instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one.
llvm-svn: 48333
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findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.
llvm-svn: 47927
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