| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | GlobalISel: Remove unsigned variant of SrcOp | Matt Arsenault | 2019-06-24 | 1 | -9/+9 |
| | | | | | | | | | | Force using Register. One downside is the generated register enums require explicit conversion. llvm-svn: 364194 | ||||
| * | CodeGen: Introduce a class for registers | Matt Arsenault | 2019-06-24 | 1 | -3/+3 |
| | | | | | | | | | | Avoids using a plain unsigned for registers throughoug codegen. Doesn't attempt to change every register use, just something a little more than the set needed to build after changing the return type of MachineOperand::getReg(). llvm-svn: 364191 | ||||
| * | CodeGen: factor out swifterror value tracking. | Tim Northover | 2019-05-24 | 1 | -0/+312 |
| llvm-svn: 361607 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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