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path: root/llvm/lib/CodeGen/SimpleRegisterCoalescing.h
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* ReMaterializeTrivialDef need to trim the live interval to the last kill if ↵Evan Cheng2009-02-051-0/+9
| | | | | | the copy kills the source register. This fixes uint64tof64.ll after ARM::MOVi is marked as isAsCheapAsAMove. llvm-svn: 63853
* Cross register class coalescing. Not yet enabled.Evan Cheng2009-01-231-15/+8
| | | | llvm-svn: 62832
* Refactor code. No functionality change.Evan Cheng2009-01-201-0/+14
| | | | llvm-svn: 62573
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-051-2/+0
| | | | llvm-svn: 61715
* Remove val# defined by a remat'ed def that is now dead.Evan Cheng2008-10-271-0/+5
| | | | llvm-svn: 58294
* Re-materalized definition instructions may be dead. Whack them.Evan Cheng2008-09-191-0/+4
| | | | llvm-svn: 56352
* Fix PR2748. Avoid coalescing physical register with virtual register which ↵Evan Cheng2008-09-111-0/+7
| | | | | | | | | | | would create illegal extract_subreg. e.g. vr1024 = extract_subreg vr1025, 1 ... vr1024 = mov8rr AH If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH. llvm-svn: 56118
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55779
* Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer ↵Evan Cheng2008-08-301-0/+7
| | | | | | the implicit defs onto the remat'ed instruction. llvm-svn: 55564
* Revert r55467; it causes regressions in UnitTests/Vector/divides,Dan Gohman2008-08-281-7/+0
| | | | | | Benchmarks/sim/sim, and others on x86-64. llvm-svn: 55475
* If a copy isn't coalesced, but its src is defined by trivial computation. ↵Evan Cheng2008-08-281-0/+7
| | | | | | Re-materialize the src to replace the copy. llvm-svn: 55467
* Fix a compile-time regression introduced by my heuristic-changing patch. I ↵Owen Anderson2008-07-231-1/+2
| | | | | | | | | forgot to multiply the instruction count by a constant factor in a few places, which caused the register allocator to require many more iterations. llvm-svn: 53959
* Change the heuristics used in the coalescer, register allocator, and withinOwen Anderson2008-07-221-1/+1
| | | | | | | live intervals itself to use an instruction count approximation that is not affected by inserting empty indices. llvm-svn: 53937
* Coalesce copy from one register class to a sub register class. e.g. ↵Evan Cheng2008-06-191-3/+13
| | | | | | X86::MOV16to16_. llvm-svn: 52480
* The coalescer doesn't need LiveVariables now that we have register use ↵Owen Anderson2008-05-301-1/+0
| | | | | | iterators. llvm-svn: 51790
* After reading memory that's already freed.Evan Cheng2008-04-161-4/+4
| | | | llvm-svn: 49810
* Add comment.Evan Cheng2008-04-101-0/+2
| | | | llvm-svn: 49469
* - More aggressively coalescing away copies whose source is defined by an ↵Evan Cheng2008-04-091-2/+20
| | | | | | | | implicit_def. - Added insert_subreg coalescing support. llvm-svn: 49448
* - Turn copies of implicit_def into implicit_def instructions.Evan Cheng2008-04-031-0/+6
| | | | | | - Be smarter about coalescing copies from implicit_def. llvm-svn: 49168
* Rewrite code that propagate isDead information after a dead copy is ↵Evan Cheng2008-03-181-1/+5
| | | | | | coalesced. This remove some ugly spaghetti code and fixed a number of subtle bugs. llvm-svn: 48490
* - Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where ↵Evan Cheng2008-03-101-0/+4
| | | | | | | | | | | | | | | | | | the source is defined; BLR is the live range which is defined by the copy. If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g. A = or A, B ... B = A ... C = A<kill> ... = B then do not add kills of A to the newly created B interval. - Also fix some kill info update bug. llvm-svn: 48141
* Fix a coalescer bug wrt how dead copy interval is shortened.Evan Cheng2008-03-051-0/+6
| | | | llvm-svn: 47966
* Refactor code. Remove duplicated functions that basically do the same thing asEvan Cheng2008-03-051-4/+0
| | | | | | findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies. llvm-svn: 47927
* No need for coalescer to update kills. Only copies are coalesced and those ↵Evan Cheng2008-02-291-8/+0
| | | | | | instructions will be deleted. Doh. llvm-svn: 47749
* Refactor some code; check if commuteInstruction is able to commute the ↵Evan Cheng2008-02-161-0/+5
| | | | | | instruction. llvm-svn: 47208
* - Removing the infamous r2rMap_ and rep() method. Now the coalescer will updateEvan Cheng2008-02-151-51/+26
| | | | | | | register defs and uses after each successful coalescing. - Also removed a number of hacks and fixed some subtle kill information bugs. llvm-svn: 47167
* Initial support for copy elimination by commuting its definition MI.Evan Cheng2008-02-131-1/+8
| | | | | | | | | | | | | | | | | | | | | PR1877. A3 = op A2 B0<kill> ... B1 = A3 <- this copy ... = op A3 <- more uses ==> B2 = op B0 A2<kill> ... B1 = B2 <- now an identify copy ... = op B2 <- more uses This speeds up FreeBench/neural by 29%, Olden/bh by 12%, oopack_v1p8 by 53%. llvm-svn: 47046
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-2/+2
| | | | llvm-svn: 46930
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Add explicit keywords, and fix a minor typo that they uncovered.Dan Gohman2007-12-141-2/+3
| | | | llvm-svn: 45034
* Switch over to MachineLoopInfo.Evan Cheng2007-12-111-2/+2
| | | | llvm-svn: 44838
* First step towards moving the coalescer to priority_queue based machinery.Evan Cheng2007-11-061-16/+70
| | | | llvm-svn: 43764
* Move SimpleRegisterCoalescing.h to lib/CodeGen since there is now a commonEvan Cheng2007-11-051-0/+184
register coalescer interface: RegisterCoalescing. llvm-svn: 43714
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