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path: root/llvm/lib/CodeGen/SimpleRegisterCoalescing.h
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* Extract physreg joining policy to a separate method.Jakob Stoklund Olesen2011-04-041-0/+3
| | | | llvm-svn: 128844
* Mark all uses as <undef> when joining a copy.Jakob Stoklund Olesen2011-03-311-0/+3
| | | | | | | | | | | | This way, shrinkToUses() will ignore the instruction that is about to be deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like. Fix a misunderstanding in MachineVerifier about <def,undef> operands. The <undef> flag is valid on def operands where it has the same meaning as <undef> on a use operand. It only applies to sub-register defines which also read the full register. llvm-svn: 128642
* Delete dead code.Jakob Stoklund Olesen2011-03-091-10/+0
| | | | llvm-svn: 127295
* Add LiveIntervals::shrinkToUses().Jakob Stoklund Olesen2011-02-081-2/+4
| | | | | | | | After uses of a live range are removed, recompute the live range to only cover the remaining uses. This is necessary after rematerializing the value before some (but not all) uses. llvm-svn: 125058
* Implement the first half of LiveDebugVariables.Jakob Stoklund Olesen2010-12-021-1/+2
| | | | | | | | | | | | | | | | | | | Scan the MachineFunction for DBG_VALUE instructions, and replace them with a data structure similar to LiveIntervals. The live range of a DBG_VALUE is determined by propagating it down the dominator tree until a new DBG_VALUE is found. When a DBG_VALUE lives in a register, its live range is confined to the live range of the register's value. LiveDebugVariables runs before coalescing, so DBG_VALUEs are not artificially extended when registers are joined. The missing half will recreate DBG_VALUE instructions from the intervals when register allocation is complete. The pass is disabled by default. It can be enabled with the temporary command line option -live-debug-variables. llvm-svn: 120636
* Get rid of static constructors for pass registration. Instead, every pass ↵Owen Anderson2010-10-191-1/+3
| | | | | | | | | | | | | | | | | exposes an initializeMyPassFunction(), which must be called in the pass's constructor. This function uses static dependency declarations to recursively initialize the pass's dependencies. Clients that only create passes through the createFooPass() APIs will require no changes. Clients that want to use the CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h before parsing commandline arguments. I have tested this with all standard configurations of clang and llvm-gcc on Darwin. It is possible that there are problems with the static dependencies that will only be visible with non-standard options. If you encounter any crash in pass registration/creation, please send the testcase to me directly. llvm-svn: 116820
* Transpose the calculation of spill weights such that we are calculating oneJakob Stoklund Olesen2010-08-101-1/+0
| | | | | | | | | | | | | | register at a time. This turns out to be slightly faster than iterating over instructions, but more importantly, it allows us to compute spill weights for new registers created after the spill weight pass has run. Also compute the allocation hint at the same time as the spill weight. This allows us to use the spill weight as a cost metric for copies, and choose the most profitable hint if there is more than one possibility. The new hints provide a very small (< 0.1%) but universal code size improvement. llvm-svn: 110631
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110460
* Revert r110396 to fix buildbots.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110410
* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-051-1/+1
| | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. llvm-svn: 110396
* Be more forgiving when calculating alias interference for physreg coalescing.Jakob Stoklund Olesen2010-07-061-2/+1
| | | | | | | | | | | | It is OK for an alias live range to overlap if there is a copy to or from the physical register. CoalescerPair can work out if the copy is coalescable independently of the alias. This means that we can join with the actual destination interval instead of using the getOrigDstReg() hack. It is no longer necessary to merge clobber ranges into subregisters. llvm-svn: 107695
* Teach AdjustCopiesBackFrom to also use CoalescerPair to identify compatible ↵Jakob Stoklund Olesen2010-06-241-2/+1
| | | | | | copies. llvm-svn: 106780
* Replace a big gob of old coalescer logic with the new CoalescerPair class.Jakob Stoklund Olesen2010-06-241-32/+9
| | | | | | | | | | CoalescerPair can determine if a copy can be coalesced, and which register gets merged away. The old logic in SimpleRegisterCoalescing had evolved into something a bit too convoluted. This second attempt fixes some crashes that only occurred Linux. llvm-svn: 106769
* Revert "Replace a big gob of old coalescer logic with the new CoalescerPair ↵Jakob Stoklund Olesen2010-06-241-5/+13
| | | | | | | | class." Whiny buildbots. llvm-svn: 106710
* Replace a big gob of old coalescer logic with the new CoalescerPair class.Jakob Stoklund Olesen2010-06-241-13/+5
| | | | | | | | CoalescerPair can determine if a copy can be coalesced, and which register gets merged away. The old logic in SimpleRegisterCoalescing had evolved into something a bit too convoluted. llvm-svn: 106701
* Remove the SimpleJoin optimization from SimpleRegisterCoalescing.Jakob Stoklund Olesen2010-06-221-36/+1
| | | | | | | | | Measurements show that it does not speed up coalescing, so there is no reason the keep the added complexity around. Also clean out some unused methods and static functions. llvm-svn: 106548
* Add CoalescerPair helper class.Jakob Stoklund Olesen2010-06-151-7/+7
| | | | | | | | | | | | | | | | | | | | Given a copy instruction, CoalescerPair can determine which registers to coalesce in order to eliminate the copy. It deals with all the subreg fun to determine a tuple (DstReg, SrcReg, SubIdx) such that: - SrcReg is a virtual register that will disappear after coalescing. - DstReg is a virtual or physical register whose live range will be extended. - SubIdx is 0 when DstReg is a physical register. - SrcReg can be joined with DstReg:SubIdx. CoalescerPair::isCoalescable() determines if another copy instruction is compatible with the same tuple. This fixes some NEON miscompilations where shuffles are getting coalesced as if they were copies. The CoalescerPair class will replace a lot of the spaghetti logic in JoinCopy later. llvm-svn: 105997
* Slightly verboser debug spew from coalescerJakob Stoklund Olesen2010-04-291-2/+0
| | | | llvm-svn: 102663
* Recompute kill flags from live intervals after coalescing instead of trying toJakob Stoklund Olesen2010-04-281-4/+0
| | | | | | | | | | | update them. Computing kill flags is notoriously difficult, and the coalescer would get it wrong sometimes, and it would completely skip physical registers. Now we simply remove kill flags based on the live intervals after coalescing. This is a few percent slower, but now we get correct kill flags for physical registers after coalescing. llvm-svn: 102510
* - Clean up some crappy code which deals with coalescing of copies which look atEvan Cheng2010-04-211-2/+5
| | | | | | | extract_subreg / insert_subreg, etc. - Add support for more aggressive insert_subreg coalescing. llvm-svn: 101971
* Fix a bunch of little errors that Clang complains about when its being pedanticDouglas Gregor2009-12-191-2/+2
| | | | llvm-svn: 91764
* Moved spill weight calculation out of SimpleRegisterCoalescing and into its ↵Lang Hames2009-12-141-4/+0
| | | | | | own pass: CalculateSpillWeights. llvm-svn: 91273
* The Indexes Patch.Lang Hames2009-11-031-5/+4
| | | | | | | | | | | | | | | | This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. llvm-svn: 85979
* Stop the iterator in ValueLiveAt from potentially running off the end of the ↵Lang Hames2009-10-301-1/+2
| | | | | | interval. llvm-svn: 85599
* Reapply r85338.Bill Wendling2009-10-291-0/+5
| | | | llvm-svn: 85514
* Reverting r85338 for now. It's causing a bootstrap failure on PPC darwin9.Bill Wendling2009-10-291-5/+0
| | | | | | | | --- Reverse-merging r85338 into '.': U lib/CodeGen/SimpleRegisterCoalescing.cpp U lib/CodeGen/SimpleRegisterCoalescing.h llvm-svn: 85454
* Fixed a bug in the coalescer where intervals were occasionally merged ↵Lang Hames2009-10-271-0/+5
| | | | | | despite a real interference. This fixes rdar://problem/7157961. llvm-svn: 85338
* Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman2009-10-091-0/+1
| | | | | | | | | | | | | | is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. llvm-svn: 83687
* Renamed MachineInstrIndex to LiveIndex.Lang Hames2009-10-031-4/+4
| | | | llvm-svn: 83254
* Clean up spill weight computation. Also some changes to give loop inductionEvan Cheng2009-09-211-6/+7
| | | | | | | | | | variable increment / decrement slighter high priority. This has major impact on some micro-benchmarks. On MultiSource/Applications and spec tests, it's a minor win. It also reduce 256.bzip instruction count by 8%, 55 on 164.gzip on i386 / Darwin. llvm-svn: 82485
* Remove -new-coalescer-heuristic. It's not useful.Evan Cheng2009-09-121-56/+2
| | | | llvm-svn: 81600
* Replaces uses of unsigned for indexes in LiveInterval and VNInfo withLang Hames2009-09-041-3/+6
| | | | | | | | a new class, MachineInstrIndex, which hides arithmetic details from most clients. This is a step towards allowing the register allocator to update/insert code during allocation. llvm-svn: 81040
* Change Pass::print to take a raw ostream instead of std::ostream,Chris Lattner2009-08-231-4/+1
| | | | | | update all code that this affects. llvm-svn: 79830
* Simplify some more.Evan Cheng2009-07-171-6/+0
| | | | llvm-svn: 76239
* Simplify the coalescer (finally!) by making ↵Evan Cheng2009-07-171-4/+0
| | | | | | LiveIntervals::processImplicitDefs a little more aggressive and teaching liveintervals to make use of isUndef marker on MachineOperands. llvm-svn: 76223
* Let callers decide the sub-register index on the def operand of ↵Evan Cheng2009-07-161-1/+1
| | | | | | | | rematerialized instructions. Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right. llvm-svn: 75900
* Rename RemoveCopiesFromValNo to TurnCopiesFromValNoToImpDefs.Evan Cheng2009-06-161-4/+4
| | | | llvm-svn: 73479
* Update to in-place spilling framework. Includes live interval scaling and ↵Lang Hames2009-06-021-1/+1
| | | | | | trivial rewriter. llvm-svn: 72729
* Add a smarter heuristic to determine when to coalesce a virtual register ↵Evan Cheng2009-04-301-0/+12
| | | | | | | | with a physical one. More specifically, it avoid tying a virtual register in the loop with a physical register defined / used outside the loop. When it determines it's not profitable, it will use the physical register as the allocation preference instead. This is *not* turned on by default. Testing indicates this is just as likely to pessimize code. The main issue seems to be allocation preference doesn't work effectively. That will change once I've taught register allocator "swapping". llvm-svn: 70503
* ReMaterializeTrivialDef need to trim the live interval to the last kill if ↵Evan Cheng2009-02-051-0/+9
| | | | | | the copy kills the source register. This fixes uint64tof64.ll after ARM::MOVi is marked as isAsCheapAsAMove. llvm-svn: 63853
* Cross register class coalescing. Not yet enabled.Evan Cheng2009-01-231-15/+8
| | | | llvm-svn: 62832
* Refactor code. No functionality change.Evan Cheng2009-01-201-0/+14
| | | | llvm-svn: 62573
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-051-2/+0
| | | | llvm-svn: 61715
* Remove val# defined by a remat'ed def that is now dead.Evan Cheng2008-10-271-0/+5
| | | | llvm-svn: 58294
* Re-materalized definition instructions may be dead. Whack them.Evan Cheng2008-09-191-0/+4
| | | | llvm-svn: 56352
* Fix PR2748. Avoid coalescing physical register with virtual register which ↵Evan Cheng2008-09-111-0/+7
| | | | | | | | | | | would create illegal extract_subreg. e.g. vr1024 = extract_subreg vr1025, 1 ... vr1024 = mov8rr AH If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH. llvm-svn: 56118
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55779
* Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer ↵Evan Cheng2008-08-301-0/+7
| | | | | | the implicit defs onto the remat'ed instruction. llvm-svn: 55564
* Revert r55467; it causes regressions in UnitTests/Vector/divides,Dan Gohman2008-08-281-7/+0
| | | | | | Benchmarks/sim/sim, and others on x86-64. llvm-svn: 55475
* If a copy isn't coalesced, but its src is defined by trivial computation. ↵Evan Cheng2008-08-281-0/+7
| | | | | | Re-materialize the src to replace the copy. llvm-svn: 55467
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