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path: root/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
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* Coalescer should not delete copy instructions whose defs are partially dead. ↵Evan Cheng2010-04-081-1/+1
| | | | | | | | e.g. %RDI<def,dead> = MOV64rr %RAX<kill>, %EDI<imp-def> llvm-svn: 100804
* Try trivial remat before the coalescer gives up on a vr / physreg coalescing ↵Evan Cheng2010-03-261-1/+7
| | | | | | for fear of tying up a physical register. llvm-svn: 99575
* Code clean up.Evan Cheng2010-03-251-11/+10
| | | | llvm-svn: 99544
* Remove an unused option.Evan Cheng2010-03-251-59/+29
| | | | llvm-svn: 99537
* Avoid being influenced by dbg_value instructions.Evan Cheng2010-03-251-1/+1
| | | | llvm-svn: 99465
* Free SavedLI even if SimpleRegisterCoalescing::JoinCopy() returns early.Jeffrey Yasskin2010-03-211-4/+5
| | | | llvm-svn: 99113
* Revert "Change coalescer complexity from N^2 to N logN by changing one letter."Jakob Stoklund Olesen2010-03-181-1/+12
| | | | | | This reverts commit 98776. It broke the llvm-gcc boot strap. llvm-svn: 98784
* Change coalescer complexity from N^2 to N logN by changing one letter.Jakob Stoklund Olesen2010-03-171-12/+1
| | | | | | | | | Remove ugly hack that aborted the coalescer before using N^2 time. This affects functions with very complicated live intervals for physical registers, i.e. functions with thousands of function calls. llvm-svn: 98776
* The check for coalescing a virtual register to a physical register, e.g.Evan Cheng2010-03-111-7/+18
| | | | | | | | | cl = EXTRACT_SUBREG reg1024, 1, is overly conservative. It should check for overlaps of vr's live interval with the super registers of the physical register (ECX in this case) and let JoinIntervals() handle checking the coalescing feasibility against the physical register (cl in this case). llvm-svn: 98251
* Disable physical register coalescing when the number of live ranges for theJakob Stoklund Olesen2010-03-091-0/+12
| | | | | | | | | | | | | physreg becomes ridiculously high. std::upper_bound may be log(N), but for sufficiently large live intervals, it becomes log(N)*cachemiss = a long long time. This patch improves coalescer time by 4500x for a function with 20000 function calls. The generated code is different, but not significantly worse - the allocator hints are almost as good as physreg coalescing anyway. llvm-svn: 98023
* Swap parameters of isSafeToMove and isSafeToReMat for consistency.Evan Cheng2010-03-021-1/+1
| | | | llvm-svn: 97578
* Remember to handle sub-registers when moving imp-defs to a rematted instruction.Jakob Stoklund Olesen2010-02-231-2/+17
| | | | llvm-svn: 96995
* Enable assertion to detect cyclic valno references.Jakob Stoklund Olesen2010-02-211-1/+1
| | | | | | This changes the stack overflow in PR6363 to an assertion failure. llvm-svn: 96744
* Fix PR6283.Jakob Stoklund Olesen2010-02-131-4/+22
| | | | | | | | | | | When coalescing with a physreg, remember to add imp-def and imp-kill when dealing with sub-registers. Also fix a related bug in VirtRegRewriter where substitutePhysReg may reallocate the operand list on an instruction and invalidate the reg_iterator. This can happen when a register is mentioned twice on the same instruction. llvm-svn: 96072
* Reapply coalescer fix for better cross-class coalescing.Jakob Stoklund Olesen2010-02-111-1/+1
| | | | | | This time with fixed test cases. llvm-svn: 95938
* Revert functional change. This broke a bunch of tests.Jakob Stoklund Olesen2010-02-111-1/+1
| | | | llvm-svn: 95921
* It is always good to do a cross-class join when the large register has a ↵Jakob Stoklund Olesen2010-02-111-6/+11
| | | | | | | | tiny interval. Also avoid division by zero. llvm-svn: 95917
* Ignore debug info one more place during coalescing.Dale Johannesen2010-02-101-0/+2
| | | | llvm-svn: 95819
* Fix "the the" and similar typos.Dan Gohman2010-02-101-1/+1
| | | | llvm-svn: 95781
* Skip DBG_VALUE many places in live intervals andDale Johannesen2010-02-101-17/+26
| | | | | | | | | register coalescing. This fixes many crashes and places where debug info affects codegen (when dbg.value is lowered to machine instructions, which it isn't yet in TOT). llvm-svn: 95739
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-18/+14
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Remember to update live-in lists when coalescing physregs.Jakob Stoklund Olesen2010-02-091-0/+17
| | | | | | Patch by M Wahab! llvm-svn: 95668
* Change errs() to dbgs().David Greene2010-01-051-64/+63
| | | | llvm-svn: 92592
* Add coalescer asserts.Jakob Stoklund Olesen2009-12-221-4/+6
| | | | llvm-svn: 91945
* Changed slot index ranges for MachineBasicBlocks to be exclusive of endpoint.Lang Hames2009-12-221-2/+2
| | | | | | This fixes an in-place update bug where code inserted at the end of basic blocks may not be covered by existing intervals which were live across the entire block. It is also consistent with the way ranges are specified for live intervals. llvm-svn: 91859
* Moved spill weight calculation out of SimpleRegisterCoalescing and into its ↵Lang Hames2009-12-141-110/+0
| | | | | | own pass: CalculateSpillWeights. llvm-svn: 91273
* Coalesce insert_subreg undef, x first to avoid phase ordering issue.Evan Cheng2009-12-111-4/+11
| | | | llvm-svn: 91103
* It's not safe to coalesce a move where src and dst registers have different ↵Evan Cheng2009-12-101-1/+7
| | | | | | | | subregister indices. e.g.: %reg16404:1<def> = MOV8rr %reg16412:2<kill> llvm-svn: 91061
* improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner2009-12-031-14/+18
| | | | | | Patch by Howard Hinnant! llvm-svn: 90365
* Fix PR5391: support early clobber physical register def tied with a use (ewwww)Evan Cheng2009-12-011-0/+12
| | | | | | | | - A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber. - If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range. - Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature". llvm-svn: 90269
* Use CFG connectedness as a secondary sort key when deciding the order of ↵Jakob Stoklund Olesen2009-12-011-3/+13
| | | | | | | | | copy coalescing. This means that well connected blocks are copy coalesced before the less connected blocks. Connected blocks are more difficult to coalesce because intervals are more complicated, so handling them first gives a greater chance of success. llvm-svn: 90194
* Add MachineBasicBlock::getName, and use it in place of getBasicBlock()->getName.Jakob Stoklund Olesen2009-11-201-1/+1
| | | | | | Fix debug code that assumes getBasicBlock never returns NULL. llvm-svn: 89428
* - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.Evan Cheng2009-11-141-1/+1
| | | | | | | | - If destination is a physical register and it has a subreg index, use the sub-register instead. This fixes PR5423. llvm-svn: 88745
* RangeIsDefinedByCopyFromReg() should check for subreg_to_reg, insert_subreg,Evan Cheng2009-11-041-6/+22
| | | | | | | | and extract_subreg as a "copy" that defines a valno. Also fixes a typo. These two issues prevent a simple subreg coalescing from happening before. llvm-svn: 86022
* The Indexes Patch.Lang Hames2009-11-031-82/+86
| | | | | | | | | | | | | | | | This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. llvm-svn: 85979
* Stop the iterator in ValueLiveAt from potentially running off the end of the ↵Lang Hames2009-10-301-3/+5
| | | | | | interval. llvm-svn: 85599
* Reapply r85338.Bill Wendling2009-10-291-2/+17
| | | | llvm-svn: 85514
* Reverting r85338 for now. It's causing a bootstrap failure on PPC darwin9.Bill Wendling2009-10-291-17/+2
| | | | | | | | --- Reverse-merging r85338 into '.': U lib/CodeGen/SimpleRegisterCoalescing.cpp U lib/CodeGen/SimpleRegisterCoalescing.h llvm-svn: 85454
* Fixed a bug in the coalescer where intervals were occasionally merged ↵Lang Hames2009-10-271-2/+17
| | | | | | despite a real interference. This fixes rdar://problem/7157961. llvm-svn: 85338
* - Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests andEvan Cheng2009-10-261-22/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg around. - Relax register scavenging to allow use of partially "not-live" registers. It's common for targets to operate on registers where the top bits are undef. e.g. s0 = d0 = insert_subreg d0<undef>, s0, 1 ... = d0 When the insert_subreg is eliminated by the coalescer, the scavenger used to complain. The previous fix was to keep to insert_subreg around. But that's brittle and it's overly conservative when we want to use the scavenger to allocate registers. It's actually legal and desirable for other instructions to use the "undef" part of d0. e.g. s0 = d0 = insert_subreg d0<undef>, s0, 1 ... s1 = = s1 = d0 We probably need add a "partial-undef" marker on machine operand so the machine verifier would not complain. llvm-svn: 85091
* Do not delete identity insert_subreg even if dest is virtual. Let later ↵Evan Cheng2009-10-251-20/+27
| | | | | | passes delete them. This avoids register scavenger complain. llvm-svn: 85045
* Rename isLoopExit to isLoopExiting, for consistency with the wordingDan Gohman2009-10-241-2/+2
| | | | | | | | used elsewhere - an exit block is a block outside the loop branched to from within the loop. An exiting block is a block inside the loop that branches out. llvm-svn: 85019
* Identity copies should not contribute to spill weight.Evan Cheng2009-10-231-2/+5
| | | | llvm-svn: 84978
* Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman2009-10-091-2/+5
| | | | | | | | | | | | | | is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. llvm-svn: 83687
* isTriviallyReMaterializable checks theDan Gohman2009-10-091-2/+1
| | | | | | | TargetInstrDesc::isRematerializable flag, so it isn't necessary to do this check in its callers. llvm-svn: 83671
* Oops. Renamed remaining MachineInstrIndex references.Lang Hames2009-10-031-3/+3
| | | | llvm-svn: 83255
* Renamed MachineInstrIndex to LiveIndex.Lang Hames2009-10-031-45/+45
| | | | llvm-svn: 83254
* Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg ofEvan Cheng2009-09-281-3/+16
| | | | | | | | | | | physical registers. This is especially critical for the later two since they start the live interval of a super-register. e.g. %DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1 If this instruction is eliminated, the register scavenger will not be happy as D0 is not defined previously. This fixes PR5055. llvm-svn: 82968
* Clean up LiveVariables and change how it deals with partial updates and ↵Evan Cheng2009-09-241-2/+13
| | | | | | kills. This also eliminate the horrible check which scan forward to the end of the basic block. It should be faster and more accurate. llvm-svn: 82676
* Fix a obvious logic error.Evan Cheng2009-09-231-15/+15
| | | | llvm-svn: 82610
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