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* Fix spelling noticed by Duncan.Chandler Carruth2013-02-251-3/+3
| | | | llvm-svn: 176023
* Fix the root cause of PR15348 by correctly handling alignment 0 onChandler Carruth2013-02-252-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | memory intrinsics in the SDAG builder. When alignment is zero, the lang ref says that *no* alignment assumptions can be made. This is the exact opposite of the internal API contracts of the DAG where alignment 0 indicates that the alignment can be made to be anything desired. There is another, more explicit alignment that is better suited for the role of "no alignment at all": an alignment of 1. Map the intrinsic alignment to this early so that we don't end up generating aligned DAGs. It is really terrifying that we've never seen this before, but we suddenly started generating a large number of alignment 0 memcpys due to the new code to do memcpy-based copying of POD class members. That patch contains a bug that rounds bitfield alignments down when they are the first field. This can in turn produce zero alignments. This fixes weird crashes I've seen in library users of LLVM on 32-bit hosts, etc. llvm-svn: 176022
* SelectionDAG compile time improvement.Nadav Rotem2013-02-221-0/+19
| | | | | | | | One of the phases of SelectionDAG is LegalizeVectors. We don't need to sort the DAG and copy nodes around if there are no vector ops. Speeds up the compilation time of SelectionDAG on a big scalar workload by ~8%. llvm-svn: 175929
* Fix isa<> check which could never be true.Pete Cooper2013-02-221-1/+1
| | | | | | | | | | | | It was incorrectly checking a Function* being an IntrinsicInst* which isn't possible. It should always have been checking the CallInst* instead. Added test case for x86 which ensures we only get one constant load. It was 2 before this change. rdar://problem/13267920 llvm-svn: 175853
* DAGCombiner: Make the post-legalize vector op optimization more aggressive.Benjamin Kramer2013-02-211-10/+0
| | | | | | | | A legal BUILD_VECTOR goes in and gets constant folded into another legal BUILD_VECTOR so we don't lose any legality here. The problematic PPC optimization that made this check necessary was fixed recently. llvm-svn: 175759
* DAGCombiner: Fold pointless truncate, bitcast, buildvector seriesArnold Schwaighofer2013-02-201-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | (2xi32) (truncate ((2xi64) bitcast (buildvector i32 a, i32 x, i32 b, i32 y))) can be folded into a (2xi32) (buildvector i32 a, i32 b). Such a DAG would cause uneccessary vdup instructions followed by vmovn instructions. We generate this code on ARM NEON for a setcc olt, 2xf64, 2xf64. For example, in the vectorized version of the code below. double A[N]; double B[N]; void test_double_compare_to_double() { int i; for(i=0;i<N;i++) A[i] = (double)(A[i] < B[i]); } radar://13191881 Fixes bug 15283. llvm-svn: 175670
* Fix PR15267Michael Liao2013-02-201-14/+119
| | | | | | | | | - When extloading from a vector with non-byte-addressable element, e.g. <4 x i1>, the current logic breaks. Extend the current logic to fix the case where the element type is not byte-addressable by loading all bytes, bit-extracting/packing each element. llvm-svn: 175642
* Move the SplatByte helper to APInt and generalize it a bit.Benjamin Kramer2013-02-202-29/+7
| | | | llvm-svn: 175621
* Fix #includes, so we include only what we really need.Jakub Staszak2013-02-201-1/+1
| | | | llvm-svn: 175581
* [ms-inline asm] Remove a redundant call to the setHasMSInlineAsm function.Chad Rosier2013-02-181-2/+1
| | | | llvm-svn: 175456
* [ms-inline asm] Fix undefined behavior to reset hasMSInlineAsm in advance of ↵NAKAMURA Takumi2013-02-181-0/+1
| | | | | | SelectAllBasicBlocks(). llvm-svn: 175422
* LegalizeDAG.cpp doesn't need DenseMap.Jakub Staszak2013-02-161-1/+0
| | | | llvm-svn: 175365
* [ms-inline asm] Do not omit the frame pointer if we have ms-inline assembly.Chad Rosier2013-02-161-14/+17
| | | | | | | | | | | If the frame pointer is omitted, and any stack changes occur in the inline assembly, e.g.: "pusha", then any C local variable or C argument references will be incorrect. I pass no judgement on anyone who would do such a thing. ;) rdar://13218191 llvm-svn: 175334
* Use the 'target-features' and 'target-cpu' attributes to reset the subtarget ↵Bill Wendling2013-02-151-0/+4
| | | | | | | | | | features. If two functions require different features (e.g., `-mno-sse' vs. `-msse') then we want to honor that, especially during LTO. We can do that by resetting the subtarget's features depending upon the 'target-feature' attribute. llvm-svn: 175314
* enable SDISel sincos optimization for GNU environmentsPaul Redmond2013-02-151-1/+16
| | | | | | | | | | | | - add sincos to runtime library if target triple environment is GNU - added canCombineSinCosLibcall() which checks that sincos is in the RTL and if the environment is GNU then unsafe fpmath is enabled (required to preserve errno) - extended sincos-opt lit test Reviewed by: Hal Finkel llvm-svn: 175283
* Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.Nadav Rotem2013-02-141-6/+6
| | | | llvm-svn: 175190
* Add some legality checks for SETCC before introducing it in the DAG combiner ↵Owen Anderson2013-02-141-2/+6
| | | | | | post-operand legalization. llvm-svn: 175149
* Add static cast to unsigned char whenever a character classification ↵Guy Benyei2013-02-121-1/+1
| | | | | | function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration. llvm-svn: 175006
* PR14562 - Truncation of left shift became undefPaul Redmond2013-02-121-2/+9
| | | | | | | | | | | DAGCombiner::ReduceLoadWidth was converting (trunc i32 (shl i64 v, 32)) into (shl i32 v, 32) into undef. To prevent this, check the shift count against the final result size. Patch by: Kevin Schoedel Reviewed by: Nadav Rotem llvm-svn: 174972
* Check type for legality before forming a select from loads.Pete Cooper2013-02-121-1/+3
| | | | | | | | Sorry for the lack of a test case. I tried writing one for i386 as i know selects are illegal on this target, but they are actually considered legal by isel and expanded later. I can't see any targets to trigger this, but checking for the legality of a node before forming it is general goodness. llvm-svn: 174934
* Currently, codegen may spent some time in SDISel passes even if an entireEvan Cheng2013-02-112-8/+40
| | | | | | | | | | | | | | function is successfully handled by fast-isel. That's because function arguments are *always* handled by SDISel. Introduce FastLowerArguments to allow each target to provide hook to handle formal argument lowering. As a proof-of-concept, add ARMFastIsel::FastLowerArguments to handle functions with 4 or fewer scalar integer (i8, i16, or i32) arguments. It completely eliminates the need for SDISel for trivial functions. rdar://13163905 llvm-svn: 174855
* Remove unnecessary code.Evan Cheng2013-02-111-4/+0
| | | | llvm-svn: 174854
* DAGCombiner: Constant folding around pre-increment loads/storesHal Finkel2013-02-081-0/+89
| | | | | | | | | | | Previously, even when a pre-increment load or store was generated, we often needed to keep a copy of the original base register for use with other offsets. If all of these offsets are constants (including the offset which was combined into the addressing mode), then this is clearly unnecessary. This change adjusts these other offsets to use the new incremented address. llvm-svn: 174746
* Revert 172027 and 174336. Remove diagnostics about over-aligned stack objects.Bob Wilson2013-02-082-4/+2
| | | | | | | | | | | | Aside from the question of whether we report a warning or an error when we can't satisfy a requested stack object alignment, the current implementation of this is not good. We're not providing any source location in the diagnostics and the current warning is not connected to any warning group so you can't control it. We could improve the source location somewhat, but we can do a much better job if this check is implemented in the front-end, so let's do that instead. <rdar://problem/13127907> llvm-svn: 174741
* Tweak check to avoid integer overflow (for insanely large alignments)Evan Cheng2013-02-061-2/+2
| | | | llvm-svn: 174482
* Reapply r174343, with a fix for a scary DAG combine bug where it failed to ↵Owen Anderson2013-02-051-2/+5
| | | | | | | | | | | | | | | | | | differentiate between the alignment of the base point of a load, and the overall alignment of the load. This caused infinite loops in DAG combine with the original application of this patch. ORIGINAL COMMIT LOG: When the target-independent DAGCombiner inferred a higher alignment for a load, it would replace the load with one with the higher alignment. However, it did not place the new load in the worklist, which prevented later DAG combines in the same phase (for example, target-specific combines) from ever seeing it. This patch corrects that oversight, and updates some tests whose output changed due to slightly different DAGCombine outputs. llvm-svn: 174431
* Revert r174343, "When the target-independent DAGCombiner inferred a higher ↵NAKAMURA Takumi2013-02-051-5/+2
| | | | | | | | alignment for a load," It caused hangups in compiling clang/lib/Parse/ParseDecl.cpp and clang/lib/Driver/Tools.cpp in stage2 on some hosts. llvm-svn: 174374
* When the target-independent DAGCombiner inferred a higher alignment for a load,Owen Anderson2013-02-051-2/+5
| | | | | | | | | | | it would replace the load with one with the higher alignment. However, it did not place the new load in the worklist, which prevented later DAG combines in the same phase (for example, target-specific combines) from ever seeing it. This patch corrects that oversight, and updates some tests whose output changed due to slightly different DAGCombine outputs. llvm-svn: 174343
* SelectionDAG: Teach FoldConstantArithmetic how to deal with vectors.Benjamin Kramer2013-02-041-44/+115
| | | | | | | | | | | | | | | | | This required disabling a PowerPC optimization that did the following: input: x = BUILD_VECTOR <i32 16, i32 16, i32 16, i32 16> lowered to: tmp = BUILD_VECTOR <i32 8, i32 8, i32 8, i32 8> x = ADD tmp, tmp The add now gets folded immediately and we're back at the BUILD_VECTOR we started from. I don't see a way to fix this currently so I left it disabled for now. Fix some trivially foldable X86 tests too. llvm-svn: 174325
* rdar://13126763Shuxin Yang2013-02-021-13/+20
| | | | | | | Fix a bug in DAGCombine. The symptom is mistakenly optimizing expression "x + x*x" into "x * 3.0". llvm-svn: 174239
* Fix errant fallthrough in the generation of the lifetime markers.Nadav Rotem2013-02-011-0/+1
| | | | | | Found by Alexander Kornienko. llvm-svn: 174207
* When lowering memcpys to loads and stores, make sure we don't promote alignmentsLang Hames2013-01-311-0/+9
| | | | | | past the natural stack alignment. llvm-svn: 174085
* Add a special handling case for untyped CopyFromReg node in GetCostForDef() ↵Weiming Zhao2013-01-291-1/+11
| | | | | | of ScheduleDAGRRList llvm-svn: 173833
* Teach SDISel to combine fsin / fcos into a fsincos node if the followingEvan Cheng2013-01-292-9/+131
| | | | | | | | | | | | | | | | | | conditions are met: 1. They share the same operand and are in the same BB. 2. Both outputs are used. 3. The target has a native instruction that maps to ISD::FSINCOS node or the target provides a sincos library call. Implemented the generic optimization in sdisel and enabled it for Mac OSX. Also added an additional optimization for x86_64 Mac OSX by using an alternative entry point __sincos_stret which returns the two results in xmm0 / xmm1. rdar://13087969 PR13204 llvm-svn: 173755
* Legalizer: Reword comment again, per Duncan's suggestion.Benjamin Kramer2013-01-271-3/+2
| | | | llvm-svn: 173625
* Legalizer: Add an assert and tweak a comment to clarify the assumptions this ↵Benjamin Kramer2013-01-271-1/+5
| | | | | | code makes. llvm-svn: 173620
* When the legalizer is splitting vector shifts, the result may not have the ↵Benjamin Kramer2013-01-271-2/+9
| | | | | | | | | | | | | | | right shift amount type. Fix that by adding a cast to the shift expander. This came up with vector shifts on sse-less X86 CPUs. <2 x i64> = shl <2 x i64> <2 x i64> -> i64,i64 = shl i64 i64; shl i64 i64 -> i32,i32,i32,i32 = shl_parts i32 i32 i64; shl_parts i32 i32 i64 Now we cast the last two i64s to the right type. Fixes the crash in PR14668. llvm-svn: 173615
* This patch aims to reduce compile time in LegalizeTypes by using SmallDenseMap,Preston Gurd2013-01-252-9/+9
| | | | | | | | | | | | | with an initial number of elements, instead of DenseMap, which has zero initial elements, in order to avoid the copying of elements when the size changes and to avoid allocating space every time LegalizeTypes is run. This patch will not affect the memory footprint, because DenseMap will increase the element size to 64 when the first element is added. Patch by Wan Xiaofei. llvm-svn: 173448
* Make APFloat constructor require explicit semantics.Tim Northover2013-01-225-42/+29
| | | | | | | | | Previously we tried to infer it from the bit width size, with an added IsIEEE argument for the PPC/IEEE 128-bit case, which had a default value. This default value allowed bugs to creep in, where it was inappropriate. llvm-svn: 173138
* Revert 172708.Nadav Rotem2013-01-202-14/+8
| | | | | | | | | The optimization handles esoteric cases but adds a lot of complexity both to the X86 backend and to other backends. This optimization disables an important canonicalization of chains of SEXT nodes and makes SEXT and ZEXT asymmetrical. Disabling the canonicalization of consecutive SEXT nodes into a single node disables other DAG optimizations that assume that there is only one SEXT node. The AVX mask optimizations is one example. Additionally this optimization does not update the cost model. llvm-svn: 172968
* Use AttributeSet accessor methods instead of Attribute accessor methods.Bill Wendling2013-01-181-4/+4
| | | | | | | Further encapsulation of the Attribute object. Don't allow direct access to the Attribute object as an aggregate. llvm-svn: 172853
* Remove unused parameter. Also use the AttributeSet query methods instead of ↵Bill Wendling2013-01-181-2/+1
| | | | | | the Attribute query methods. llvm-svn: 172852
* Optimization for the following SIGN_EXTEND pairs:Elena Demikhovsky2013-01-172-8/+14
| | | | | | | | | | | | v8i8 -> v8i64, v8i8 -> v8i32, v4i8 -> v4i64, v4i16 -> v4i64 for AVX and AVX2. Bug 14865. llvm-svn: 172708
* This patch addresses an incorrect transformation in the DAG combiner.Bill Schmidt2013-01-141-5/+15
| | | | | | | | | | | | | | | | | | | | | | The included test case is derived from one of the GCC compatibility tests. The problem arises after the selection DAG has been converted to type-legalized form. The combiner first sees a 64-bit load that can be converted into a pre-increment form. The original load feeds into a SRL that isolates the upper 32 bits of the loaded doubleword. This looks like an opportunity for DAGCombiner::ReduceLoadWidth() to replace the 64-bit load with a 32-bit load. However, this transformation is not valid, as the replacement load is not a pre-increment load. The pre-increment load produces an extra result, which feeds a subsequent add instruction. The replacement load only has one result value, and this value is propagated to all uses of the pre- increment load, including the add. Because the add is looking for the second result value as its operand, it ends up attempting to add a constant to a token chain, resulting in a crash. So the patch simply disables this transformation for any load with more than two result values. llvm-svn: 172480
* When lowering an inreg sext first shift left, then right arithmetically.Benjamin Kramer2013-01-121-3/+3
| | | | | | | Shifting right two times will only yield zero. Should fix SingleSource/UnitTests/SignlessTypes/factor. llvm-svn: 172322
* PPC: Implement efficient lowering of sign_extend_inreg.Nadav Rotem2013-01-111-1/+25
| | | | llvm-svn: 172269
* Remove some accidentaly duplicated code. This needs urgent cleanup :(Benjamin Kramer2013-01-111-270/+0
| | | | llvm-svn: 172248
* Split TargetLowering into a CodeGen and a SelectionDAG part.Benjamin Kramer2013-01-111-971/+5
| | | | | | | | | This fixes some of the cycles between libCodeGen and libSelectionDAG. It's still a complete mess but as long as the edges consist of virtual call it doesn't cause breakage. BasicTTI did static calls and thus broke some build configurations. llvm-svn: 172246
* For inline asm:Eric Christopher2013-01-112-3/+13
| | | | | | | | | | | - recognize string "{memory}" in the MI generation - mark as mayload/maystore when there's a memory clobber constraint. PR14859. Patch by Krzysztof Parzyszek llvm-svn: 172228
* PR14896: Handle memcpy from constant string where the memcpy size is larger ↵Evan Cheng2013-01-101-2/+3
| | | | | | than the string size. llvm-svn: 172124
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