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* add a new @llvm.donothing intrinsic that, well, does nothing, and teach ↵Nuno Lopes2012-06-281-1/+8
| | | | | | CodeGen to ignore calls to it llvm-svn: 159383
* 'Promote' vector [su]int_to_fp should widen elements.Jim Grosbach2012-06-281-3/+54
| | | | | | | | | | | Teach vector legalization how to honor Promote for int to float conversions. The code checking whether to promote the operation knew to look at the operand, but the actual promotion code didn't. This fixes that. The operand is promoted up via [zs]ext. rdar://11762659 llvm-svn: 159378
* Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp andBill Wendling2012-06-288-19/+19
| | | | | | | | | include/llvm/Analysis/DebugInfo.h to include/llvm/DebugInfo.h. The reasoning is because the DebugInfo module is simply an interface to the debug info MDNodes and has nothing to do with analysis. llvm-svn: 159312
* Make sure type is not extended or untyped before create a constant of the ↵Evan Cheng2012-06-261-0/+4
| | | | | | type. No test case. Found by inspection. llvm-svn: 159179
* llvm/lib: [CMake] Add explicit dependency to intrinsics_gen.NAKAMURA Takumi2012-06-241-0/+2
| | | | llvm-svn: 159112
* DAG legalisation can now handle illegal fma vector types by scalarisationPete Cooper2012-06-242-0/+32
| | | | llvm-svn: 159092
* Rename -allow-excess-fp-precision flag to -fuse-fp-ops, and switch from aLang Hames2012-06-222-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | boolean flag to an enum: { Fast, Standard, Strict } (default = Standard). This option controls the creation by optimizations of fused FP ops that store intermediate results in higher precision than IEEE allows (E.g. FMAs). The behavior of this option is intended to match the behaviour specified by a soon-to-be-introduced frontend flag: '-ffuse-fp-ops'. Fast mode - allows formation of fused FP ops whenever they're profitable. Standard mode - allow fusion only for 'blessed' FP ops. At present the only blessed op is the fmuladd intrinsic. In the future more blessed ops may be added. Strict mode - allow fusion only if/when it can be proven that the excess precision won't effect the result. Note: This option only controls formation of fused ops by the optimizers. Fused operations that are explicitly requested (e.g. FMA via the llvm.fma.* intrinsic) will always be honored, regardless of the value of this option. Internally TargetOptions::AllowExcessFPPrecision has been replaced by TargetOptions::AllowFPOpFusion. llvm-svn: 158956
* Fix potential crash if DAGCombine on stores sees a half typePete Cooper2012-06-211-1/+2
| | | | llvm-svn: 158927
* Emit a single _udivmodsi4 libcall instead of two separate _udivsi3 andEvan Cheng2012-06-211-5/+7
| | | | | | | | _umodsi3 libcalls if they have the same arguments. This optimization was apparently broken if one of the node was replaced in place. rdar://11714607 llvm-svn: 158900
* Add users of a MERGE_VALUE node to the worklist to process again when the ↵Pete Cooper2012-06-201-0/+3
| | | | | | node is removed. Sorry, no test case. Foudn it by inspection of the code llvm-svn: 158839
* Fix DAGCombine to deal with ext-conversion of pre/post_inc loads.Hal Finkel2012-06-201-1/+8
| | | | | | The test case for this will come with the PPC indexed preinc loads commit. llvm-svn: 158822
* Add DAG-combines for aggressive FMA formation.Lang Hames2012-06-191-0/+43
| | | | | | | | | | | | | | | | | | | | This patch adds DAG combines to form FMAs from pairs of FADD + FMUL or FSUB + FMUL. The combines are performed when: (a) Either AllowExcessFPPrecision option (-enable-excess-fp-precision for llc) OR UnsafeFPMath option (-enable-unsafe-fp-math) are set, and (b) TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) is true for the type of the FADD/FSUB, and (c) The FMUL only has one user (the FADD/FSUB). If your target has fast FMA instructions you can make use of these combines by overriding TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) to return true for types supported by your FMA instruction, and adding patterns to match ISD::FMA to your FMA instructions. llvm-svn: 158757
* Make comment slightly more helpful.Lang Hames2012-06-141-1/+1
| | | | llvm-svn: 158467
* misched: API for minimum vs. expected latency.Andrew Trick2012-06-051-6/+0
| | | | | | | Minimum latency determines per-cycle scheduling groups. Expected latency determines critical path and cost. llvm-svn: 158021
* Add a new intrinsic: llvm.fmuladd. This intrinsic represents a multiply-addLang Hames2012-06-051-0/+21
| | | | | | | | | | | | expression (a * b + c) that can be implemented as a fused multiply-add (fma) if the target determines that this will be more efficient. This intrinsic will be used to implement FP_CONTRACT support and an aggressive FMA formation mode. If your target has a fast FMA instruction you should override the isFMAFasterThanMulAndAdd method in TargetLowering to return true. llvm-svn: 158014
* misched: Added MultiIssueItineraries.Andrew Trick2012-06-051-1/+1
| | | | | | | | This allows a subtarget to explicitly specify the issue width and other properties without providing pipeline stage details for every instruction. llvm-svn: 157979
* sdsched: Use the right heuristics when -mcpu is not provided and we have no ↵Andrew Trick2012-06-051-13/+12
| | | | | | | | itinerary. Use ILP heuristics for long latency instrs if no scoreboard exists. llvm-svn: 157978
* Remove the "-promote-elements" flag. This flag is now enabled by default.Nadav Rotem2012-06-041-12/+1
| | | | llvm-svn: 157925
* Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer2012-06-024-6/+6
| | | | llvm-svn: 157885
* PR1255: case ranges.Stepan Dyatkovskiy2012-06-021-3/+3
| | | | | | IntRange converted from struct to class. So main change everywhere is replacement of ".Low/High" with ".getLow/getHigh()" llvm-svn: 157884
* PR1255: case ranges.Stepan Dyatkovskiy2012-06-021-1/+1
| | | | | | IntegersSubsetGeneric, IntegersSubsetMapping: added IntTy template parameter, that allows use either APInt or IntItem. This change allows to write unittest for these classes. llvm-svn: 157880
* Fix a bug in the code which custom-lowers truncating stores in LegalizeDAG.Akira Hatanaka2012-06-021-2/+3
| | | | | | | Check that the SDValue TargetLowering::LowerOperation returns is not null before replacing the original node with the returned node. llvm-svn: 157873
* Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen2012-06-011-1/+1
| | | | | | | | | | | | | No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). llvm-svn: 157854
* Simplify some more getAliasSet callers.Jakob Stoklund Olesen2012-06-011-10/+5
| | | | | | MCRegAliasIterator can include Reg itself in the list. llvm-svn: 157848
* ARM: properly handle alignment for struct byval.Manman Ren2012-06-011-0/+24
| | | | | | | | | Factor out the expansion code into a function. This change is to be enabled in clang. rdar://9877866 llvm-svn: 157830
* PR1255: case ranges.Stepan Dyatkovskiy2012-06-011-1/+1
| | | | | | | IntegersSubset devided into IntegersSubsetGeneric and into IntegersSubset itself. The first has no references to ConstantInt and works with IntItem only. IntegersSubsetMapping also made generic. Here added second template parameter "IntegersSubsetTy" that allows to use on of two IntegersSubset types described below. llvm-svn: 157815
* Switch the canonical FMA term operand order to match both the comment I ↵Owen Anderson2012-05-301-1/+1
| | | | | | wrote and the usual LLVM convention. llvm-svn: 157708
* Teach DAGCombine to canonicalize the position of a constant in the term ↵Owen Anderson2012-05-301-0/+4
| | | | | | operands of an FMA node. llvm-svn: 157707
* ConstantRangesSet renamed to IntegersSubset. CRSBuilder renamed to ↵Stepan Dyatkovskiy2012-05-291-2/+2
| | | | | | IntegersSubsetMapping. llvm-svn: 157612
* Add llvm.fabs intrinsic.Peter Collingbourne2012-05-281-0/+5
| | | | llvm-svn: 157594
* PR1255: Case RangesStepan Dyatkovskiy2012-05-281-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | Implemented IntItem - the wrapper around APInt. Why not to use APInt item directly right now? 1. It will very difficult to implement case ranges as series of small patches. We got several large and heavy patches. Each patch will about 90-120 kb. If you replace ConstantInt with APInt in SwitchInst you will need to changes at the same time all Readers,Writers and absolutely all passes that uses SwitchInst. 2. We can implement APInt pool inside and save memory space. E.g. we use several switches that works with 256 bit items (switch on signatures, or strings). We can avoid value duplicates in this case. 3. IntItem can be easyly easily replaced with APInt. 4. Currenly we can interpret IntItem both as ConstantInt and as APInt. It allows to provide SwitchInst methods that works with ConstantInt for non-updated passes. Why I need it right now? Currently I need to update SimplifyCFG pass (EqualityComparisons). I need to work with APInts directly a lot, so peaces of code ConstantInt *V = ...; if (V->getValue().ugt(AnotherV->getValue()) { ... } will look awful. Much more better this way: IntItem V = ConstantIntVal->getValue(); if (AnotherV < V) { } Of course any reviews are welcome. P.S.: I'm also going to rename ConstantRangesSet to IntegersSubset, and CRSBuilder to IntegersSubsetMapping (allows to map individual subsets of integers to the BasicBlocks). Since in future these classes will founded on APInt, it will possible to use them in more generic ways. llvm-svn: 157576
* Missed parens.Benjamin Kramer2012-05-271-1/+1
| | | | llvm-svn: 157527
* r157525 didn't work, just disable iterator checking.Benjamin Kramer2012-05-271-1/+1
| | | | | | | This is obviosly right but I don't see how to do this with proper vector iterators without building a horrible mess of workarounds. llvm-svn: 157526
* SDAGBuilder: Avoid iterator invalidation harder.Benjamin Kramer2012-05-271-1/+1
| | | | | | vector.begin()-1 is invalid too. llvm-svn: 157525
* SDAGBuilder: Don't create an invalid iterator when there is only one switch ↵Benjamin Kramer2012-05-261-2/+2
| | | | | | | | case. Found by libstdc++'s debug mode. llvm-svn: 157522
* SelectionDAGBuilder: When emitting small compare chains for switches order ↵Benjamin Kramer2012-05-261-3/+18
| | | | | | | | | | | | | | them by using edge weights. SimplifyCFG tends to form a lot of 2-3 case switches when merging branches. Move the most likely condition to the front so it is checked first and the others can be skipped. This is currently not as effective as it could be because SimplifyCFG destroys profiling metadata when merging branches and switches. Merging branch weight metadata is tricky though. This code touches at most 3 cases so I didn't use a proper sorting algorithm. llvm-svn: 157521
* Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski2012-05-255-81/+91
| | | | | | | | | | to pass around a struct instead of a large set of individual values. This cleans up the interface and allows more information to be added to the struct for future targets without requiring changes to each and every target. NV_CONTRIB llvm-svn: 157479
* Simplify code for calling a function where CanLowerReturn fails, fixing a ↵Eli Friedman2012-05-252-35/+11
| | | | | | small bug in the process. llvm-svn: 157446
* Mark some static arrays as const.Craig Topper2012-05-241-1/+1
| | | | llvm-svn: 157377
* Fix use of an unitialized value in the LegalizeOps expansion for ISD::SUB. ↵Owen Anderson2012-05-211-1/+1
| | | | | | | | No in-tree targets exercise this path. Patch by Micah Villmow. llvm-svn: 157215
* Typo.Chad Rosier2012-05-211-1/+1
| | | | llvm-svn: 157195
* When legalising shifts, do not pre-build a list of operands whichPeter Collingbourne2012-05-201-10/+14
| | | | | | | may be RAUW'd by the recursive call to LegalizeOps; instead, retrieve the other operands when calling UpdateNodeOperands. Fixes PR12889. llvm-svn: 157162
* Properly constrain register classes for sub-registers.Jakob Stoklund Olesen2012-05-201-0/+2
| | | | | | Not all GR64 registers have sub_8bit sub-registers. llvm-svn: 157150
* Recommited reworked r156804:Stepan Dyatkovskiy2012-05-182-53/+29
| | | | | | SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced. llvm-svn: 157046
* SelectionDAGBuilder: CaseBlock, CaseRanges and CaseCmp changed ↵Stepan Dyatkovskiy2012-05-172-10/+11
| | | | | | representation of Low and High from signed to unsigned. Since unsigned ints usually simpler, faster and allows to reduce some extra signed bit checks needed before <,>,<=,>= comparisons. llvm-svn: 156985
* Fix a thinko in DisintegrateMERGE_VALUES. Patch by Xiaoyi Guo.Duncan Sands2012-05-162-2/+2
| | | | llvm-svn: 156909
* Rejected r156804 due to buildbots failures.Stepan Dyatkovskiy2012-05-151-35/+46
| | | | llvm-svn: 156808
* SelectionDAGBuilder::Clusterify : main functinality was replaced with ↵Stepan Dyatkovskiy2012-05-151-46/+35
| | | | | | CRSBuilder::optimize, so big part of Clusterify's code was reduced. llvm-svn: 156804
* Rename @llvm.debugger to @llvm.debugtrap.Dan Gohman2012-05-142-3/+3
| | | | llvm-svn: 156774
* Revert 156658.Chad Rosier2012-05-111-2/+1
| | | | llvm-svn: 156662
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