| Commit message (Collapse) | Author | Age | Files | Lines |
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because the boolean it returns to indicate an overflow may not be treated like
as a flag. It could be stored to memory, for instance.
llvm-svn: 59780
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"ISD::ADDO". ISD::ADDO is lowered into a target-independent form that does the
addition and then checks if the result is less than one of the operands. (If it
is, then there was an overflow.)
llvm-svn: 59779
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llvm-svn: 59777
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schedulers. This doesn't have much immediate impact because
targets that use these schedulers by default don't yet provide
pipeline information.
This code also didn't have the benefit of register pressure
information. Also, removing it will avoid problems with list-burr
suddenly starting to do latency-oriented scheduling on x86 when we
start providing pipeline data, which would increase spilling.
llvm-svn: 59775
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some of the latency computation logic out of the SDNode
ScheduleDAG code into a TargetInstrItineraries helper method
to help with this.
llvm-svn: 59761
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condition in an addition operation.
llvm-svn: 59760
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the RR scheduler actually does look at latency values, but it
doesn't use a hazard recognizer so it has no way to know when
a no-op is needed, as opposed to just stalling and incrementing
the cycle count.
llvm-svn: 59759
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llvm-svn: 59727
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llvm-svn: 59718
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llvm-svn: 59702
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list-tdrr schedulers into a common base class.
llvm-svn: 59701
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dedicated "fast" scheduler in -fast mode instead, which is
faster. This speeds up llc -fast by a few percent on some
testcases -- the speedup only happens for code not handled by
fast-isel.
llvm-svn: 59700
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the list-burr scheduler so that it can be used by the list-tdrr
scheduler too.
llvm-svn: 59698
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extend it a bit, and make use of it in all schedulers, to
ensure consistent checking.
llvm-svn: 59689
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and CreateClone don't add any extra value.
llvm-svn: 59679
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is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.
This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.
The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.
llvm-svn: 59676
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a virtual method of SelectionDAG.
llvm-svn: 59667
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dump in terms of it.
llvm-svn: 59665
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llvm-svn: 59580
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print in the correct order.
llvm-svn: 59567
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consistent with ScheduleNodeTopDown methods.
llvm-svn: 59550
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llvm-svn: 59549
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and FP_ROUND. Not sure what these were doing
here - probably they were sometimes (wrongly)
created with integer operands somewhere that
has since been fixed.
llvm-svn: 59548
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supposed to be any functionality change.
llvm-svn: 59545
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llvm-svn: 59532
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SCALAR_TO_VECTOR. I didn't add the testcase, because
once llc gets past scalar-to-vector it hits a SPU target
lowering bug and explodes.
llvm-svn: 59530
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llvm-svn: 59519
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when softening FNEG.
llvm-svn: 59513
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llvm-svn: 59504
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llvm-svn: 59489
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a SelectionDAG*.
llvm-svn: 59488
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Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll
Failed with signal(SIGABRT) at line 1
while running: llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll | llc -march=xcore > fneg.ll.tmp1.s
Assertion failed: (VT.isFloatingPoint() && "Cannot create integer FP constant!"), function getConstantFP, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 913.
0 llc 0x0092115c _ZN4llvm3sys18RemoveFileOnSignalERKNS0_4PathEPSs + 844
1 libSystem.B.dylib 0x9217809b _sigtramp + 43
2 ??? 0xffffffff 0x0 + 4294967295
3 libSystem.B.dylib 0x921f0ec2 raise + 26
4 libSystem.B.dylib 0x9220047f abort + 73
5 libSystem.B.dylib 0x921f2063 __assert_rtn + 101
6 llc 0x005a5b0a _ZN4llvm12SelectionDAG13getConmake[1]: *** [check-local] Error 1
make: *** [check] Error 2
llvm-svn: 59487
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new CycleBound value. Instead, just update CycleBound on each call.
Also, make ReleasePred and ReleaseSucc methods more consistent accross
the various schedulers.
This also happens to make ScheduleDAGRRList's CycleBound computation
somewhat more interesting, though it still doesn't have any noticeable
effect, because no current targets that use the register-pressure
reduction scheduler provide pipeline models.
llvm-svn: 59475
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functions in these two schedulers.
llvm-svn: 59465
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patch by Richard Osborne, tweaked and extended by your humble
servant.
llvm-svn: 59464
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llvm-svn: 59461
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a side-car datastructure
llvm-svn: 59458
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for the target. This fixes PR3080.
llvm-svn: 59450
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llvm-svn: 59445
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llvm-svn: 59432
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can extract using different indexes for two vectors. Added a few tests
for vector shuffles.
llvm-svn: 59399
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use SHUFFLE_VECTOR instead. If not practical, fall back
to the old scheme of building the split result by hand
using a BUILD_VECTOR.
llvm-svn: 59361
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and when loading/storing a widen vector, make sure that they are loaded
and stored in consecutive order.
llvm-svn: 59357
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llvm-svn: 59341
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llvm-svn: 59340
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fairly conservative; it doesn't do alias-analysis queries and it doesn't
attempt to break anti-dependencies.
llvm-svn: 59324
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before re-inserting them.
llvm-svn: 59281
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llvm-svn: 59280
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llvm-svn: 59279
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llvm-svn: 59278
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